[][src]Type Definition stm32f4::stm32f469::dsihost::DSI_CLTCR

type DSI_CLTCR = Reg<u32, _DSI_CLTCR>;

DSI Host Clock Lane Timer Configuration Register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see dsi_cltcr module

Trait Implementations

impl Readable for DSI_CLTCR[src]

read() method returns dsi_cltcr::R reader structure

impl ResetValue for DSI_CLTCR[src]

Register DSI_CLTCR reset()'s with value 0

type Type = u32

Register size

impl Writable for DSI_CLTCR[src]

write(|w| ..) method takes dsi_cltcr::W writer structure