[−][src]Module stm32f4::stm32f413::rtc::cr

control register

Structs

ADD1H_W	Write proxy for field `ADD1H`
ALRAE_W	Write proxy for field `ALRAE`
ALRAIE_W	Write proxy for field `ALRAIE`
ALRBE_W	Write proxy for field `ALRBE`
ALRBIE_W	Write proxy for field `ALRBIE`
BKP_W	Write proxy for field `BKP`
BYPSHAD_W	Write proxy for field `BYPSHAD`
COE_W	Write proxy for field `COE`
COSEL_W	Write proxy for field `COSEL`
DCE_W	Write proxy for field `DCE`
FMT_W	Write proxy for field `FMT`
OSEL_W	Write proxy for field `OSEL`
POL_W	Write proxy for field `POL`
REFCKON_W	Write proxy for field `REFCKON`
SUB1H_W	Write proxy for field `SUB1H`
TSEDGE_W	Write proxy for field `TSEDGE`
TSE_W	Write proxy for field `TSE`
TSIE_W	Write proxy for field `TSIE`
WUCKSEL_W	Write proxy for field `WUCKSEL`
WUTE_W	Write proxy for field `WUTE`
WUTIE_W	Write proxy for field `WUTIE`

ADD1H_A	Add 1 hour (summer time change)
ALRAE_A	Alarm A enable
ALRAIE_A	Alarm A interrupt enable
ALRBE_A	Alarm B enable
ALRBIE_A	Alarm B interrupt enable
BKP_A	Backup
BYPSHAD_A	Bypass the shadow registers
COE_A	Calibration output enable
COSEL_A	Calibration Output selection
FMT_A	Hour format
OSEL_A	Output selection
POL_A	Output polarity
REFCKON_A	Reference clock detection enable (50 or 60 Hz)
SUB1H_A	Subtract 1 hour (winter time change)
TSEDGE_A	Time-stamp event active edge
TSE_A	Time stamp enable
TSIE_A	Time-stamp interrupt enable
WUCKSEL_A	Wakeup clock selection
WUTE_A	Wakeup timer enable
WUTIE_A	Wakeup timer interrupt enable