[][src]Type Definition stm32f4::stm32f413::rcc::ahb1lpenr::W

type W = W<u32, AHB1LPENR>;

Writer for register AHB1LPENR

Implementations

impl W[src]

pub fn gpioalpen(&mut self) -> GPIOALPEN_W<'_>[src]

Bit 0 - IO port A clock enable during sleep mode

pub fn gpioblpen(&mut self) -> GPIOBLPEN_W<'_>[src]

Bit 1 - IO port B clock enable during Sleep mode

pub fn gpioclpen(&mut self) -> GPIOCLPEN_W<'_>[src]

Bit 2 - IO port C clock enable during Sleep mode

pub fn gpiodlpen(&mut self) -> GPIODLPEN_W<'_>[src]

Bit 3 - IO port D clock enable during Sleep mode

pub fn gpioelpen(&mut self) -> GPIOELPEN_W<'_>[src]

Bit 4 - IO port E clock enable during Sleep mode

pub fn gpioflpen(&mut self) -> GPIOFLPEN_W<'_>[src]

Bit 5 - IO port F clock enable during sleep mode

pub fn gpioglpen(&mut self) -> GPIOGLPEN_W<'_>[src]

Bit 6 - IO port G clock enable during sleep mode

pub fn gpiohlpen(&mut self) -> GPIOHLPEN_W<'_>[src]

Bit 7 - IO port H clock enable during Sleep mode

pub fn crclpen(&mut self) -> CRCLPEN_W<'_>[src]

Bit 12 - CRC clock enable during Sleep mode

pub fn flitflpen(&mut self) -> FLITFLPEN_W<'_>[src]

Bit 15 - Flash interface clock enable during Sleep mode

pub fn sram1lpen(&mut self) -> SRAM1LPEN_W<'_>[src]

Bit 16 - SRAM 1interface clock enable during Sleep mode

pub fn dma1lpen(&mut self) -> DMA1LPEN_W<'_>[src]

Bit 21 - DMA1 clock enable during Sleep mode

pub fn dma2lpen(&mut self) -> DMA2LPEN_W<'_>[src]

Bit 22 - DMA2 clock enable during Sleep mode

pub fn sram2lpen(&mut self) -> SRAM2LPEN_W<'_>[src]

Bit 17 - SRAM2interface clock enable during Sleep mode