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#[doc = "Reader of register CSR"] pub type R = crate::R<u32, super::CSR>; #[doc = "Writer for register CSR"] pub type W = crate::W<u32, super::CSR>; #[doc = "Register CSR `reset()`'s with value 0"] impl crate::ResetValue for super::CSR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `WUF`"] pub type WUF_R = crate::R<bool, bool>; #[doc = "Reader of field `SBF`"] pub type SBF_R = crate::R<bool, bool>; #[doc = "Reader of field `PVDO`"] pub type PVDO_R = crate::R<bool, bool>; #[doc = "Reader of field `BRR`"] pub type BRR_R = crate::R<bool, bool>; #[doc = "Reader of field `EWUP`"] pub type EWUP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `EWUP`"] pub struct EWUP_W<'a> { w: &'a mut W, } impl<'a> EWUP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `BRE`"] pub type BRE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BRE`"] pub struct BRE_W<'a> { w: &'a mut W, } impl<'a> BRE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `VOSRDY`"] pub type VOSRDY_R = crate::R<bool, bool>; #[doc = "Write proxy for field `VOSRDY`"] pub struct VOSRDY_W<'a> { w: &'a mut W, } impl<'a> VOSRDY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `ODRDY`"] pub type ODRDY_R = crate::R<bool, bool>; #[doc = "Reader of field `ODSWRDY`"] pub type ODSWRDY_R = crate::R<bool, bool>; #[doc = "Reader of field `UDRDY`"] pub type UDRDY_R = crate::R<u8, u8>; #[doc = "Write proxy for field `UDRDY`"] pub struct UDRDY_W<'a> { w: &'a mut W, } impl<'a> UDRDY_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | (((value as u32) & 0x03) << 18); self.w } } impl R { #[doc = "Bit 0 - Wakeup flag"] #[inline(always)] pub fn wuf(&self) -> WUF_R { WUF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Standby flag"] #[inline(always)] pub fn sbf(&self) -> SBF_R { SBF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - PVD output"] #[inline(always)] pub fn pvdo(&self) -> PVDO_R { PVDO_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Backup regulator ready"] #[inline(always)] pub fn brr(&self) -> BRR_R { BRR_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 8 - Enable WKUP pin"] #[inline(always)] pub fn ewup(&self) -> EWUP_R { EWUP_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Backup regulator enable"] #[inline(always)] pub fn bre(&self) -> BRE_R { BRE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 14 - Regulator voltage scaling output selection ready bit"] #[inline(always)] pub fn vosrdy(&self) -> VOSRDY_R { VOSRDY_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 16 - Over-drive mode ready"] #[inline(always)] pub fn odrdy(&self) -> ODRDY_R { ODRDY_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Over-drive mode switching ready"] #[inline(always)] pub fn odswrdy(&self) -> ODSWRDY_R { ODSWRDY_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Under-drive ready flag"] #[inline(always)] pub fn udrdy(&self) -> UDRDY_R { UDRDY_R::new(((self.bits >> 18) & 0x03) as u8) } } impl W { #[doc = "Bit 8 - Enable WKUP pin"] #[inline(always)] pub fn ewup(&mut self) -> EWUP_W { EWUP_W { w: self } } #[doc = "Bit 9 - Backup regulator enable"] #[inline(always)] pub fn bre(&mut self) -> BRE_W { BRE_W { w: self } } #[doc = "Bit 14 - Regulator voltage scaling output selection ready bit"] #[inline(always)] pub fn vosrdy(&mut self) -> VOSRDY_W { VOSRDY_W { w: self } } #[doc = "Bits 18:19 - Under-drive ready flag"] #[inline(always)] pub fn udrdy(&mut self) -> UDRDY_W { UDRDY_W { w: self } } }