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#[doc = "Reader of register CR2"] pub type R = crate::R<u32, super::CR2>; #[doc = "Writer for register CR2"] pub type W = crate::W<u32, super::CR2>; #[doc = "Register CR2 `reset()`'s with value 0"] impl crate::ResetValue for super::CR2 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "DMA last transfer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum LAST_A { #[doc = "0: Next DMA EOT is not the last transfer"] NOTLAST = 0, #[doc = "1: Next DMA EOT is the last transfer"] LAST = 1, } impl From<LAST_A> for bool { #[inline(always)] fn from(variant: LAST_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `LAST`"] pub type LAST_R = crate::R<bool, LAST_A>; impl LAST_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> LAST_A { match self.bits { false => LAST_A::NOTLAST, true => LAST_A::LAST, } } #[doc = "Checks if the value of the field is `NOTLAST`"] #[inline(always)] pub fn is_not_last(&self) -> bool { *self == LAST_A::NOTLAST } #[doc = "Checks if the value of the field is `LAST`"] #[inline(always)] pub fn is_last(&self) -> bool { *self == LAST_A::LAST } } #[doc = "Write proxy for field `LAST`"] pub struct LAST_W<'a> { w: &'a mut W, } impl<'a> LAST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LAST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Next DMA EOT is not the last transfer"] #[inline(always)] pub fn not_last(self) -> &'a mut W { self.variant(LAST_A::NOTLAST) } #[doc = "Next DMA EOT is the last transfer"] #[inline(always)] pub fn last(self) -> &'a mut W { self.variant(LAST_A::LAST) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "DMA requests enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum DMAEN_A { #[doc = "0: DMA requests disabled"] DISABLED = 0, #[doc = "1: DMA request enabled when TxE=1 or RxNE=1"] ENABLED = 1, } impl From<DMAEN_A> for bool { #[inline(always)] fn from(variant: DMAEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `DMAEN`"] pub type DMAEN_R = crate::R<bool, DMAEN_A>; impl DMAEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> DMAEN_A { match self.bits { false => DMAEN_A::DISABLED, true => DMAEN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == DMAEN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == DMAEN_A::ENABLED } } #[doc = "Write proxy for field `DMAEN`"] pub struct DMAEN_W<'a> { w: &'a mut W, } impl<'a> DMAEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: DMAEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "DMA requests disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DMAEN_A::DISABLED) } #[doc = "DMA request enabled when TxE=1 or RxNE=1"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Buffer interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ITBUFEN_A { #[doc = "0: TxE=1 or RxNE=1 does not generate any interrupt"] DISABLED = 0, #[doc = "1: TxE=1 or RxNE=1 generates Event interrupt"] ENABLED = 1, } impl From<ITBUFEN_A> for bool { #[inline(always)] fn from(variant: ITBUFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `ITBUFEN`"] pub type ITBUFEN_R = crate::R<bool, ITBUFEN_A>; impl ITBUFEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> ITBUFEN_A { match self.bits { false => ITBUFEN_A::DISABLED, true => ITBUFEN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == ITBUFEN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == ITBUFEN_A::ENABLED } } #[doc = "Write proxy for field `ITBUFEN`"] pub struct ITBUFEN_W<'a> { w: &'a mut W, } impl<'a> ITBUFEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ITBUFEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "TxE=1 or RxNE=1 does not generate any interrupt"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(ITBUFEN_A::DISABLED) } #[doc = "TxE=1 or RxNE=1 generates Event interrupt"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(ITBUFEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "Event interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ITEVTEN_A { #[doc = "0: Event interrupt disabled"] DISABLED = 0, #[doc = "1: Event interrupt enabled"] ENABLED = 1, } impl From<ITEVTEN_A> for bool { #[inline(always)] fn from(variant: ITEVTEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `ITEVTEN`"] pub type ITEVTEN_R = crate::R<bool, ITEVTEN_A>; impl ITEVTEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> ITEVTEN_A { match self.bits { false => ITEVTEN_A::DISABLED, true => ITEVTEN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == ITEVTEN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == ITEVTEN_A::ENABLED } } #[doc = "Write proxy for field `ITEVTEN`"] pub struct ITEVTEN_W<'a> { w: &'a mut W, } impl<'a> ITEVTEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ITEVTEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Event interrupt disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(ITEVTEN_A::DISABLED) } #[doc = "Event interrupt enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(ITEVTEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Error interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ITERREN_A { #[doc = "0: Error interrupt disabled"] DISABLED = 0, #[doc = "1: Error interrupt enabled"] ENABLED = 1, } impl From<ITERREN_A> for bool { #[inline(always)] fn from(variant: ITERREN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `ITERREN`"] pub type ITERREN_R = crate::R<bool, ITERREN_A>; impl ITERREN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> ITERREN_A { match self.bits { false => ITERREN_A::DISABLED, true => ITERREN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == ITERREN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == ITERREN_A::ENABLED } } #[doc = "Write proxy for field `ITERREN`"] pub struct ITERREN_W<'a> { w: &'a mut W, } impl<'a> ITERREN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ITERREN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Error interrupt disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(ITERREN_A::DISABLED) } #[doc = "Error interrupt enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(ITERREN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `FREQ`"] pub type FREQ_R = crate::R<u8, u8>; #[doc = "Write proxy for field `FREQ`"] pub struct FREQ_W<'a> { w: &'a mut W, } impl<'a> FREQ_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f); self.w } } impl R { #[doc = "Bit 12 - DMA last transfer"] #[inline(always)] pub fn last(&self) -> LAST_R { LAST_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - DMA requests enable"] #[inline(always)] pub fn dmaen(&self) -> DMAEN_R { DMAEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Buffer interrupt enable"] #[inline(always)] pub fn itbufen(&self) -> ITBUFEN_R { ITBUFEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Event interrupt enable"] #[inline(always)] pub fn itevten(&self) -> ITEVTEN_R { ITEVTEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Error interrupt enable"] #[inline(always)] pub fn iterren(&self) -> ITERREN_R { ITERREN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:5 - Peripheral clock frequency"] #[inline(always)] pub fn freq(&self) -> FREQ_R { FREQ_R::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bit 12 - DMA last transfer"] #[inline(always)] pub fn last(&mut self) -> LAST_W { LAST_W { w: self } } #[doc = "Bit 11 - DMA requests enable"] #[inline(always)] pub fn dmaen(&mut self) -> DMAEN_W { DMAEN_W { w: self } } #[doc = "Bit 10 - Buffer interrupt enable"] #[inline(always)] pub fn itbufen(&mut self) -> ITBUFEN_W { ITBUFEN_W { w: self } } #[doc = "Bit 9 - Event interrupt enable"] #[inline(always)] pub fn itevten(&mut self) -> ITEVTEN_W { ITEVTEN_W { w: self } } #[doc = "Bit 8 - Error interrupt enable"] #[inline(always)] pub fn iterren(&mut self) -> ITERREN_W { ITERREN_W { w: self } } #[doc = "Bits 0:5 - Peripheral clock frequency"] #[inline(always)] pub fn freq(&mut self) -> FREQ_W { FREQ_W { w: self } } }