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#[doc = "Writer for register EGR"] pub type W = crate::W<u32, super::EGR>; #[doc = "Register EGR `reset()`'s with value 0"] impl crate::ResetValue for super::EGR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Write proxy for field `TG`"] pub struct TG_W<'a> { w: &'a mut W, } impl<'a> TG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Write proxy for field `CC2G`"] pub struct CC2G_W<'a> { w: &'a mut W, } impl<'a> CC2G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Write proxy for field `CC1G`"] pub struct CC1G_W<'a> { w: &'a mut W, } impl<'a> CC1G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Update generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum UG_AW { #[doc = "1: Re-initializes the timer counter and generates an update of the registers."] UPDATE = 1, } impl From<UG_AW> for bool { #[inline(always)] fn from(variant: UG_AW) -> Self { variant as u8 != 0 } } #[doc = "Write proxy for field `UG`"] pub struct UG_W<'a> { w: &'a mut W, } impl<'a> UG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: UG_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Re-initializes the timer counter and generates an update of the registers."] #[inline(always)] pub fn update(self) -> &'a mut W { self.variant(UG_AW::UPDATE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl W { #[doc = "Bit 6 - Trigger generation"] #[inline(always)] pub fn tg(&mut self) -> TG_W { TG_W { w: self } } #[doc = "Bit 2 - Capture/compare 2 generation"] #[inline(always)] pub fn cc2g(&mut self) -> CC2G_W { CC2G_W { w: self } } #[doc = "Bit 1 - Capture/compare 1 generation"] #[inline(always)] pub fn cc1g(&mut self) -> CC1G_W { CC1G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn ug(&mut self) -> UG_W { UG_W { w: self } } }