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#[doc = "Reader of register HCFG"] pub type R = crate::R<u32, super::HCFG>; #[doc = "Writer for register HCFG"] pub type W = crate::W<u32, super::HCFG>; #[doc = "Register HCFG `reset()`'s with value 0"] impl crate::ResetValue for super::HCFG { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `FSLSPCS`"] pub type FSLSPCS_R = crate::R<u8, u8>; #[doc = "Write proxy for field `FSLSPCS`"] pub struct FSLSPCS_W<'a> { w: &'a mut W, } impl<'a> FSLSPCS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03); self.w } } #[doc = "Reader of field `FSLSS`"] pub type FSLSS_R = crate::R<bool, bool>; impl R { #[doc = "Bits 0:1 - FS/LS PHY clock select"] #[inline(always)] pub fn fslspcs(&self) -> FSLSPCS_R { FSLSPCS_R::new((self.bits & 0x03) as u8) } #[doc = "Bit 2 - FS- and LS-only support"] #[inline(always)] pub fn fslss(&self) -> FSLSS_R { FSLSS_R::new(((self.bits >> 2) & 0x01) != 0) } } impl W { #[doc = "Bits 0:1 - FS/LS PHY clock select"] #[inline(always)] pub fn fslspcs(&mut self) -> FSLSPCS_W { FSLSPCS_W { w: self } } }