Module psr

DSI Host PHY status register

Structs

PSRrs

DSI Host PHY status register

Type Aliases

PD_R

Field PD reader - PHY direction This bit indicates the status of phydirection D-PHY signal.

PSS0_R

Field PSS0 reader - PHY stop state lane 0 This bit indicates the status of phystopstate0lane D-PHY signal.

PSS1_R

Field PSS1 reader - PHY stop state lane 1 This bit indicates the status of phystopstate1lane D-PHY signal.

PSSC_R

Field PSSC reader - PHY stop state clock lane This bit indicates the status of phystopstateclklane D-PHY signal.

R

Register PSR reader

RUE0_R

Field RUE0 reader - RX ULPS escape lane 0 This bit indicates the status of rxulpsesc0lane D-PHY signal.

UAN0_R

Field UAN0 reader - ULPS active not lane 1 This bit indicates the status of ulpsactivenot0lane D-PHY signal.

UAN1_R

Field UAN1 reader - ULPS active not lane 1 This bit indicates the status of ulpsactivenot1lane D-PHY signal.

UANC_R

Field UANC reader - ULPS active not clock lane This bit indicates the status of ulpsactivenotclklane D-PHY signal.