stm32f4_staging/stm32f469/quadspi/
lptr.rs

1///Register `LPTR` reader
2pub type R = crate::R<LPTRrs>;
3///Register `LPTR` writer
4pub type W = crate::W<LPTRrs>;
5///Field `TIMEOUT` reader - Timeout period
6pub type TIMEOUT_R = crate::FieldReader<u16>;
7///Field `TIMEOUT` writer - Timeout period
8pub type TIMEOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16, crate::Safe>;
9impl R {
10    ///Bits 0:15 - Timeout period
11    #[inline(always)]
12    pub fn timeout(&self) -> TIMEOUT_R {
13        TIMEOUT_R::new((self.bits & 0xffff) as u16)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("LPTR")
19            .field("timeout", &self.timeout())
20            .finish()
21    }
22}
23impl W {
24    ///Bits 0:15 - Timeout period
25    #[inline(always)]
26    pub fn timeout(&mut self) -> TIMEOUT_W<LPTRrs> {
27        TIMEOUT_W::new(self, 0)
28    }
29}
30/**low-power timeout register
31
32You can [`read`](crate::Reg::read) this register and get [`lptr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lptr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
33
34See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F469.html#QUADSPI:LPTR)*/
35pub struct LPTRrs;
36impl crate::RegisterSpec for LPTRrs {
37    type Ux = u32;
38}
39///`read()` method returns [`lptr::R`](R) reader structure
40impl crate::Readable for LPTRrs {}
41///`write(|w| ..)` method takes [`lptr::W`](W) writer structure
42impl crate::Writable for LPTRrs {
43    type Safety = crate::Unsafe;
44}
45///`reset()` method sets LPTR to value 0
46impl crate::Resettable for LPTRrs {}
stm32f4_staging/stm32f469/quadspi/lptr.rs

stm32f4_staging/stm32f469/quadspi/
lptr.rs
