stm32f4_staging/stm32f469/dsi/
wier.rs

1///Register `WIER` reader
2pub type R = crate::R<WIERrs>;
3///Register `WIER` writer
4pub type W = crate::W<WIERrs>;
5/**Tearing effect interrupt enable This bit enables the tearing effect interrupt.
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum TEIE {
11    ///0: Tearing effect interrupt disabled
12    B0x0 = 0,
13    ///1: Tearing effect interrupt enabled
14    B0x1 = 1,
15}
16impl From<TEIE> for bool {
17    #[inline(always)]
18    fn from(variant: TEIE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `TEIE` reader - Tearing effect interrupt enable This bit enables the tearing effect interrupt.
23pub type TEIE_R = crate::BitReader<TEIE>;
24impl TEIE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> TEIE {
28        match self.bits {
29            false => TEIE::B0x0,
30            true => TEIE::B0x1,
31        }
32    }
33    ///Tearing effect interrupt disabled
34    #[inline(always)]
35    pub fn is_b_0x0(&self) -> bool {
36        *self == TEIE::B0x0
37    }
38    ///Tearing effect interrupt enabled
39    #[inline(always)]
40    pub fn is_b_0x1(&self) -> bool {
41        *self == TEIE::B0x1
42    }
43}
44///Field `TEIE` writer - Tearing effect interrupt enable This bit enables the tearing effect interrupt.
45pub type TEIE_W<'a, REG> = crate::BitWriter<'a, REG, TEIE>;
46impl<'a, REG> TEIE_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Tearing effect interrupt disabled
51    #[inline(always)]
52    pub fn b_0x0(self) -> &'a mut crate::W<REG> {
53        self.variant(TEIE::B0x0)
54    }
55    ///Tearing effect interrupt enabled
56    #[inline(always)]
57    pub fn b_0x1(self) -> &'a mut crate::W<REG> {
58        self.variant(TEIE::B0x1)
59    }
60}
61/**End of refresh interrupt enable This bit enables the end of refresh interrupt.
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum ERIE {
67    ///0: End of refresh interrupt disabled
68    B0x0 = 0,
69    ///1: End of refresh interrupt enabled
70    B0x1 = 1,
71}
72impl From<ERIE> for bool {
73    #[inline(always)]
74    fn from(variant: ERIE) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `ERIE` reader - End of refresh interrupt enable This bit enables the end of refresh interrupt.
79pub type ERIE_R = crate::BitReader<ERIE>;
80impl ERIE_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> ERIE {
84        match self.bits {
85            false => ERIE::B0x0,
86            true => ERIE::B0x1,
87        }
88    }
89    ///End of refresh interrupt disabled
90    #[inline(always)]
91    pub fn is_b_0x0(&self) -> bool {
92        *self == ERIE::B0x0
93    }
94    ///End of refresh interrupt enabled
95    #[inline(always)]
96    pub fn is_b_0x1(&self) -> bool {
97        *self == ERIE::B0x1
98    }
99}
100///Field `ERIE` writer - End of refresh interrupt enable This bit enables the end of refresh interrupt.
101pub type ERIE_W<'a, REG> = crate::BitWriter<'a, REG, ERIE>;
102impl<'a, REG> ERIE_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///End of refresh interrupt disabled
107    #[inline(always)]
108    pub fn b_0x0(self) -> &'a mut crate::W<REG> {
109        self.variant(ERIE::B0x0)
110    }
111    ///End of refresh interrupt enabled
112    #[inline(always)]
113    pub fn b_0x1(self) -> &'a mut crate::W<REG> {
114        self.variant(ERIE::B0x1)
115    }
116}
117/**PLL lock interrupt enable This bit enables the PLL lock interrupt.
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum PLLLIE {
123    ///0: PLL lock interrupt disabled
124    B0x0 = 0,
125    ///1: PLL lock interrupt enabled
126    B0x1 = 1,
127}
128impl From<PLLLIE> for bool {
129    #[inline(always)]
130    fn from(variant: PLLLIE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `PLLLIE` reader - PLL lock interrupt enable This bit enables the PLL lock interrupt.
135pub type PLLLIE_R = crate::BitReader<PLLLIE>;
136impl PLLLIE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> PLLLIE {
140        match self.bits {
141            false => PLLLIE::B0x0,
142            true => PLLLIE::B0x1,
143        }
144    }
145    ///PLL lock interrupt disabled
146    #[inline(always)]
147    pub fn is_b_0x0(&self) -> bool {
148        *self == PLLLIE::B0x0
149    }
150    ///PLL lock interrupt enabled
151    #[inline(always)]
152    pub fn is_b_0x1(&self) -> bool {
153        *self == PLLLIE::B0x1
154    }
155}
156///Field `PLLLIE` writer - PLL lock interrupt enable This bit enables the PLL lock interrupt.
157pub type PLLLIE_W<'a, REG> = crate::BitWriter<'a, REG, PLLLIE>;
158impl<'a, REG> PLLLIE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///PLL lock interrupt disabled
163    #[inline(always)]
164    pub fn b_0x0(self) -> &'a mut crate::W<REG> {
165        self.variant(PLLLIE::B0x0)
166    }
167    ///PLL lock interrupt enabled
168    #[inline(always)]
169    pub fn b_0x1(self) -> &'a mut crate::W<REG> {
170        self.variant(PLLLIE::B0x1)
171    }
172}
173/**PLL unlock interrupt enable This bit enables the PLL unlock interrupt.
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum PLLUIE {
179    ///0: PLL unlock interrupt disabled
180    B0x0 = 0,
181    ///1: PLL unlock interrupt enabled
182    B0x1 = 1,
183}
184impl From<PLLUIE> for bool {
185    #[inline(always)]
186    fn from(variant: PLLUIE) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `PLLUIE` reader - PLL unlock interrupt enable This bit enables the PLL unlock interrupt.
191pub type PLLUIE_R = crate::BitReader<PLLUIE>;
192impl PLLUIE_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> PLLUIE {
196        match self.bits {
197            false => PLLUIE::B0x0,
198            true => PLLUIE::B0x1,
199        }
200    }
201    ///PLL unlock interrupt disabled
202    #[inline(always)]
203    pub fn is_b_0x0(&self) -> bool {
204        *self == PLLUIE::B0x0
205    }
206    ///PLL unlock interrupt enabled
207    #[inline(always)]
208    pub fn is_b_0x1(&self) -> bool {
209        *self == PLLUIE::B0x1
210    }
211}
212///Field `PLLUIE` writer - PLL unlock interrupt enable This bit enables the PLL unlock interrupt.
213pub type PLLUIE_W<'a, REG> = crate::BitWriter<'a, REG, PLLUIE>;
214impl<'a, REG> PLLUIE_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///PLL unlock interrupt disabled
219    #[inline(always)]
220    pub fn b_0x0(self) -> &'a mut crate::W<REG> {
221        self.variant(PLLUIE::B0x0)
222    }
223    ///PLL unlock interrupt enabled
224    #[inline(always)]
225    pub fn b_0x1(self) -> &'a mut crate::W<REG> {
226        self.variant(PLLUIE::B0x1)
227    }
228}
229/**Regulator ready interrupt enable This bit enables the regulator ready interrupt.
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum RRIE {
235    ///0: Regulator ready interrupt disabled
236    B0x0 = 0,
237    ///1: Regulator ready interrupt enabled
238    B0x1 = 1,
239}
240impl From<RRIE> for bool {
241    #[inline(always)]
242    fn from(variant: RRIE) -> Self {
243        variant as u8 != 0
244    }
245}
246///Field `RRIE` reader - Regulator ready interrupt enable This bit enables the regulator ready interrupt.
247pub type RRIE_R = crate::BitReader<RRIE>;
248impl RRIE_R {
249    ///Get enumerated values variant
250    #[inline(always)]
251    pub const fn variant(&self) -> RRIE {
252        match self.bits {
253            false => RRIE::B0x0,
254            true => RRIE::B0x1,
255        }
256    }
257    ///Regulator ready interrupt disabled
258    #[inline(always)]
259    pub fn is_b_0x0(&self) -> bool {
260        *self == RRIE::B0x0
261    }
262    ///Regulator ready interrupt enabled
263    #[inline(always)]
264    pub fn is_b_0x1(&self) -> bool {
265        *self == RRIE::B0x1
266    }
267}
268///Field `RRIE` writer - Regulator ready interrupt enable This bit enables the regulator ready interrupt.
269pub type RRIE_W<'a, REG> = crate::BitWriter<'a, REG, RRIE>;
270impl<'a, REG> RRIE_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    ///Regulator ready interrupt disabled
275    #[inline(always)]
276    pub fn b_0x0(self) -> &'a mut crate::W<REG> {
277        self.variant(RRIE::B0x0)
278    }
279    ///Regulator ready interrupt enabled
280    #[inline(always)]
281    pub fn b_0x1(self) -> &'a mut crate::W<REG> {
282        self.variant(RRIE::B0x1)
283    }
284}
285impl R {
286    ///Bit 0 - Tearing effect interrupt enable This bit enables the tearing effect interrupt.
287    #[inline(always)]
288    pub fn teie(&self) -> TEIE_R {
289        TEIE_R::new((self.bits & 1) != 0)
290    }
291    ///Bit 1 - End of refresh interrupt enable This bit enables the end of refresh interrupt.
292    #[inline(always)]
293    pub fn erie(&self) -> ERIE_R {
294        ERIE_R::new(((self.bits >> 1) & 1) != 0)
295    }
296    ///Bit 9 - PLL lock interrupt enable This bit enables the PLL lock interrupt.
297    #[inline(always)]
298    pub fn plllie(&self) -> PLLLIE_R {
299        PLLLIE_R::new(((self.bits >> 9) & 1) != 0)
300    }
301    ///Bit 10 - PLL unlock interrupt enable This bit enables the PLL unlock interrupt.
302    #[inline(always)]
303    pub fn plluie(&self) -> PLLUIE_R {
304        PLLUIE_R::new(((self.bits >> 10) & 1) != 0)
305    }
306    ///Bit 13 - Regulator ready interrupt enable This bit enables the regulator ready interrupt.
307    #[inline(always)]
308    pub fn rrie(&self) -> RRIE_R {
309        RRIE_R::new(((self.bits >> 13) & 1) != 0)
310    }
311}
312impl core::fmt::Debug for R {
313    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
314        f.debug_struct("WIER")
315            .field("teie", &self.teie())
316            .field("erie", &self.erie())
317            .field("plllie", &self.plllie())
318            .field("plluie", &self.plluie())
319            .field("rrie", &self.rrie())
320            .finish()
321    }
322}
323impl W {
324    ///Bit 0 - Tearing effect interrupt enable This bit enables the tearing effect interrupt.
325    #[inline(always)]
326    pub fn teie(&mut self) -> TEIE_W<WIERrs> {
327        TEIE_W::new(self, 0)
328    }
329    ///Bit 1 - End of refresh interrupt enable This bit enables the end of refresh interrupt.
330    #[inline(always)]
331    pub fn erie(&mut self) -> ERIE_W<WIERrs> {
332        ERIE_W::new(self, 1)
333    }
334    ///Bit 9 - PLL lock interrupt enable This bit enables the PLL lock interrupt.
335    #[inline(always)]
336    pub fn plllie(&mut self) -> PLLLIE_W<WIERrs> {
337        PLLLIE_W::new(self, 9)
338    }
339    ///Bit 10 - PLL unlock interrupt enable This bit enables the PLL unlock interrupt.
340    #[inline(always)]
341    pub fn plluie(&mut self) -> PLLUIE_W<WIERrs> {
342        PLLUIE_W::new(self, 10)
343    }
344    ///Bit 13 - Regulator ready interrupt enable This bit enables the regulator ready interrupt.
345    #[inline(always)]
346    pub fn rrie(&mut self) -> RRIE_W<WIERrs> {
347        RRIE_W::new(self, 13)
348    }
349}
350/**DSI Wrapper interrupt enable register
351
352You can [`read`](crate::Reg::read) this register and get [`wier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
353
354See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F469.html#DSI:WIER)*/
355pub struct WIERrs;
356impl crate::RegisterSpec for WIERrs {
357    type Ux = u32;
358}
359///`read()` method returns [`wier::R`](R) reader structure
360impl crate::Readable for WIERrs {}
361///`write(|w| ..)` method takes [`wier::W`](W) writer structure
362impl crate::Writable for WIERrs {
363    type Safety = crate::Unsafe;
364}
365///`reset()` method sets WIER to value 0
366impl crate::Resettable for WIERrs {}
stm32f4_staging/stm32f469/dsi/wier.rs

stm32f4_staging/stm32f469/dsi/
wier.rs
