stm32f4_staging/stm32f469/dma2d/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5/**Start
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum START {
11    ///1: Launch the DMA2D
12    Start = 1,
13}
14impl From<START> for bool {
15    #[inline(always)]
16    fn from(variant: START) -> Self {
17        variant as u8 != 0
18    }
19}
20///Field `START` reader - Start
21pub type START_R = crate::BitReader<START>;
22impl START_R {
23    ///Get enumerated values variant
24    #[inline(always)]
25    pub const fn variant(&self) -> Option<START> {
26        match self.bits {
27            true => Some(START::Start),
28            _ => None,
29        }
30    }
31    ///Launch the DMA2D
32    #[inline(always)]
33    pub fn is_start(&self) -> bool {
34        *self == START::Start
35    }
36}
37///Field `START` writer - Start
38pub type START_W<'a, REG> = crate::BitWriter<'a, REG, START>;
39impl<'a, REG> START_W<'a, REG>
40where
41    REG: crate::Writable + crate::RegisterSpec,
42{
43    ///Launch the DMA2D
44    #[inline(always)]
45    pub fn start(self) -> &'a mut crate::W<REG> {
46        self.variant(START::Start)
47    }
48}
49/**Suspend
50
51Value on reset: 0*/
52#[cfg_attr(feature = "defmt", derive(defmt::Format))]
53#[derive(Clone, Copy, Debug, PartialEq, Eq)]
54pub enum SUSP {
55    ///0: Transfer not suspended
56    NotSuspended = 0,
57    ///1: Transfer suspended
58    Suspended = 1,
59}
60impl From<SUSP> for bool {
61    #[inline(always)]
62    fn from(variant: SUSP) -> Self {
63        variant as u8 != 0
64    }
65}
66///Field `SUSP` reader - Suspend
67pub type SUSP_R = crate::BitReader<SUSP>;
68impl SUSP_R {
69    ///Get enumerated values variant
70    #[inline(always)]
71    pub const fn variant(&self) -> SUSP {
72        match self.bits {
73            false => SUSP::NotSuspended,
74            true => SUSP::Suspended,
75        }
76    }
77    ///Transfer not suspended
78    #[inline(always)]
79    pub fn is_not_suspended(&self) -> bool {
80        *self == SUSP::NotSuspended
81    }
82    ///Transfer suspended
83    #[inline(always)]
84    pub fn is_suspended(&self) -> bool {
85        *self == SUSP::Suspended
86    }
87}
88///Field `SUSP` writer - Suspend
89pub type SUSP_W<'a, REG> = crate::BitWriter<'a, REG, SUSP>;
90impl<'a, REG> SUSP_W<'a, REG>
91where
92    REG: crate::Writable + crate::RegisterSpec,
93{
94    ///Transfer not suspended
95    #[inline(always)]
96    pub fn not_suspended(self) -> &'a mut crate::W<REG> {
97        self.variant(SUSP::NotSuspended)
98    }
99    ///Transfer suspended
100    #[inline(always)]
101    pub fn suspended(self) -> &'a mut crate::W<REG> {
102        self.variant(SUSP::Suspended)
103    }
104}
105/**Abort
106
107Value on reset: 0*/
108#[cfg_attr(feature = "defmt", derive(defmt::Format))]
109#[derive(Clone, Copy, Debug, PartialEq, Eq)]
110pub enum ABORT {
111    ///1: Transfer abort requested
112    AbortRequest = 1,
113}
114impl From<ABORT> for bool {
115    #[inline(always)]
116    fn from(variant: ABORT) -> Self {
117        variant as u8 != 0
118    }
119}
120///Field `ABORT` reader - Abort
121pub type ABORT_R = crate::BitReader<ABORT>;
122impl ABORT_R {
123    ///Get enumerated values variant
124    #[inline(always)]
125    pub const fn variant(&self) -> Option<ABORT> {
126        match self.bits {
127            true => Some(ABORT::AbortRequest),
128            _ => None,
129        }
130    }
131    ///Transfer abort requested
132    #[inline(always)]
133    pub fn is_abort_request(&self) -> bool {
134        *self == ABORT::AbortRequest
135    }
136}
137///Field `ABORT` writer - Abort
138pub type ABORT_W<'a, REG> = crate::BitWriter<'a, REG, ABORT>;
139impl<'a, REG> ABORT_W<'a, REG>
140where
141    REG: crate::Writable + crate::RegisterSpec,
142{
143    ///Transfer abort requested
144    #[inline(always)]
145    pub fn abort_request(self) -> &'a mut crate::W<REG> {
146        self.variant(ABORT::AbortRequest)
147    }
148}
149/**Transfer error interrupt enable
150
151Value on reset: 0*/
152#[cfg_attr(feature = "defmt", derive(defmt::Format))]
153#[derive(Clone, Copy, Debug, PartialEq, Eq)]
154pub enum TEIE {
155    ///0: TE interrupt disabled
156    Disabled = 0,
157    ///1: TE interrupt enabled
158    Enabled = 1,
159}
160impl From<TEIE> for bool {
161    #[inline(always)]
162    fn from(variant: TEIE) -> Self {
163        variant as u8 != 0
164    }
165}
166///Field `TEIE` reader - Transfer error interrupt enable
167pub type TEIE_R = crate::BitReader<TEIE>;
168impl TEIE_R {
169    ///Get enumerated values variant
170    #[inline(always)]
171    pub const fn variant(&self) -> TEIE {
172        match self.bits {
173            false => TEIE::Disabled,
174            true => TEIE::Enabled,
175        }
176    }
177    ///TE interrupt disabled
178    #[inline(always)]
179    pub fn is_disabled(&self) -> bool {
180        *self == TEIE::Disabled
181    }
182    ///TE interrupt enabled
183    #[inline(always)]
184    pub fn is_enabled(&self) -> bool {
185        *self == TEIE::Enabled
186    }
187}
188///Field `TEIE` writer - Transfer error interrupt enable
189pub type TEIE_W<'a, REG> = crate::BitWriter<'a, REG, TEIE>;
190impl<'a, REG> TEIE_W<'a, REG>
191where
192    REG: crate::Writable + crate::RegisterSpec,
193{
194    ///TE interrupt disabled
195    #[inline(always)]
196    pub fn disabled(self) -> &'a mut crate::W<REG> {
197        self.variant(TEIE::Disabled)
198    }
199    ///TE interrupt enabled
200    #[inline(always)]
201    pub fn enabled(self) -> &'a mut crate::W<REG> {
202        self.variant(TEIE::Enabled)
203    }
204}
205/**Transfer complete interrupt enable
206
207Value on reset: 0*/
208#[cfg_attr(feature = "defmt", derive(defmt::Format))]
209#[derive(Clone, Copy, Debug, PartialEq, Eq)]
210pub enum TCIE {
211    ///0: TC interrupt disabled
212    Disabled = 0,
213    ///1: TC interrupt enabled
214    Enabled = 1,
215}
216impl From<TCIE> for bool {
217    #[inline(always)]
218    fn from(variant: TCIE) -> Self {
219        variant as u8 != 0
220    }
221}
222///Field `TCIE` reader - Transfer complete interrupt enable
223pub type TCIE_R = crate::BitReader<TCIE>;
224impl TCIE_R {
225    ///Get enumerated values variant
226    #[inline(always)]
227    pub const fn variant(&self) -> TCIE {
228        match self.bits {
229            false => TCIE::Disabled,
230            true => TCIE::Enabled,
231        }
232    }
233    ///TC interrupt disabled
234    #[inline(always)]
235    pub fn is_disabled(&self) -> bool {
236        *self == TCIE::Disabled
237    }
238    ///TC interrupt enabled
239    #[inline(always)]
240    pub fn is_enabled(&self) -> bool {
241        *self == TCIE::Enabled
242    }
243}
244///Field `TCIE` writer - Transfer complete interrupt enable
245pub type TCIE_W<'a, REG> = crate::BitWriter<'a, REG, TCIE>;
246impl<'a, REG> TCIE_W<'a, REG>
247where
248    REG: crate::Writable + crate::RegisterSpec,
249{
250    ///TC interrupt disabled
251    #[inline(always)]
252    pub fn disabled(self) -> &'a mut crate::W<REG> {
253        self.variant(TCIE::Disabled)
254    }
255    ///TC interrupt enabled
256    #[inline(always)]
257    pub fn enabled(self) -> &'a mut crate::W<REG> {
258        self.variant(TCIE::Enabled)
259    }
260}
261/**Transfer watermark interrupt enable
262
263Value on reset: 0*/
264#[cfg_attr(feature = "defmt", derive(defmt::Format))]
265#[derive(Clone, Copy, Debug, PartialEq, Eq)]
266pub enum TWIE {
267    ///0: TW interrupt disabled
268    Disabled = 0,
269    ///1: TW interrupt enabled
270    Enabled = 1,
271}
272impl From<TWIE> for bool {
273    #[inline(always)]
274    fn from(variant: TWIE) -> Self {
275        variant as u8 != 0
276    }
277}
278///Field `TWIE` reader - Transfer watermark interrupt enable
279pub type TWIE_R = crate::BitReader<TWIE>;
280impl TWIE_R {
281    ///Get enumerated values variant
282    #[inline(always)]
283    pub const fn variant(&self) -> TWIE {
284        match self.bits {
285            false => TWIE::Disabled,
286            true => TWIE::Enabled,
287        }
288    }
289    ///TW interrupt disabled
290    #[inline(always)]
291    pub fn is_disabled(&self) -> bool {
292        *self == TWIE::Disabled
293    }
294    ///TW interrupt enabled
295    #[inline(always)]
296    pub fn is_enabled(&self) -> bool {
297        *self == TWIE::Enabled
298    }
299}
300///Field `TWIE` writer - Transfer watermark interrupt enable
301pub type TWIE_W<'a, REG> = crate::BitWriter<'a, REG, TWIE>;
302impl<'a, REG> TWIE_W<'a, REG>
303where
304    REG: crate::Writable + crate::RegisterSpec,
305{
306    ///TW interrupt disabled
307    #[inline(always)]
308    pub fn disabled(self) -> &'a mut crate::W<REG> {
309        self.variant(TWIE::Disabled)
310    }
311    ///TW interrupt enabled
312    #[inline(always)]
313    pub fn enabled(self) -> &'a mut crate::W<REG> {
314        self.variant(TWIE::Enabled)
315    }
316}
317/**CLUT access error interrupt enable
318
319Value on reset: 0*/
320#[cfg_attr(feature = "defmt", derive(defmt::Format))]
321#[derive(Clone, Copy, Debug, PartialEq, Eq)]
322pub enum CAEIE {
323    ///0: CAE interrupt disabled
324    Disabled = 0,
325    ///1: CAE interrupt enabled
326    Enabled = 1,
327}
328impl From<CAEIE> for bool {
329    #[inline(always)]
330    fn from(variant: CAEIE) -> Self {
331        variant as u8 != 0
332    }
333}
334///Field `CAEIE` reader - CLUT access error interrupt enable
335pub type CAEIE_R = crate::BitReader<CAEIE>;
336impl CAEIE_R {
337    ///Get enumerated values variant
338    #[inline(always)]
339    pub const fn variant(&self) -> CAEIE {
340        match self.bits {
341            false => CAEIE::Disabled,
342            true => CAEIE::Enabled,
343        }
344    }
345    ///CAE interrupt disabled
346    #[inline(always)]
347    pub fn is_disabled(&self) -> bool {
348        *self == CAEIE::Disabled
349    }
350    ///CAE interrupt enabled
351    #[inline(always)]
352    pub fn is_enabled(&self) -> bool {
353        *self == CAEIE::Enabled
354    }
355}
356///Field `CAEIE` writer - CLUT access error interrupt enable
357pub type CAEIE_W<'a, REG> = crate::BitWriter<'a, REG, CAEIE>;
358impl<'a, REG> CAEIE_W<'a, REG>
359where
360    REG: crate::Writable + crate::RegisterSpec,
361{
362    ///CAE interrupt disabled
363    #[inline(always)]
364    pub fn disabled(self) -> &'a mut crate::W<REG> {
365        self.variant(CAEIE::Disabled)
366    }
367    ///CAE interrupt enabled
368    #[inline(always)]
369    pub fn enabled(self) -> &'a mut crate::W<REG> {
370        self.variant(CAEIE::Enabled)
371    }
372}
373/**CLUT transfer complete interrupt enable
374
375Value on reset: 0*/
376#[cfg_attr(feature = "defmt", derive(defmt::Format))]
377#[derive(Clone, Copy, Debug, PartialEq, Eq)]
378pub enum CTCIE {
379    ///0: CTC interrupt disabled
380    Disabled = 0,
381    ///1: CTC interrupt enabled
382    Enabled = 1,
383}
384impl From<CTCIE> for bool {
385    #[inline(always)]
386    fn from(variant: CTCIE) -> Self {
387        variant as u8 != 0
388    }
389}
390///Field `CTCIE` reader - CLUT transfer complete interrupt enable
391pub type CTCIE_R = crate::BitReader<CTCIE>;
392impl CTCIE_R {
393    ///Get enumerated values variant
394    #[inline(always)]
395    pub const fn variant(&self) -> CTCIE {
396        match self.bits {
397            false => CTCIE::Disabled,
398            true => CTCIE::Enabled,
399        }
400    }
401    ///CTC interrupt disabled
402    #[inline(always)]
403    pub fn is_disabled(&self) -> bool {
404        *self == CTCIE::Disabled
405    }
406    ///CTC interrupt enabled
407    #[inline(always)]
408    pub fn is_enabled(&self) -> bool {
409        *self == CTCIE::Enabled
410    }
411}
412///Field `CTCIE` writer - CLUT transfer complete interrupt enable
413pub type CTCIE_W<'a, REG> = crate::BitWriter<'a, REG, CTCIE>;
414impl<'a, REG> CTCIE_W<'a, REG>
415where
416    REG: crate::Writable + crate::RegisterSpec,
417{
418    ///CTC interrupt disabled
419    #[inline(always)]
420    pub fn disabled(self) -> &'a mut crate::W<REG> {
421        self.variant(CTCIE::Disabled)
422    }
423    ///CTC interrupt enabled
424    #[inline(always)]
425    pub fn enabled(self) -> &'a mut crate::W<REG> {
426        self.variant(CTCIE::Enabled)
427    }
428}
429/**Configuration Error Interrupt Enable
430
431Value on reset: 0*/
432#[cfg_attr(feature = "defmt", derive(defmt::Format))]
433#[derive(Clone, Copy, Debug, PartialEq, Eq)]
434pub enum CEIE {
435    ///0: CE interrupt disabled
436    Disabled = 0,
437    ///1: CE interrupt enabled
438    Enabled = 1,
439}
440impl From<CEIE> for bool {
441    #[inline(always)]
442    fn from(variant: CEIE) -> Self {
443        variant as u8 != 0
444    }
445}
446///Field `CEIE` reader - Configuration Error Interrupt Enable
447pub type CEIE_R = crate::BitReader<CEIE>;
448impl CEIE_R {
449    ///Get enumerated values variant
450    #[inline(always)]
451    pub const fn variant(&self) -> CEIE {
452        match self.bits {
453            false => CEIE::Disabled,
454            true => CEIE::Enabled,
455        }
456    }
457    ///CE interrupt disabled
458    #[inline(always)]
459    pub fn is_disabled(&self) -> bool {
460        *self == CEIE::Disabled
461    }
462    ///CE interrupt enabled
463    #[inline(always)]
464    pub fn is_enabled(&self) -> bool {
465        *self == CEIE::Enabled
466    }
467}
468///Field `CEIE` writer - Configuration Error Interrupt Enable
469pub type CEIE_W<'a, REG> = crate::BitWriter<'a, REG, CEIE>;
470impl<'a, REG> CEIE_W<'a, REG>
471where
472    REG: crate::Writable + crate::RegisterSpec,
473{
474    ///CE interrupt disabled
475    #[inline(always)]
476    pub fn disabled(self) -> &'a mut crate::W<REG> {
477        self.variant(CEIE::Disabled)
478    }
479    ///CE interrupt enabled
480    #[inline(always)]
481    pub fn enabled(self) -> &'a mut crate::W<REG> {
482        self.variant(CEIE::Enabled)
483    }
484}
485/**DMA2D mode
486
487Value on reset: 0*/
488#[cfg_attr(feature = "defmt", derive(defmt::Format))]
489#[derive(Clone, Copy, Debug, PartialEq, Eq)]
490#[repr(u8)]
491pub enum MODE {
492    ///0: Memory-to-memory (FG fetch only)
493    MemoryToMemory = 0,
494    ///1: Memory-to-memory with PFC (FG fetch only with FG PFC active)
495    MemoryToMemoryPfc = 1,
496    ///2: Memory-to-memory with blending (FG and BG fetch with PFC and blending)
497    MemoryToMemoryPfcblending = 2,
498    ///3: Register-to-memory
499    RegisterToMemory = 3,
500}
501impl From<MODE> for u8 {
502    #[inline(always)]
503    fn from(variant: MODE) -> Self {
504        variant as _
505    }
506}
507impl crate::FieldSpec for MODE {
508    type Ux = u8;
509}
510impl crate::IsEnum for MODE {}
511///Field `MODE` reader - DMA2D mode
512pub type MODE_R = crate::FieldReader<MODE>;
513impl MODE_R {
514    ///Get enumerated values variant
515    #[inline(always)]
516    pub const fn variant(&self) -> MODE {
517        match self.bits {
518            0 => MODE::MemoryToMemory,
519            1 => MODE::MemoryToMemoryPfc,
520            2 => MODE::MemoryToMemoryPfcblending,
521            3 => MODE::RegisterToMemory,
522            _ => unreachable!(),
523        }
524    }
525    ///Memory-to-memory (FG fetch only)
526    #[inline(always)]
527    pub fn is_memory_to_memory(&self) -> bool {
528        *self == MODE::MemoryToMemory
529    }
530    ///Memory-to-memory with PFC (FG fetch only with FG PFC active)
531    #[inline(always)]
532    pub fn is_memory_to_memory_pfc(&self) -> bool {
533        *self == MODE::MemoryToMemoryPfc
534    }
535    ///Memory-to-memory with blending (FG and BG fetch with PFC and blending)
536    #[inline(always)]
537    pub fn is_memory_to_memory_pfcblending(&self) -> bool {
538        *self == MODE::MemoryToMemoryPfcblending
539    }
540    ///Register-to-memory
541    #[inline(always)]
542    pub fn is_register_to_memory(&self) -> bool {
543        *self == MODE::RegisterToMemory
544    }
545}
546///Field `MODE` writer - DMA2D mode
547pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE, crate::Safe>;
548impl<'a, REG> MODE_W<'a, REG>
549where
550    REG: crate::Writable + crate::RegisterSpec,
551    REG::Ux: From<u8>,
552{
553    ///Memory-to-memory (FG fetch only)
554    #[inline(always)]
555    pub fn memory_to_memory(self) -> &'a mut crate::W<REG> {
556        self.variant(MODE::MemoryToMemory)
557    }
558    ///Memory-to-memory with PFC (FG fetch only with FG PFC active)
559    #[inline(always)]
560    pub fn memory_to_memory_pfc(self) -> &'a mut crate::W<REG> {
561        self.variant(MODE::MemoryToMemoryPfc)
562    }
563    ///Memory-to-memory with blending (FG and BG fetch with PFC and blending)
564    #[inline(always)]
565    pub fn memory_to_memory_pfcblending(self) -> &'a mut crate::W<REG> {
566        self.variant(MODE::MemoryToMemoryPfcblending)
567    }
568    ///Register-to-memory
569    #[inline(always)]
570    pub fn register_to_memory(self) -> &'a mut crate::W<REG> {
571        self.variant(MODE::RegisterToMemory)
572    }
573}
574impl R {
575    ///Bit 0 - Start
576    #[inline(always)]
577    pub fn start(&self) -> START_R {
578        START_R::new((self.bits & 1) != 0)
579    }
580    ///Bit 1 - Suspend
581    #[inline(always)]
582    pub fn susp(&self) -> SUSP_R {
583        SUSP_R::new(((self.bits >> 1) & 1) != 0)
584    }
585    ///Bit 2 - Abort
586    #[inline(always)]
587    pub fn abort(&self) -> ABORT_R {
588        ABORT_R::new(((self.bits >> 2) & 1) != 0)
589    }
590    ///Bit 8 - Transfer error interrupt enable
591    #[inline(always)]
592    pub fn teie(&self) -> TEIE_R {
593        TEIE_R::new(((self.bits >> 8) & 1) != 0)
594    }
595    ///Bit 9 - Transfer complete interrupt enable
596    #[inline(always)]
597    pub fn tcie(&self) -> TCIE_R {
598        TCIE_R::new(((self.bits >> 9) & 1) != 0)
599    }
600    ///Bit 10 - Transfer watermark interrupt enable
601    #[inline(always)]
602    pub fn twie(&self) -> TWIE_R {
603        TWIE_R::new(((self.bits >> 10) & 1) != 0)
604    }
605    ///Bit 11 - CLUT access error interrupt enable
606    #[inline(always)]
607    pub fn caeie(&self) -> CAEIE_R {
608        CAEIE_R::new(((self.bits >> 11) & 1) != 0)
609    }
610    ///Bit 12 - CLUT transfer complete interrupt enable
611    #[inline(always)]
612    pub fn ctcie(&self) -> CTCIE_R {
613        CTCIE_R::new(((self.bits >> 12) & 1) != 0)
614    }
615    ///Bit 13 - Configuration Error Interrupt Enable
616    #[inline(always)]
617    pub fn ceie(&self) -> CEIE_R {
618        CEIE_R::new(((self.bits >> 13) & 1) != 0)
619    }
620    ///Bits 16:17 - DMA2D mode
621    #[inline(always)]
622    pub fn mode(&self) -> MODE_R {
623        MODE_R::new(((self.bits >> 16) & 3) as u8)
624    }
625}
626impl core::fmt::Debug for R {
627    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
628        f.debug_struct("CR")
629            .field("mode", &self.mode())
630            .field("ceie", &self.ceie())
631            .field("ctcie", &self.ctcie())
632            .field("caeie", &self.caeie())
633            .field("twie", &self.twie())
634            .field("tcie", &self.tcie())
635            .field("teie", &self.teie())
636            .field("abort", &self.abort())
637            .field("susp", &self.susp())
638            .field("start", &self.start())
639            .finish()
640    }
641}
642impl W {
643    ///Bit 0 - Start
644    #[inline(always)]
645    pub fn start(&mut self) -> START_W<CRrs> {
646        START_W::new(self, 0)
647    }
648    ///Bit 1 - Suspend
649    #[inline(always)]
650    pub fn susp(&mut self) -> SUSP_W<CRrs> {
651        SUSP_W::new(self, 1)
652    }
653    ///Bit 2 - Abort
654    #[inline(always)]
655    pub fn abort(&mut self) -> ABORT_W<CRrs> {
656        ABORT_W::new(self, 2)
657    }
658    ///Bit 8 - Transfer error interrupt enable
659    #[inline(always)]
660    pub fn teie(&mut self) -> TEIE_W<CRrs> {
661        TEIE_W::new(self, 8)
662    }
663    ///Bit 9 - Transfer complete interrupt enable
664    #[inline(always)]
665    pub fn tcie(&mut self) -> TCIE_W<CRrs> {
666        TCIE_W::new(self, 9)
667    }
668    ///Bit 10 - Transfer watermark interrupt enable
669    #[inline(always)]
670    pub fn twie(&mut self) -> TWIE_W<CRrs> {
671        TWIE_W::new(self, 10)
672    }
673    ///Bit 11 - CLUT access error interrupt enable
674    #[inline(always)]
675    pub fn caeie(&mut self) -> CAEIE_W<CRrs> {
676        CAEIE_W::new(self, 11)
677    }
678    ///Bit 12 - CLUT transfer complete interrupt enable
679    #[inline(always)]
680    pub fn ctcie(&mut self) -> CTCIE_W<CRrs> {
681        CTCIE_W::new(self, 12)
682    }
683    ///Bit 13 - Configuration Error Interrupt Enable
684    #[inline(always)]
685    pub fn ceie(&mut self) -> CEIE_W<CRrs> {
686        CEIE_W::new(self, 13)
687    }
688    ///Bits 16:17 - DMA2D mode
689    #[inline(always)]
690    pub fn mode(&mut self) -> MODE_W<CRrs> {
691        MODE_W::new(self, 16)
692    }
693}
694/**control register
695
696You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
697
698See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F469.html#DMA2D:CR)*/
699pub struct CRrs;
700impl crate::RegisterSpec for CRrs {
701    type Ux = u32;
702}
703///`read()` method returns [`cr::R`](R) reader structure
704impl crate::Readable for CRrs {}
705///`write(|w| ..)` method takes [`cr::W`](W) writer structure
706impl crate::Writable for CRrs {
707    type Safety = crate::Unsafe;
708}
709///`reset()` method sets CR to value 0
710impl crate::Resettable for CRrs {}
stm32f4_staging/stm32f469/dma2d/cr.rs

stm32f4_staging/stm32f469/dma2d/
cr.rs
