stm32f4_staging/stm32f413/sdio/dtimer.rs
1///Register `DTIMER` reader
2pub type R = crate::R<DTIMERrs>;
3///Register `DTIMER` writer
4pub type W = crate::W<DTIMERrs>;
5///Field `DATATIME` reader - Data timeout period
6pub type DATATIME_R = crate::FieldReader<u32>;
7///Field `DATATIME` writer - Data timeout period
8pub type DATATIME_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32, crate::Safe>;
9impl R {
10 ///Bits 0:31 - Data timeout period
11 #[inline(always)]
12 pub fn datatime(&self) -> DATATIME_R {
13 DATATIME_R::new(self.bits)
14 }
15}
16impl core::fmt::Debug for R {
17 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18 f.debug_struct("DTIMER")
19 .field("datatime", &self.datatime())
20 .finish()
21 }
22}
23impl W {
24 ///Bits 0:31 - Data timeout period
25 #[inline(always)]
26 pub fn datatime(&mut self) -> DATATIME_W<DTIMERrs> {
27 DATATIME_W::new(self, 0)
28 }
29}
30/**data timer register
31
32You can [`read`](crate::Reg::read) this register and get [`dtimer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtimer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
33
34See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F413.html#SDIO:DTIMER)*/
35pub struct DTIMERrs;
36impl crate::RegisterSpec for DTIMERrs {
37 type Ux = u32;
38}
39///`read()` method returns [`dtimer::R`](R) reader structure
40impl crate::Readable for DTIMERrs {}
41///`write(|w| ..)` method takes [`dtimer::W`](W) writer structure
42impl crate::Writable for DTIMERrs {
43 type Safety = crate::Safe;
44}
45///`reset()` method sets DTIMER to value 0
46impl crate::Resettable for DTIMERrs {}