stm32f4_staging/stm32f413/fmpi2c1/
timeoutr.rs

1///Register `TIMEOUTR` reader
2pub type R = crate::R<TIMEOUTRrs>;
3///Register `TIMEOUTR` writer
4pub type W = crate::W<TIMEOUTRrs>;
5///Field `TIMEOUTA` reader - TIMEOUTA
6pub type TIMEOUTA_R = crate::FieldReader<u16>;
7///Field `TIMEOUTA` writer - TIMEOUTA
8pub type TIMEOUTA_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16, crate::Safe>;
9/**TIDLE
10
11Value on reset: 0*/
12#[cfg_attr(feature = "defmt", derive(defmt::Format))]
13#[derive(Clone, Copy, Debug, PartialEq, Eq)]
14pub enum TIDLE {
15    ///0: TIMEOUTA is used to detect SCL low timeout
16    Disabled = 0,
17    ///1: TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition)
18    Enabled = 1,
19}
20impl From<TIDLE> for bool {
21    #[inline(always)]
22    fn from(variant: TIDLE) -> Self {
23        variant as u8 != 0
24    }
25}
26///Field `TIDLE` reader - TIDLE
27pub type TIDLE_R = crate::BitReader<TIDLE>;
28impl TIDLE_R {
29    ///Get enumerated values variant
30    #[inline(always)]
31    pub const fn variant(&self) -> TIDLE {
32        match self.bits {
33            false => TIDLE::Disabled,
34            true => TIDLE::Enabled,
35        }
36    }
37    ///TIMEOUTA is used to detect SCL low timeout
38    #[inline(always)]
39    pub fn is_disabled(&self) -> bool {
40        *self == TIDLE::Disabled
41    }
42    ///TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition)
43    #[inline(always)]
44    pub fn is_enabled(&self) -> bool {
45        *self == TIDLE::Enabled
46    }
47}
48///Field `TIDLE` writer - TIDLE
49pub type TIDLE_W<'a, REG> = crate::BitWriter<'a, REG, TIDLE>;
50impl<'a, REG> TIDLE_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    ///TIMEOUTA is used to detect SCL low timeout
55    #[inline(always)]
56    pub fn disabled(self) -> &'a mut crate::W<REG> {
57        self.variant(TIDLE::Disabled)
58    }
59    ///TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition)
60    #[inline(always)]
61    pub fn enabled(self) -> &'a mut crate::W<REG> {
62        self.variant(TIDLE::Enabled)
63    }
64}
65/**TIMOUTEN
66
67Value on reset: 0*/
68#[cfg_attr(feature = "defmt", derive(defmt::Format))]
69#[derive(Clone, Copy, Debug, PartialEq, Eq)]
70pub enum TIMOUTEN {
71    ///0: SCL timeout detection is disabled
72    Disabled = 0,
73    ///1: SCL timeout detection is enabled
74    Enabled = 1,
75}
76impl From<TIMOUTEN> for bool {
77    #[inline(always)]
78    fn from(variant: TIMOUTEN) -> Self {
79        variant as u8 != 0
80    }
81}
82///Field `TIMOUTEN` reader - TIMOUTEN
83pub type TIMOUTEN_R = crate::BitReader<TIMOUTEN>;
84impl TIMOUTEN_R {
85    ///Get enumerated values variant
86    #[inline(always)]
87    pub const fn variant(&self) -> TIMOUTEN {
88        match self.bits {
89            false => TIMOUTEN::Disabled,
90            true => TIMOUTEN::Enabled,
91        }
92    }
93    ///SCL timeout detection is disabled
94    #[inline(always)]
95    pub fn is_disabled(&self) -> bool {
96        *self == TIMOUTEN::Disabled
97    }
98    ///SCL timeout detection is enabled
99    #[inline(always)]
100    pub fn is_enabled(&self) -> bool {
101        *self == TIMOUTEN::Enabled
102    }
103}
104///Field `TIMOUTEN` writer - TIMOUTEN
105pub type TIMOUTEN_W<'a, REG> = crate::BitWriter<'a, REG, TIMOUTEN>;
106impl<'a, REG> TIMOUTEN_W<'a, REG>
107where
108    REG: crate::Writable + crate::RegisterSpec,
109{
110    ///SCL timeout detection is disabled
111    #[inline(always)]
112    pub fn disabled(self) -> &'a mut crate::W<REG> {
113        self.variant(TIMOUTEN::Disabled)
114    }
115    ///SCL timeout detection is enabled
116    #[inline(always)]
117    pub fn enabled(self) -> &'a mut crate::W<REG> {
118        self.variant(TIMOUTEN::Enabled)
119    }
120}
121///Field `TIMEOUTB` reader - TIMEOUTB
122pub type TIMEOUTB_R = crate::FieldReader<u16>;
123///Field `TIMEOUTB` writer - TIMEOUTB
124pub type TIMEOUTB_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16, crate::Safe>;
125/**TEXTEN
126
127Value on reset: 0*/
128#[cfg_attr(feature = "defmt", derive(defmt::Format))]
129#[derive(Clone, Copy, Debug, PartialEq, Eq)]
130pub enum TEXTEN {
131    ///0: Extended clock timeout detection is disabled
132    Disabled = 0,
133    ///1: Extended clock timeout detection is enabled
134    Enabled = 1,
135}
136impl From<TEXTEN> for bool {
137    #[inline(always)]
138    fn from(variant: TEXTEN) -> Self {
139        variant as u8 != 0
140    }
141}
142///Field `TEXTEN` reader - TEXTEN
143pub type TEXTEN_R = crate::BitReader<TEXTEN>;
144impl TEXTEN_R {
145    ///Get enumerated values variant
146    #[inline(always)]
147    pub const fn variant(&self) -> TEXTEN {
148        match self.bits {
149            false => TEXTEN::Disabled,
150            true => TEXTEN::Enabled,
151        }
152    }
153    ///Extended clock timeout detection is disabled
154    #[inline(always)]
155    pub fn is_disabled(&self) -> bool {
156        *self == TEXTEN::Disabled
157    }
158    ///Extended clock timeout detection is enabled
159    #[inline(always)]
160    pub fn is_enabled(&self) -> bool {
161        *self == TEXTEN::Enabled
162    }
163}
164///Field `TEXTEN` writer - TEXTEN
165pub type TEXTEN_W<'a, REG> = crate::BitWriter<'a, REG, TEXTEN>;
166impl<'a, REG> TEXTEN_W<'a, REG>
167where
168    REG: crate::Writable + crate::RegisterSpec,
169{
170    ///Extended clock timeout detection is disabled
171    #[inline(always)]
172    pub fn disabled(self) -> &'a mut crate::W<REG> {
173        self.variant(TEXTEN::Disabled)
174    }
175    ///Extended clock timeout detection is enabled
176    #[inline(always)]
177    pub fn enabled(self) -> &'a mut crate::W<REG> {
178        self.variant(TEXTEN::Enabled)
179    }
180}
181impl R {
182    ///Bits 0:11 - TIMEOUTA
183    #[inline(always)]
184    pub fn timeouta(&self) -> TIMEOUTA_R {
185        TIMEOUTA_R::new((self.bits & 0x0fff) as u16)
186    }
187    ///Bit 12 - TIDLE
188    #[inline(always)]
189    pub fn tidle(&self) -> TIDLE_R {
190        TIDLE_R::new(((self.bits >> 12) & 1) != 0)
191    }
192    ///Bit 15 - TIMOUTEN
193    #[inline(always)]
194    pub fn timouten(&self) -> TIMOUTEN_R {
195        TIMOUTEN_R::new(((self.bits >> 15) & 1) != 0)
196    }
197    ///Bits 16:27 - TIMEOUTB
198    #[inline(always)]
199    pub fn timeoutb(&self) -> TIMEOUTB_R {
200        TIMEOUTB_R::new(((self.bits >> 16) & 0x0fff) as u16)
201    }
202    ///Bit 31 - TEXTEN
203    #[inline(always)]
204    pub fn texten(&self) -> TEXTEN_R {
205        TEXTEN_R::new(((self.bits >> 31) & 1) != 0)
206    }
207}
208impl core::fmt::Debug for R {
209    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
210        f.debug_struct("TIMEOUTR")
211            .field("timeouta", &self.timeouta())
212            .field("tidle", &self.tidle())
213            .field("timouten", &self.timouten())
214            .field("timeoutb", &self.timeoutb())
215            .field("texten", &self.texten())
216            .finish()
217    }
218}
219impl W {
220    ///Bits 0:11 - TIMEOUTA
221    #[inline(always)]
222    pub fn timeouta(&mut self) -> TIMEOUTA_W<TIMEOUTRrs> {
223        TIMEOUTA_W::new(self, 0)
224    }
225    ///Bit 12 - TIDLE
226    #[inline(always)]
227    pub fn tidle(&mut self) -> TIDLE_W<TIMEOUTRrs> {
228        TIDLE_W::new(self, 12)
229    }
230    ///Bit 15 - TIMOUTEN
231    #[inline(always)]
232    pub fn timouten(&mut self) -> TIMOUTEN_W<TIMEOUTRrs> {
233        TIMOUTEN_W::new(self, 15)
234    }
235    ///Bits 16:27 - TIMEOUTB
236    #[inline(always)]
237    pub fn timeoutb(&mut self) -> TIMEOUTB_W<TIMEOUTRrs> {
238        TIMEOUTB_W::new(self, 16)
239    }
240    ///Bit 31 - TEXTEN
241    #[inline(always)]
242    pub fn texten(&mut self) -> TEXTEN_W<TIMEOUTRrs> {
243        TEXTEN_W::new(self, 31)
244    }
245}
246/**Timeout register
247
248You can [`read`](crate::Reg::read) this register and get [`timeoutr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timeoutr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
249
250See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F413.html#FMPI2C1:TIMEOUTR)*/
251pub struct TIMEOUTRrs;
252impl crate::RegisterSpec for TIMEOUTRrs {
253    type Ux = u32;
254}
255///`read()` method returns [`timeoutr::R`](R) reader structure
256impl crate::Readable for TIMEOUTRrs {}
257///`write(|w| ..)` method takes [`timeoutr::W`](W) writer structure
258impl crate::Writable for TIMEOUTRrs {
259    type Safety = crate::Unsafe;
260}
261///`reset()` method sets TIMEOUTR to value 0
262impl crate::Resettable for TIMEOUTRrs {}
stm32f4_staging/stm32f413/fmpi2c1/timeoutr.rs

stm32f4_staging/stm32f413/fmpi2c1/
timeoutr.rs
