stm32f4_staging/stm32f407/
uart4.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    sr: SR,
6    _reserved1: [u8; 0x02],
7    dr: DR,
8    _reserved2: [u8; 0x02],
9    brr: BRR,
10    _reserved3: [u8; 0x02],
11    cr1: CR1,
12    _reserved4: [u8; 0x02],
13    cr2: CR2,
14    _reserved5: [u8; 0x02],
15    cr3: CR3,
16    _reserved6: [u8; 0x02],
17    gtpr: GTPR,
18}
19impl RegisterBlock {
20    ///0x00 - Status register
21    #[inline(always)]
22    pub const fn sr(&self) -> &SR {
23        &self.sr
24    }
25    ///0x04 - Data register
26    #[inline(always)]
27    pub const fn dr(&self) -> &DR {
28        &self.dr
29    }
30    ///0x08 - Baud rate register
31    #[inline(always)]
32    pub const fn brr(&self) -> &BRR {
33        &self.brr
34    }
35    ///0x0c - Control register 1
36    #[inline(always)]
37    pub const fn cr1(&self) -> &CR1 {
38        &self.cr1
39    }
40    ///0x10 - Control register 2
41    #[inline(always)]
42    pub const fn cr2(&self) -> &CR2 {
43        &self.cr2
44    }
45    ///0x14 - Control register 3
46    #[inline(always)]
47    pub const fn cr3(&self) -> &CR3 {
48        &self.cr3
49    }
50    ///0x18 - Guard Time and Prescaler Register
51    #[inline(always)]
52    pub const fn gtpr(&self) -> &GTPR {
53        &self.gtpr
54    }
55}
56/**SR (rw) register accessor: Status register
57
58You can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
59
60See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#UART4:SR)
61
62For information about available fields see [`mod@sr`] module*/
63pub type SR = crate::Reg<sr::SRrs>;
64///Status register
65pub mod sr;
66pub use crate::stm32f407::usart1::brr;
67pub use crate::stm32f407::usart1::cr1;
68pub use crate::stm32f407::usart1::dr;
69pub use crate::stm32f407::usart1::BRR;
70pub use crate::stm32f407::usart1::CR1;
71pub use crate::stm32f407::usart1::DR;
72/**CR2 (rw) register accessor: Control register 2
73
74You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
75
76See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#UART4:CR2)
77
78For information about available fields see [`mod@cr2`] module*/
79pub type CR2 = crate::Reg<cr2::CR2rs>;
80///Control register 2
81pub mod cr2;
82/**CR3 (rw) register accessor: Control register 3
83
84You can [`read`](crate::Reg::read) this register and get [`cr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
85
86See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#UART4:CR3)
87
88For information about available fields see [`mod@cr3`] module*/
89pub type CR3 = crate::Reg<cr3::CR3rs>;
90///Control register 3
91pub mod cr3;
92/**GTPR (rw) register accessor: Guard Time and Prescaler Register
93
94You can [`read`](crate::Reg::read) this register and get [`gtpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gtpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
95
96See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#UART4:GTPR)
97
98For information about available fields see [`mod@gtpr`] module*/
99pub type GTPR = crate::Reg<gtpr::GTPRrs>;
100///Guard Time and Prescaler Register
101pub mod gtpr;
stm32f4_staging/stm32f407/uart4.rs

stm32f4_staging/stm32f407/
uart4.rs
