stm32f4_staging/stm32f407/spi1.rs
1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5 cr1: CR1,
6 _reserved1: [u8; 0x02],
7 cr2: CR2,
8 _reserved2: [u8; 0x02],
9 sr: SR,
10 _reserved3: [u8; 0x02],
11 _reserved_3_dr: [u8; 0x02],
12 _reserved4: [u8; 0x02],
13 crcpr: CRCPR,
14 _reserved5: [u8; 0x02],
15 rxcrcr: RXCRCR,
16 _reserved6: [u8; 0x02],
17 txcrcr: TXCRCR,
18 _reserved7: [u8; 0x02],
19 i2scfgr: I2SCFGR,
20 _reserved8: [u8; 0x02],
21 i2spr: I2SPR,
22}
23impl RegisterBlock {
24 ///0x00 - control register 1
25 #[inline(always)]
26 pub const fn cr1(&self) -> &CR1 {
27 &self.cr1
28 }
29 ///0x04 - control register 2
30 #[inline(always)]
31 pub const fn cr2(&self) -> &CR2 {
32 &self.cr2
33 }
34 ///0x08 - status register
35 #[inline(always)]
36 pub const fn sr(&self) -> &SR {
37 &self.sr
38 }
39 ///0x0c - Direct 8-bit access to data register
40 #[inline(always)]
41 pub const fn dr8(&self) -> &DR8 {
42 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
43 }
44 ///0x0c - data register
45 #[inline(always)]
46 pub const fn dr(&self) -> &DR {
47 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
48 }
49 ///0x10 - CRC polynomial register
50 #[inline(always)]
51 pub const fn crcpr(&self) -> &CRCPR {
52 &self.crcpr
53 }
54 ///0x14 - RX CRC register
55 #[inline(always)]
56 pub const fn rxcrcr(&self) -> &RXCRCR {
57 &self.rxcrcr
58 }
59 ///0x18 - TX CRC register
60 #[inline(always)]
61 pub const fn txcrcr(&self) -> &TXCRCR {
62 &self.txcrcr
63 }
64 ///0x1c - I2S configuration register
65 #[inline(always)]
66 pub const fn i2scfgr(&self) -> &I2SCFGR {
67 &self.i2scfgr
68 }
69 ///0x20 - I2S prescaler register
70 #[inline(always)]
71 pub const fn i2spr(&self) -> &I2SPR {
72 &self.i2spr
73 }
74}
75/**CR1 (rw) register accessor: control register 1
76
77You can [`read`](crate::Reg::read) this register and get [`cr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:CR1)
80
81For information about available fields see [`mod@cr1`] module*/
82pub type CR1 = crate::Reg<cr1::CR1rs>;
83///control register 1
84pub mod cr1;
85/**CR2 (rw) register accessor: control register 2
86
87You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
88
89See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:CR2)
90
91For information about available fields see [`mod@cr2`] module*/
92pub type CR2 = crate::Reg<cr2::CR2rs>;
93///control register 2
94pub mod cr2;
95/**SR (rw) register accessor: status register
96
97You can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
98
99See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:SR)
100
101For information about available fields see [`mod@sr`] module*/
102pub type SR = crate::Reg<sr::SRrs>;
103///status register
104pub mod sr;
105/**DR (rw) register accessor: data register
106
107You can [`read`](crate::Reg::read) this register and get [`dr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
108
109See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:DR)
110
111For information about available fields see [`mod@dr`] module*/
112pub type DR = crate::Reg<dr::DRrs>;
113///data register
114pub mod dr;
115/**DR8 (rw) register accessor: Direct 8-bit access to data register
116
117You can [`read`](crate::Reg::read) this register and get [`dr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
118
119See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:DR8)
120
121For information about available fields see [`mod@dr8`] module*/
122pub type DR8 = crate::Reg<dr8::DR8rs>;
123///Direct 8-bit access to data register
124pub mod dr8;
125/**CRCPR (rw) register accessor: CRC polynomial register
126
127You can [`read`](crate::Reg::read) this register and get [`crcpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
128
129See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:CRCPR)
130
131For information about available fields see [`mod@crcpr`] module*/
132pub type CRCPR = crate::Reg<crcpr::CRCPRrs>;
133///CRC polynomial register
134pub mod crcpr;
135/**RXCRCR (r) register accessor: RX CRC register
136
137You can [`read`](crate::Reg::read) this register and get [`rxcrcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
138
139See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:RXCRCR)
140
141For information about available fields see [`mod@rxcrcr`] module*/
142pub type RXCRCR = crate::Reg<rxcrcr::RXCRCRrs>;
143///RX CRC register
144pub mod rxcrcr;
145/**TXCRCR (r) register accessor: TX CRC register
146
147You can [`read`](crate::Reg::read) this register and get [`txcrcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
148
149See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:TXCRCR)
150
151For information about available fields see [`mod@txcrcr`] module*/
152pub type TXCRCR = crate::Reg<txcrcr::TXCRCRrs>;
153///TX CRC register
154pub mod txcrcr;
155/**I2SCFGR (rw) register accessor: I2S configuration register
156
157You can [`read`](crate::Reg::read) this register and get [`i2scfgr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2scfgr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
158
159See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:I2SCFGR)
160
161For information about available fields see [`mod@i2scfgr`] module*/
162pub type I2SCFGR = crate::Reg<i2scfgr::I2SCFGRrs>;
163///I2S configuration register
164pub mod i2scfgr;
165/**I2SPR (rw) register accessor: I2S prescaler register
166
167You can [`read`](crate::Reg::read) this register and get [`i2spr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2spr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
168
169See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:I2SPR)
170
171For information about available fields see [`mod@i2spr`] module*/
172pub type I2SPR = crate::Reg<i2spr::I2SPRrs>;
173///I2S prescaler register
174pub mod i2spr;