stm32f4_staging/stm32f407/
gpioa.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    moder: MODER,
6    otyper: OTYPER,
7    ospeedr: OSPEEDR,
8    pupdr: PUPDR,
9    idr: IDR,
10    odr: ODR,
11    bsrr: BSRR,
12    lckr: LCKR,
13    afrl: AFRL,
14    afrh: AFRH,
15}
16impl RegisterBlock {
17    ///0x00 - GPIO port mode register
18    #[inline(always)]
19    pub const fn moder(&self) -> &MODER {
20        &self.moder
21    }
22    ///0x04 - GPIO port output type register
23    #[inline(always)]
24    pub const fn otyper(&self) -> &OTYPER {
25        &self.otyper
26    }
27    ///0x08 - GPIO port output speed register
28    #[inline(always)]
29    pub const fn ospeedr(&self) -> &OSPEEDR {
30        &self.ospeedr
31    }
32    ///0x0c - GPIO port pull-up/pull-down register
33    #[inline(always)]
34    pub const fn pupdr(&self) -> &PUPDR {
35        &self.pupdr
36    }
37    ///0x10 - GPIO port input data register
38    #[inline(always)]
39    pub const fn idr(&self) -> &IDR {
40        &self.idr
41    }
42    ///0x14 - GPIO port output data register
43    #[inline(always)]
44    pub const fn odr(&self) -> &ODR {
45        &self.odr
46    }
47    ///0x18 - GPIO port bit set/reset register
48    #[inline(always)]
49    pub const fn bsrr(&self) -> &BSRR {
50        &self.bsrr
51    }
52    ///0x1c - GPIO port configuration lock register
53    #[inline(always)]
54    pub const fn lckr(&self) -> &LCKR {
55        &self.lckr
56    }
57    ///0x20 - GPIO alternate function low register
58    #[inline(always)]
59    pub const fn afrl(&self) -> &AFRL {
60        &self.afrl
61    }
62    ///0x24 - GPIO alternate function high register
63    #[inline(always)]
64    pub const fn afrh(&self) -> &AFRH {
65        &self.afrh
66    }
67}
68/**MODER (rw) register accessor: GPIO port mode register
69
70You can [`read`](crate::Reg::read) this register and get [`moder::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moder::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
71
72See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:MODER)
73
74For information about available fields see [`mod@moder`] module*/
75pub type MODER = crate::Reg<moder::MODERrs>;
76///GPIO port mode register
77pub mod moder;
78/**OTYPER (rw) register accessor: GPIO port output type register
79
80You can [`read`](crate::Reg::read) this register and get [`otyper::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`otyper::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
81
82See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:OTYPER)
83
84For information about available fields see [`mod@otyper`] module*/
85pub type OTYPER = crate::Reg<otyper::OTYPERrs>;
86///GPIO port output type register
87pub mod otyper;
88/**OSPEEDR (rw) register accessor: GPIO port output speed register
89
90You can [`read`](crate::Reg::read) this register and get [`ospeedr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ospeedr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
91
92See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:OSPEEDR)
93
94For information about available fields see [`mod@ospeedr`] module*/
95pub type OSPEEDR = crate::Reg<ospeedr::OSPEEDRrs>;
96///GPIO port output speed register
97pub mod ospeedr;
98/**PUPDR (rw) register accessor: GPIO port pull-up/pull-down register
99
100You can [`read`](crate::Reg::read) this register and get [`pupdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pupdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
101
102See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:PUPDR)
103
104For information about available fields see [`mod@pupdr`] module*/
105pub type PUPDR = crate::Reg<pupdr::PUPDRrs>;
106///GPIO port pull-up/pull-down register
107pub mod pupdr;
108/**IDR (r) register accessor: GPIO port input data register
109
110You can [`read`](crate::Reg::read) this register and get [`idr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
111
112See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:IDR)
113
114For information about available fields see [`mod@idr`] module*/
115pub type IDR = crate::Reg<idr::IDRrs>;
116///GPIO port input data register
117pub mod idr;
118/**ODR (rw) register accessor: GPIO port output data register
119
120You can [`read`](crate::Reg::read) this register and get [`odr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`odr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
121
122See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:ODR)
123
124For information about available fields see [`mod@odr`] module*/
125pub type ODR = crate::Reg<odr::ODRrs>;
126///GPIO port output data register
127pub mod odr;
128/**BSRR (w) register accessor: GPIO port bit set/reset register
129
130You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bsrr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
131
132See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:BSRR)
133
134For information about available fields see [`mod@bsrr`] module*/
135pub type BSRR = crate::Reg<bsrr::BSRRrs>;
136///GPIO port bit set/reset register
137pub mod bsrr;
138/**LCKR (rw) register accessor: GPIO port configuration lock register
139
140You can [`read`](crate::Reg::read) this register and get [`lckr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lckr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
141
142See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:LCKR)
143
144For information about available fields see [`mod@lckr`] module*/
145pub type LCKR = crate::Reg<lckr::LCKRrs>;
146///GPIO port configuration lock register
147pub mod lckr;
148/**AFRL (rw) register accessor: GPIO alternate function low register
149
150You can [`read`](crate::Reg::read) this register and get [`afrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`afrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
151
152See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:AFRL)
153
154For information about available fields see [`mod@afrl`] module*/
155pub type AFRL = crate::Reg<afrl::AFRLrs>;
156///GPIO alternate function low register
157pub mod afrl;
158/**AFRH (rw) register accessor: GPIO alternate function high register
159
160You can [`read`](crate::Reg::read) this register and get [`afrh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`afrh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
161
162See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#GPIOA:AFRH)
163
164For information about available fields see [`mod@afrh`] module*/
165pub type AFRH = crate::Reg<afrh::AFRHrs>;
166///GPIO alternate function high register
167pub mod afrh;
stm32f4_staging/stm32f407/gpioa.rs

stm32f4_staging/stm32f407/
gpioa.rs
