stm32f4_staging/stm32f401/syscfg/
pmc.rs

1///Register `PMC` reader
2pub type R = crate::R<PMCrs>;
3///Register `PMC` writer
4pub type W = crate::W<PMCrs>;
5///Field `ADC1DC2` reader - ADC1DC2
6pub type ADC1DC2_R = crate::BitReader;
7///Field `ADC1DC2` writer - ADC1DC2
8pub type ADC1DC2_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    ///Bit 16 - ADC1DC2
11    #[inline(always)]
12    pub fn adc1dc2(&self) -> ADC1DC2_R {
13        ADC1DC2_R::new(((self.bits >> 16) & 1) != 0)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("PMC")
19            .field("adc1dc2", &self.adc1dc2())
20            .finish()
21    }
22}
23impl W {
24    ///Bit 16 - ADC1DC2
25    #[inline(always)]
26    pub fn adc1dc2(&mut self) -> ADC1DC2_W<PMCrs> {
27        ADC1DC2_W::new(self, 16)
28    }
29}
30/**peripheral mode configuration register
31
32You can [`read`](crate::Reg::read) this register and get [`pmc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
33
34See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SYSCFG:PMC)*/
35pub struct PMCrs;
36impl crate::RegisterSpec for PMCrs {
37    type Ux = u32;
38}
39///`read()` method returns [`pmc::R`](R) reader structure
40impl crate::Readable for PMCrs {}
41///`write(|w| ..)` method takes [`pmc::W`](W) writer structure
42impl crate::Writable for PMCrs {
43    type Safety = crate::Unsafe;
44}
45///`reset()` method sets PMC to value 0
46impl crate::Resettable for PMCrs {}
stm32f4_staging/stm32f401/syscfg/pmc.rs

stm32f4_staging/stm32f401/syscfg/
pmc.rs
