stm32f4_staging/stm32f401/
sdio.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    power: POWER,
6    clkcr: CLKCR,
7    arg: ARG,
8    cmd: CMD,
9    respcmd: RESPCMD,
10    resp: [RESP; 4],
11    dtimer: DTIMER,
12    dlen: DLEN,
13    dctrl: DCTRL,
14    dcount: DCOUNT,
15    sta: STA,
16    icr: ICR,
17    mask: MASK,
18    _reserved13: [u8; 0x08],
19    fifocnt: FIFOCNT,
20    _reserved14: [u8; 0x34],
21    fifo: FIFO,
22}
23impl RegisterBlock {
24    ///0x00 - power control register
25    #[inline(always)]
26    pub const fn power(&self) -> &POWER {
27        &self.power
28    }
29    ///0x04 - SDI clock control register
30    #[inline(always)]
31    pub const fn clkcr(&self) -> &CLKCR {
32        &self.clkcr
33    }
34    ///0x08 - argument register
35    #[inline(always)]
36    pub const fn arg(&self) -> &ARG {
37        &self.arg
38    }
39    ///0x0c - command register
40    #[inline(always)]
41    pub const fn cmd(&self) -> &CMD {
42        &self.cmd
43    }
44    ///0x10 - command response register
45    #[inline(always)]
46    pub const fn respcmd(&self) -> &RESPCMD {
47        &self.respcmd
48    }
49    ///0x14..0x24 - SDIO response %s register
50    ///
51    ///<div class="warning">`n` is the index of register in the array. `n == 0` corresponds to `RESP1` register.</div>
52    #[inline(always)]
53    pub const fn resp(&self, n: usize) -> &RESP {
54        &self.resp[n]
55    }
56    ///Iterator for array of:
57    ///0x14..0x24 - SDIO response %s register
58    #[inline(always)]
59    pub fn resp_iter(&self) -> impl Iterator<Item = &RESP> {
60        self.resp.iter()
61    }
62    ///0x14 - SDIO response 1 register
63    #[inline(always)]
64    pub const fn resp1(&self) -> &RESP {
65        self.resp(0)
66    }
67    ///0x18 - SDIO response 2 register
68    #[inline(always)]
69    pub const fn resp2(&self) -> &RESP {
70        self.resp(1)
71    }
72    ///0x1c - SDIO response 3 register
73    #[inline(always)]
74    pub const fn resp3(&self) -> &RESP {
75        self.resp(2)
76    }
77    ///0x20 - SDIO response 4 register
78    #[inline(always)]
79    pub const fn resp4(&self) -> &RESP {
80        self.resp(3)
81    }
82    ///0x24 - data timer register
83    #[inline(always)]
84    pub const fn dtimer(&self) -> &DTIMER {
85        &self.dtimer
86    }
87    ///0x28 - data length register
88    #[inline(always)]
89    pub const fn dlen(&self) -> &DLEN {
90        &self.dlen
91    }
92    ///0x2c - data control register
93    #[inline(always)]
94    pub const fn dctrl(&self) -> &DCTRL {
95        &self.dctrl
96    }
97    ///0x30 - data counter register
98    #[inline(always)]
99    pub const fn dcount(&self) -> &DCOUNT {
100        &self.dcount
101    }
102    ///0x34 - status register
103    #[inline(always)]
104    pub const fn sta(&self) -> &STA {
105        &self.sta
106    }
107    ///0x38 - interrupt clear register
108    #[inline(always)]
109    pub const fn icr(&self) -> &ICR {
110        &self.icr
111    }
112    ///0x3c - mask register
113    #[inline(always)]
114    pub const fn mask(&self) -> &MASK {
115        &self.mask
116    }
117    ///0x48 - FIFO counter register
118    #[inline(always)]
119    pub const fn fifocnt(&self) -> &FIFOCNT {
120        &self.fifocnt
121    }
122    ///0x80 - data FIFO register
123    #[inline(always)]
124    pub const fn fifo(&self) -> &FIFO {
125        &self.fifo
126    }
127}
128/**POWER (rw) register accessor: power control register
129
130You can [`read`](crate::Reg::read) this register and get [`power::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`power::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
131
132See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:POWER)
133
134For information about available fields see [`mod@power`] module*/
135pub type POWER = crate::Reg<power::POWERrs>;
136///power control register
137pub mod power;
138/**CLKCR (rw) register accessor: SDI clock control register
139
140You can [`read`](crate::Reg::read) this register and get [`clkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
141
142See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:CLKCR)
143
144For information about available fields see [`mod@clkcr`] module*/
145pub type CLKCR = crate::Reg<clkcr::CLKCRrs>;
146///SDI clock control register
147pub mod clkcr;
148/**ARG (rw) register accessor: argument register
149
150You can [`read`](crate::Reg::read) this register and get [`arg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
151
152See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:ARG)
153
154For information about available fields see [`mod@arg`] module*/
155pub type ARG = crate::Reg<arg::ARGrs>;
156///argument register
157pub mod arg;
158/**CMD (rw) register accessor: command register
159
160You can [`read`](crate::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
161
162See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:CMD)
163
164For information about available fields see [`mod@cmd`] module*/
165pub type CMD = crate::Reg<cmd::CMDrs>;
166///command register
167pub mod cmd;
168/**RESPCMD (r) register accessor: command response register
169
170You can [`read`](crate::Reg::read) this register and get [`respcmd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
171
172See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:RESPCMD)
173
174For information about available fields see [`mod@respcmd`] module*/
175pub type RESPCMD = crate::Reg<respcmd::RESPCMDrs>;
176///command response register
177pub mod respcmd;
178/**RESP (r) register accessor: SDIO response %s register
179
180You can [`read`](crate::Reg::read) this register and get [`resp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
181
182See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:RESP[1])
183
184For information about available fields see [`mod@resp`] module*/
185pub type RESP = crate::Reg<resp::RESPrs>;
186///SDIO response %s register
187pub mod resp;
188/**DTIMER (rw) register accessor: data timer register
189
190You can [`read`](crate::Reg::read) this register and get [`dtimer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtimer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
191
192See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:DTIMER)
193
194For information about available fields see [`mod@dtimer`] module*/
195pub type DTIMER = crate::Reg<dtimer::DTIMERrs>;
196///data timer register
197pub mod dtimer;
198/**DLEN (rw) register accessor: data length register
199
200You can [`read`](crate::Reg::read) this register and get [`dlen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dlen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
201
202See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:DLEN)
203
204For information about available fields see [`mod@dlen`] module*/
205pub type DLEN = crate::Reg<dlen::DLENrs>;
206///data length register
207pub mod dlen;
208/**DCTRL (rw) register accessor: data control register
209
210You can [`read`](crate::Reg::read) this register and get [`dctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
211
212See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:DCTRL)
213
214For information about available fields see [`mod@dctrl`] module*/
215pub type DCTRL = crate::Reg<dctrl::DCTRLrs>;
216///data control register
217pub mod dctrl;
218/**DCOUNT (r) register accessor: data counter register
219
220You can [`read`](crate::Reg::read) this register and get [`dcount::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
221
222See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:DCOUNT)
223
224For information about available fields see [`mod@dcount`] module*/
225pub type DCOUNT = crate::Reg<dcount::DCOUNTrs>;
226///data counter register
227pub mod dcount;
228/**STA (r) register accessor: status register
229
230You can [`read`](crate::Reg::read) this register and get [`sta::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
231
232See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:STA)
233
234For information about available fields see [`mod@sta`] module*/
235pub type STA = crate::Reg<sta::STArs>;
236///status register
237pub mod sta;
238/**ICR (rw) register accessor: interrupt clear register
239
240You can [`read`](crate::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
241
242See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:ICR)
243
244For information about available fields see [`mod@icr`] module*/
245pub type ICR = crate::Reg<icr::ICRrs>;
246///interrupt clear register
247pub mod icr;
248/**MASK (rw) register accessor: mask register
249
250You can [`read`](crate::Reg::read) this register and get [`mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
251
252See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:MASK)
253
254For information about available fields see [`mod@mask`] module*/
255pub type MASK = crate::Reg<mask::MASKrs>;
256///mask register
257pub mod mask;
258/**FIFOCNT (r) register accessor: FIFO counter register
259
260You can [`read`](crate::Reg::read) this register and get [`fifocnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
261
262See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:FIFOCNT)
263
264For information about available fields see [`mod@fifocnt`] module*/
265pub type FIFOCNT = crate::Reg<fifocnt::FIFOCNTrs>;
266///FIFO counter register
267pub mod fifocnt;
268/**FIFO (rw) register accessor: data FIFO register
269
270You can [`read`](crate::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
271
272See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#SDIO:FIFO)
273
274For information about available fields see [`mod@fifo`] module*/
275pub type FIFO = crate::Reg<fifo::FIFOrs>;
276///data FIFO register
277pub mod fifo;
stm32f4_staging/stm32f401/sdio.rs

stm32f4_staging/stm32f401/
sdio.rs
