stm32f4_staging/stm32f401/i2c1/
trise.rs

1///Register `TRISE` reader
2pub type R = crate::R<TRISErs>;
3///Register `TRISE` writer
4pub type W = crate::W<TRISErs>;
5///Field `TRISE` reader - Maximum rise time in Fast/Standard mode (Master mode)
6pub type TRISE_R = crate::FieldReader;
7///Field `TRISE` writer - Maximum rise time in Fast/Standard mode (Master mode)
8pub type TRISE_W<'a, REG> = crate::FieldWriter<'a, REG, 6, u8, crate::Safe>;
9impl R {
10    ///Bits 0:5 - Maximum rise time in Fast/Standard mode (Master mode)
11    #[inline(always)]
12    pub fn trise(&self) -> TRISE_R {
13        TRISE_R::new((self.bits & 0x3f) as u8)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("TRISE")
19            .field("trise", &self.trise())
20            .finish()
21    }
22}
23impl W {
24    ///Bits 0:5 - Maximum rise time in Fast/Standard mode (Master mode)
25    #[inline(always)]
26    pub fn trise(&mut self) -> TRISE_W<TRISErs> {
27        TRISE_W::new(self, 0)
28    }
29}
30/**TRISE register
31
32You can [`read`](crate::Reg::read) this register and get [`trise::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trise::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
33
34See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#I2C1:TRISE)*/
35pub struct TRISErs;
36impl crate::RegisterSpec for TRISErs {
37    type Ux = u16;
38}
39///`read()` method returns [`trise::R`](R) reader structure
40impl crate::Readable for TRISErs {}
41///`write(|w| ..)` method takes [`trise::W`](W) writer structure
42impl crate::Writable for TRISErs {
43    type Safety = crate::Unsafe;
44}
45///`reset()` method sets TRISE to value 0x02
46impl crate::Resettable for TRISErs {
47    const RESET_VALUE: u16 = 0x02;
48}
stm32f4_staging/stm32f401/i2c1/trise.rs

stm32f4_staging/stm32f401/i2c1/
trise.rs
