stm32f4_staging/stm32f401/flash/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5/**End of operation
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum EOPR {
11    ///0: No error
12    Inactive = 0,
13    ///1: One or more Flash operations has/have completed successfully
14    Active = 1,
15}
16impl From<EOPR> for bool {
17    #[inline(always)]
18    fn from(variant: EOPR) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `EOP` reader - End of operation
23pub type EOP_R = crate::BitReader<EOPR>;
24impl EOP_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> EOPR {
28        match self.bits {
29            false => EOPR::Inactive,
30            true => EOPR::Active,
31        }
32    }
33    ///No error
34    #[inline(always)]
35    pub fn is_inactive(&self) -> bool {
36        *self == EOPR::Inactive
37    }
38    ///One or more Flash operations has/have completed successfully
39    #[inline(always)]
40    pub fn is_active(&self) -> bool {
41        *self == EOPR::Active
42    }
43}
44/**End of operation
45
46Value on reset: 0*/
47#[cfg_attr(feature = "defmt", derive(defmt::Format))]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum EOPW {
50    ///1: Clear error flag
51    Clear = 1,
52}
53impl From<EOPW> for bool {
54    #[inline(always)]
55    fn from(variant: EOPW) -> Self {
56        variant as u8 != 0
57    }
58}
59///Field `EOP` writer - End of operation
60pub type EOP_W<'a, REG> = crate::BitWriter1C<'a, REG, EOPW>;
61impl<'a, REG> EOP_W<'a, REG>
62where
63    REG: crate::Writable + crate::RegisterSpec,
64{
65    ///Clear error flag
66    #[inline(always)]
67    pub fn clear(self) -> &'a mut crate::W<REG> {
68        self.variant(EOPW::Clear)
69    }
70}
71/**Operation error
72
73Value on reset: 0*/
74#[cfg_attr(feature = "defmt", derive(defmt::Format))]
75#[derive(Clone, Copy, Debug, PartialEq, Eq)]
76pub enum OPERRR {
77    ///0: No error
78    Inactive = 0,
79    ///1: A Flash operation request is detected and cannot be run because of parallelism
80    Active = 1,
81}
82impl From<OPERRR> for bool {
83    #[inline(always)]
84    fn from(variant: OPERRR) -> Self {
85        variant as u8 != 0
86    }
87}
88///Field `OPERR` reader - Operation error
89pub type OPERR_R = crate::BitReader<OPERRR>;
90impl OPERR_R {
91    ///Get enumerated values variant
92    #[inline(always)]
93    pub const fn variant(&self) -> OPERRR {
94        match self.bits {
95            false => OPERRR::Inactive,
96            true => OPERRR::Active,
97        }
98    }
99    ///No error
100    #[inline(always)]
101    pub fn is_inactive(&self) -> bool {
102        *self == OPERRR::Inactive
103    }
104    ///A Flash operation request is detected and cannot be run because of parallelism
105    #[inline(always)]
106    pub fn is_active(&self) -> bool {
107        *self == OPERRR::Active
108    }
109}
110/**Operation error
111
112Value on reset: 0*/
113#[cfg_attr(feature = "defmt", derive(defmt::Format))]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum OPERRW {
116    ///1: Clear error flag
117    Clear = 1,
118}
119impl From<OPERRW> for bool {
120    #[inline(always)]
121    fn from(variant: OPERRW) -> Self {
122        variant as u8 != 0
123    }
124}
125///Field `OPERR` writer - Operation error
126pub type OPERR_W<'a, REG> = crate::BitWriter1C<'a, REG, OPERRW>;
127impl<'a, REG> OPERR_W<'a, REG>
128where
129    REG: crate::Writable + crate::RegisterSpec,
130{
131    ///Clear error flag
132    #[inline(always)]
133    pub fn clear(self) -> &'a mut crate::W<REG> {
134        self.variant(OPERRW::Clear)
135    }
136}
137/**Write protection error
138
139Value on reset: 0*/
140#[cfg_attr(feature = "defmt", derive(defmt::Format))]
141#[derive(Clone, Copy, Debug, PartialEq, Eq)]
142pub enum WRPERRR {
143    ///0: No error
144    Inactive = 0,
145    ///1: The address to be erased/programmed belongs to a write-protected part of the Flash memory
146    Active = 1,
147}
148impl From<WRPERRR> for bool {
149    #[inline(always)]
150    fn from(variant: WRPERRR) -> Self {
151        variant as u8 != 0
152    }
153}
154///Field `WRPERR` reader - Write protection error
155pub type WRPERR_R = crate::BitReader<WRPERRR>;
156impl WRPERR_R {
157    ///Get enumerated values variant
158    #[inline(always)]
159    pub const fn variant(&self) -> WRPERRR {
160        match self.bits {
161            false => WRPERRR::Inactive,
162            true => WRPERRR::Active,
163        }
164    }
165    ///No error
166    #[inline(always)]
167    pub fn is_inactive(&self) -> bool {
168        *self == WRPERRR::Inactive
169    }
170    ///The address to be erased/programmed belongs to a write-protected part of the Flash memory
171    #[inline(always)]
172    pub fn is_active(&self) -> bool {
173        *self == WRPERRR::Active
174    }
175}
176/**Write protection error
177
178Value on reset: 0*/
179#[cfg_attr(feature = "defmt", derive(defmt::Format))]
180#[derive(Clone, Copy, Debug, PartialEq, Eq)]
181pub enum WRPERRW {
182    ///1: Clear error flag
183    Clear = 1,
184}
185impl From<WRPERRW> for bool {
186    #[inline(always)]
187    fn from(variant: WRPERRW) -> Self {
188        variant as u8 != 0
189    }
190}
191///Field `WRPERR` writer - Write protection error
192pub type WRPERR_W<'a, REG> = crate::BitWriter1C<'a, REG, WRPERRW>;
193impl<'a, REG> WRPERR_W<'a, REG>
194where
195    REG: crate::Writable + crate::RegisterSpec,
196{
197    ///Clear error flag
198    #[inline(always)]
199    pub fn clear(self) -> &'a mut crate::W<REG> {
200        self.variant(WRPERRW::Clear)
201    }
202}
203/**Programming alignment error
204
205Value on reset: 0*/
206#[cfg_attr(feature = "defmt", derive(defmt::Format))]
207#[derive(Clone, Copy, Debug, PartialEq, Eq)]
208pub enum PGAERRR {
209    ///0: No error
210    Inactive = 0,
211    ///1: The data to program cannot be contained in the same 128-bit Flash memory row
212    Active = 1,
213}
214impl From<PGAERRR> for bool {
215    #[inline(always)]
216    fn from(variant: PGAERRR) -> Self {
217        variant as u8 != 0
218    }
219}
220///Field `PGAERR` reader - Programming alignment error
221pub type PGAERR_R = crate::BitReader<PGAERRR>;
222impl PGAERR_R {
223    ///Get enumerated values variant
224    #[inline(always)]
225    pub const fn variant(&self) -> PGAERRR {
226        match self.bits {
227            false => PGAERRR::Inactive,
228            true => PGAERRR::Active,
229        }
230    }
231    ///No error
232    #[inline(always)]
233    pub fn is_inactive(&self) -> bool {
234        *self == PGAERRR::Inactive
235    }
236    ///The data to program cannot be contained in the same 128-bit Flash memory row
237    #[inline(always)]
238    pub fn is_active(&self) -> bool {
239        *self == PGAERRR::Active
240    }
241}
242/**Programming alignment error
243
244Value on reset: 0*/
245#[cfg_attr(feature = "defmt", derive(defmt::Format))]
246#[derive(Clone, Copy, Debug, PartialEq, Eq)]
247pub enum PGAERRW {
248    ///1: Clear error flag
249    Clear = 1,
250}
251impl From<PGAERRW> for bool {
252    #[inline(always)]
253    fn from(variant: PGAERRW) -> Self {
254        variant as u8 != 0
255    }
256}
257///Field `PGAERR` writer - Programming alignment error
258pub type PGAERR_W<'a, REG> = crate::BitWriter1C<'a, REG, PGAERRW>;
259impl<'a, REG> PGAERR_W<'a, REG>
260where
261    REG: crate::Writable + crate::RegisterSpec,
262{
263    ///Clear error flag
264    #[inline(always)]
265    pub fn clear(self) -> &'a mut crate::W<REG> {
266        self.variant(PGAERRW::Clear)
267    }
268}
269/**Programming parallelism error
270
271Value on reset: 0*/
272#[cfg_attr(feature = "defmt", derive(defmt::Format))]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum PGPERRR {
275    ///0: No error
276    Inactive = 0,
277    ///1: The size of the access during the program sequence doesn't correspond to the parallelism configuration PSIZE
278    Active = 1,
279}
280impl From<PGPERRR> for bool {
281    #[inline(always)]
282    fn from(variant: PGPERRR) -> Self {
283        variant as u8 != 0
284    }
285}
286///Field `PGPERR` reader - Programming parallelism error
287pub type PGPERR_R = crate::BitReader<PGPERRR>;
288impl PGPERR_R {
289    ///Get enumerated values variant
290    #[inline(always)]
291    pub const fn variant(&self) -> PGPERRR {
292        match self.bits {
293            false => PGPERRR::Inactive,
294            true => PGPERRR::Active,
295        }
296    }
297    ///No error
298    #[inline(always)]
299    pub fn is_inactive(&self) -> bool {
300        *self == PGPERRR::Inactive
301    }
302    ///The size of the access during the program sequence doesn't correspond to the parallelism configuration PSIZE
303    #[inline(always)]
304    pub fn is_active(&self) -> bool {
305        *self == PGPERRR::Active
306    }
307}
308/**Programming parallelism error
309
310Value on reset: 0*/
311#[cfg_attr(feature = "defmt", derive(defmt::Format))]
312#[derive(Clone, Copy, Debug, PartialEq, Eq)]
313pub enum PGPERRW {
314    ///1: Clear error flag
315    Clear = 1,
316}
317impl From<PGPERRW> for bool {
318    #[inline(always)]
319    fn from(variant: PGPERRW) -> Self {
320        variant as u8 != 0
321    }
322}
323///Field `PGPERR` writer - Programming parallelism error
324pub type PGPERR_W<'a, REG> = crate::BitWriter1C<'a, REG, PGPERRW>;
325impl<'a, REG> PGPERR_W<'a, REG>
326where
327    REG: crate::Writable + crate::RegisterSpec,
328{
329    ///Clear error flag
330    #[inline(always)]
331    pub fn clear(self) -> &'a mut crate::W<REG> {
332        self.variant(PGPERRW::Clear)
333    }
334}
335/**Programming sequence error
336
337Value on reset: 0*/
338#[cfg_attr(feature = "defmt", derive(defmt::Format))]
339#[derive(Clone, Copy, Debug, PartialEq, Eq)]
340pub enum PGSERRR {
341    ///0: No error
342    Inactive = 0,
343    ///1: A write access to the Flash memory is performed by the code while the control register has not been correctly configured
344    Active = 1,
345}
346impl From<PGSERRR> for bool {
347    #[inline(always)]
348    fn from(variant: PGSERRR) -> Self {
349        variant as u8 != 0
350    }
351}
352///Field `PGSERR` reader - Programming sequence error
353pub type PGSERR_R = crate::BitReader<PGSERRR>;
354impl PGSERR_R {
355    ///Get enumerated values variant
356    #[inline(always)]
357    pub const fn variant(&self) -> PGSERRR {
358        match self.bits {
359            false => PGSERRR::Inactive,
360            true => PGSERRR::Active,
361        }
362    }
363    ///No error
364    #[inline(always)]
365    pub fn is_inactive(&self) -> bool {
366        *self == PGSERRR::Inactive
367    }
368    ///A write access to the Flash memory is performed by the code while the control register has not been correctly configured
369    #[inline(always)]
370    pub fn is_active(&self) -> bool {
371        *self == PGSERRR::Active
372    }
373}
374/**Programming sequence error
375
376Value on reset: 0*/
377#[cfg_attr(feature = "defmt", derive(defmt::Format))]
378#[derive(Clone, Copy, Debug, PartialEq, Eq)]
379pub enum PGSERRW {
380    ///1: Clear error flag
381    Clear = 1,
382}
383impl From<PGSERRW> for bool {
384    #[inline(always)]
385    fn from(variant: PGSERRW) -> Self {
386        variant as u8 != 0
387    }
388}
389///Field `PGSERR` writer - Programming sequence error
390pub type PGSERR_W<'a, REG> = crate::BitWriter1C<'a, REG, PGSERRW>;
391impl<'a, REG> PGSERR_W<'a, REG>
392where
393    REG: crate::Writable + crate::RegisterSpec,
394{
395    ///Clear error flag
396    #[inline(always)]
397    pub fn clear(self) -> &'a mut crate::W<REG> {
398        self.variant(PGSERRW::Clear)
399    }
400}
401/**Read Protection Error (PCROP)
402
403Value on reset: 0*/
404#[cfg_attr(feature = "defmt", derive(defmt::Format))]
405#[derive(Clone, Copy, Debug, PartialEq, Eq)]
406pub enum RDERRR {
407    ///0: No error
408    Inactive = 0,
409    ///1: A read access through the D-bus is performed to an address belonging to a proprietary readout protected Flash sector
410    Active = 1,
411}
412impl From<RDERRR> for bool {
413    #[inline(always)]
414    fn from(variant: RDERRR) -> Self {
415        variant as u8 != 0
416    }
417}
418///Field `RDERR` reader - Read Protection Error (PCROP)
419pub type RDERR_R = crate::BitReader<RDERRR>;
420impl RDERR_R {
421    ///Get enumerated values variant
422    #[inline(always)]
423    pub const fn variant(&self) -> RDERRR {
424        match self.bits {
425            false => RDERRR::Inactive,
426            true => RDERRR::Active,
427        }
428    }
429    ///No error
430    #[inline(always)]
431    pub fn is_inactive(&self) -> bool {
432        *self == RDERRR::Inactive
433    }
434    ///A read access through the D-bus is performed to an address belonging to a proprietary readout protected Flash sector
435    #[inline(always)]
436    pub fn is_active(&self) -> bool {
437        *self == RDERRR::Active
438    }
439}
440/**Read Protection Error (PCROP)
441
442Value on reset: 0*/
443#[cfg_attr(feature = "defmt", derive(defmt::Format))]
444#[derive(Clone, Copy, Debug, PartialEq, Eq)]
445pub enum RDERRW {
446    ///1: Clear error flag
447    Clear = 1,
448}
449impl From<RDERRW> for bool {
450    #[inline(always)]
451    fn from(variant: RDERRW) -> Self {
452        variant as u8 != 0
453    }
454}
455///Field `RDERR` writer - Read Protection Error (PCROP)
456pub type RDERR_W<'a, REG> = crate::BitWriter1C<'a, REG, RDERRW>;
457impl<'a, REG> RDERR_W<'a, REG>
458where
459    REG: crate::Writable + crate::RegisterSpec,
460{
461    ///Clear error flag
462    #[inline(always)]
463    pub fn clear(self) -> &'a mut crate::W<REG> {
464        self.variant(RDERRW::Clear)
465    }
466}
467/**Busy
468
469Value on reset: 0*/
470#[cfg_attr(feature = "defmt", derive(defmt::Format))]
471#[derive(Clone, Copy, Debug, PartialEq, Eq)]
472pub enum BSYR {
473    ///0: No Flash memory operation ongoing
474    NotBusy = 0,
475    ///1: Flash memory operation ongoing
476    Busy = 1,
477}
478impl From<BSYR> for bool {
479    #[inline(always)]
480    fn from(variant: BSYR) -> Self {
481        variant as u8 != 0
482    }
483}
484///Field `BSY` reader - Busy
485pub type BSY_R = crate::BitReader<BSYR>;
486impl BSY_R {
487    ///Get enumerated values variant
488    #[inline(always)]
489    pub const fn variant(&self) -> BSYR {
490        match self.bits {
491            false => BSYR::NotBusy,
492            true => BSYR::Busy,
493        }
494    }
495    ///No Flash memory operation ongoing
496    #[inline(always)]
497    pub fn is_not_busy(&self) -> bool {
498        *self == BSYR::NotBusy
499    }
500    ///Flash memory operation ongoing
501    #[inline(always)]
502    pub fn is_busy(&self) -> bool {
503        *self == BSYR::Busy
504    }
505}
506impl R {
507    ///Bit 0 - End of operation
508    #[inline(always)]
509    pub fn eop(&self) -> EOP_R {
510        EOP_R::new((self.bits & 1) != 0)
511    }
512    ///Bit 1 - Operation error
513    #[inline(always)]
514    pub fn operr(&self) -> OPERR_R {
515        OPERR_R::new(((self.bits >> 1) & 1) != 0)
516    }
517    ///Bit 4 - Write protection error
518    #[inline(always)]
519    pub fn wrperr(&self) -> WRPERR_R {
520        WRPERR_R::new(((self.bits >> 4) & 1) != 0)
521    }
522    ///Bit 5 - Programming alignment error
523    #[inline(always)]
524    pub fn pgaerr(&self) -> PGAERR_R {
525        PGAERR_R::new(((self.bits >> 5) & 1) != 0)
526    }
527    ///Bit 6 - Programming parallelism error
528    #[inline(always)]
529    pub fn pgperr(&self) -> PGPERR_R {
530        PGPERR_R::new(((self.bits >> 6) & 1) != 0)
531    }
532    ///Bit 7 - Programming sequence error
533    #[inline(always)]
534    pub fn pgserr(&self) -> PGSERR_R {
535        PGSERR_R::new(((self.bits >> 7) & 1) != 0)
536    }
537    ///Bit 8 - Read Protection Error (PCROP)
538    #[inline(always)]
539    pub fn rderr(&self) -> RDERR_R {
540        RDERR_R::new(((self.bits >> 8) & 1) != 0)
541    }
542    ///Bit 16 - Busy
543    #[inline(always)]
544    pub fn bsy(&self) -> BSY_R {
545        BSY_R::new(((self.bits >> 16) & 1) != 0)
546    }
547}
548impl core::fmt::Debug for R {
549    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
550        f.debug_struct("SR")
551            .field("eop", &self.eop())
552            .field("operr", &self.operr())
553            .field("wrperr", &self.wrperr())
554            .field("pgaerr", &self.pgaerr())
555            .field("pgperr", &self.pgperr())
556            .field("pgserr", &self.pgserr())
557            .field("bsy", &self.bsy())
558            .field("rderr", &self.rderr())
559            .finish()
560    }
561}
562impl W {
563    ///Bit 0 - End of operation
564    #[inline(always)]
565    pub fn eop(&mut self) -> EOP_W<SRrs> {
566        EOP_W::new(self, 0)
567    }
568    ///Bit 1 - Operation error
569    #[inline(always)]
570    pub fn operr(&mut self) -> OPERR_W<SRrs> {
571        OPERR_W::new(self, 1)
572    }
573    ///Bit 4 - Write protection error
574    #[inline(always)]
575    pub fn wrperr(&mut self) -> WRPERR_W<SRrs> {
576        WRPERR_W::new(self, 4)
577    }
578    ///Bit 5 - Programming alignment error
579    #[inline(always)]
580    pub fn pgaerr(&mut self) -> PGAERR_W<SRrs> {
581        PGAERR_W::new(self, 5)
582    }
583    ///Bit 6 - Programming parallelism error
584    #[inline(always)]
585    pub fn pgperr(&mut self) -> PGPERR_W<SRrs> {
586        PGPERR_W::new(self, 6)
587    }
588    ///Bit 7 - Programming sequence error
589    #[inline(always)]
590    pub fn pgserr(&mut self) -> PGSERR_W<SRrs> {
591        PGSERR_W::new(self, 7)
592    }
593    ///Bit 8 - Read Protection Error (PCROP)
594    #[inline(always)]
595    pub fn rderr(&mut self) -> RDERR_W<SRrs> {
596        RDERR_W::new(self, 8)
597    }
598}
599/**Status register
600
601You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
602
603See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#FLASH:SR)*/
604pub struct SRrs;
605impl crate::RegisterSpec for SRrs {
606    type Ux = u32;
607}
608///`read()` method returns [`sr::R`](R) reader structure
609impl crate::Readable for SRrs {}
610///`write(|w| ..)` method takes [`sr::W`](W) writer structure
611impl crate::Writable for SRrs {
612    type Safety = crate::Unsafe;
613    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x01f3;
614}
615///`reset()` method sets SR to value 0
616impl crate::Resettable for SRrs {}
stm32f4_staging/stm32f401/flash/sr.rs

stm32f4_staging/stm32f401/flash/
sr.rs
