stm32f4_staging/stm32f401/
adc_common.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    _reserved0: [u8; 0x04],
6    ccr: CCR,
7}
8impl RegisterBlock {
9    ///0x04 - ADC common control register
10    #[inline(always)]
11    pub const fn ccr(&self) -> &CCR {
12        &self.ccr
13    }
14}
15/**CCR (rw) register accessor: ADC common control register
16
17You can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
18
19See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F401.html#ADC_Common:CCR)
20
21For information about available fields see [`mod@ccr`] module*/
22pub type CCR = crate::Reg<ccr::CCRrs>;
23///ADC common control register
24pub mod ccr;

stm32f4_staging/stm32f401/adc_common.rs

stm32f4_staging/stm32f401/
adc_common.rs