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#[repr(C)]
#[derive(Debug)]
///Register block
pub struct RegisterBlock {
moder: MODER,
otyper: OTYPER,
ospeedr: OSPEEDR,
pupdr: PUPDR,
idr: IDR,
odr: ODR,
bsrr: BSRR,
lckr: LCKR,
afrl: AFRL,
afrh: AFRH,
}
impl RegisterBlock {
///0x00 - GPIO port mode register
#[inline(always)]
pub const fn moder(&self) -> &MODER {
&self.moder
}
///0x04 - GPIO port output type register
#[inline(always)]
pub const fn otyper(&self) -> &OTYPER {
&self.otyper
}
///0x08 - GPIO port output speed register
#[inline(always)]
pub const fn ospeedr(&self) -> &OSPEEDR {
&self.ospeedr
}
///0x0c - GPIO port pull-up/pull-down register
#[inline(always)]
pub const fn pupdr(&self) -> &PUPDR {
&self.pupdr
}
///0x10 - GPIO port input data register
#[inline(always)]
pub const fn idr(&self) -> &IDR {
&self.idr
}
///0x14 - GPIO port output data register
#[inline(always)]
pub const fn odr(&self) -> &ODR {
&self.odr
}
///0x18 - GPIO port bit set/reset register
#[inline(always)]
pub const fn bsrr(&self) -> &BSRR {
&self.bsrr
}
///0x1c - GPIO port configuration lock register
#[inline(always)]
pub const fn lckr(&self) -> &LCKR {
&self.lckr
}
///0x20 - GPIO alternate function low register
#[inline(always)]
pub const fn afrl(&self) -> &AFRL {
&self.afrl
}
///0x24 - GPIO alternate function high register
#[inline(always)]
pub const fn afrh(&self) -> &AFRH {
&self.afrh
}
}
/**MODER (rw) register accessor: GPIO port mode register
You can [`read`](crate::generic::Reg::read) this register and get [`moder::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moder::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@moder`]
module*/
pub type MODER = crate::Reg<moder::MODERrs>;
///GPIO port mode register
pub mod moder;
/**OTYPER (rw) register accessor: GPIO port output type register
You can [`read`](crate::generic::Reg::read) this register and get [`otyper::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`otyper::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@otyper`]
module*/
pub type OTYPER = crate::Reg<otyper::OTYPERrs>;
///GPIO port output type register
pub mod otyper;
/**OSPEEDR (rw) register accessor: GPIO port output speed register
You can [`read`](crate::generic::Reg::read) this register and get [`ospeedr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ospeedr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@ospeedr`]
module*/
pub type OSPEEDR = crate::Reg<ospeedr::OSPEEDRrs>;
///GPIO port output speed register
pub mod ospeedr;
/**PUPDR (rw) register accessor: GPIO port pull-up/pull-down register
You can [`read`](crate::generic::Reg::read) this register and get [`pupdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pupdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@pupdr`]
module*/
pub type PUPDR = crate::Reg<pupdr::PUPDRrs>;
///GPIO port pull-up/pull-down register
pub mod pupdr;
/**IDR (r) register accessor: GPIO port input data register
You can [`read`](crate::generic::Reg::read) this register and get [`idr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@idr`]
module*/
pub type IDR = crate::Reg<idr::IDRrs>;
///GPIO port input data register
pub mod idr;
/**ODR (rw) register accessor: GPIO port output data register
You can [`read`](crate::generic::Reg::read) this register and get [`odr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`odr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@odr`]
module*/
pub type ODR = crate::Reg<odr::ODRrs>;
///GPIO port output data register
pub mod odr;
/**BSRR (w) register accessor: GPIO port bit set/reset register
You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bsrr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@bsrr`]
module*/
pub type BSRR = crate::Reg<bsrr::BSRRrs>;
///GPIO port bit set/reset register
pub mod bsrr;
/**LCKR (rw) register accessor: GPIO port configuration lock register
You can [`read`](crate::generic::Reg::read) this register and get [`lckr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lckr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@lckr`]
module*/
pub type LCKR = crate::Reg<lckr::LCKRrs>;
///GPIO port configuration lock register
pub mod lckr;
/**AFRL (rw) register accessor: GPIO alternate function low register
You can [`read`](crate::generic::Reg::read) this register and get [`afrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@afrl`]
module*/
pub type AFRL = crate::Reg<afrl::AFRLrs>;
///GPIO alternate function low register
pub mod afrl;
/**AFRH (rw) register accessor: GPIO alternate function high register
You can [`read`](crate::generic::Reg::read) this register and get [`afrh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afrh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@afrh`]
module*/
pub type AFRH = crate::Reg<afrh::AFRHrs>;
///GPIO alternate function high register
pub mod afrh;