Module rcc

Reset and Clock Control

The most important function this module delivers is the clock configuration.

To configure the clock, we first have to obtain the device peripherals.

// Get our peripherals
let dp = pac::Peripherals::take().unwrap();

let mut flash = dp.FLASH.constrain();
let mut rcc = dp.RCC.constrain();

After that we can configure the clock

let clocks = rcc.cfgr
    // Using the external oscillator
    // Set the frequency to that of the external oscillator
    .use_hse(8.MHz())
    // Set the frequency for the AHB bus,
    // which the root of every following clock peripheral
    .hclk(48.MHz())
    // The sysclk is equivalent to the core clock
    .sysclk(48.MHz())
    // The following are peripheral clocks, which are both
    // needed to configure specific peripherals.
    // Looking at the peripheral function parameters
    // should give more insight, which peripheral clock is needed.
    .pclk1(12.MHz())
    .pclk2(12.MHz())
    // Freeze / apply the configuration and setup all clocks
    .freeze(&mut flash.acr);

All fields can be omitted and will internally be set to a calculated default. For more details read the documentation of the CFGR methods to find out how to setup the clock.

Structs

AHB

AMBA High-performance Bus (AHB) registers

APB1

Advanced Peripheral Bus 1 (APB1) registers

APB2

Advanced Peripheral Bus 2 (APB2) registers

BDCR

Backup Domain Control register (RCC_BDCR)

CFGR

Clock configuration

Clocks

Frozen clock frequencies

Rcc

Constrained RCC peripheral

Constants

HSI

Frequency of interal hardware RC oscillator (HSI OSC)

LSE

Frequency of external 32.768 kHz oscillator (LSE OSC)

Traits

BusClock

Frequency on bus that peripheral is connected in

BusTimerClock

Frequency on bus that timer is connected in

Enable

Enable/disable peripheral

RccBus

Bus associated to peripheral

RccExt

Extension trait that constrains the []RCC] peripheral

Reset

Reset peripheral