Module gpio

Source
Expand description

§General Purpose Input / Output

To use the GPIO pins, you first need to configure the GPIO port (GPIOA, GPIOB, …) that you are interested in. This is done using the GpioExt::split function.

let dp = pac::Peripherals::take().unwrap();
let rcc = dp.RCC.constrain();

let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);

The resulting Parts struct contains one field for each pin, as well as some shared registers. Every pin type is a specialized version of generic pin struct.

To use a pin, first use the relevant into_... method of the pin.

let pa0 = gpioa.pa0.into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper);

And finally, you can use the functions from the InputPin or OutputPin traits in embedded_hal

For a complete example, see examples/toggle.rs

§Pin Configuration

§Mode

Each GPIO pin can be set to various modes by corresponding into_... method:

  • Input: The output buffer is disabled and the schmitt trigger input is activated
  • Output: Both the output buffer and the schmitt trigger input is enabled
    • PushPull: Output which either drives the pin high or low
    • OpenDrain: Output which leaves the gate floating, or pulls it to ground in drain mode. Can be used as an input in the open configuration
  • Alternate: Pin mode required when the pin is driven by other peripherals. The schmitt trigger input is activated. The Output buffer is automatically enabled and disabled by peripherals. Output behavior is same as the output mode
    • PushPull: Output which either drives the pin high or low
    • OpenDrain: Output which leaves the gate floating, or pulls it to ground in drain mode
  • Analog: Pin mode required for ADC, DAC, OPAMP, and COMP peripherals. It is also suitable for minimize energy consumption as the output buffer and the schmitt trigger input is disabled

§Output Speed

Output speed (slew rate) for each pin is selectable from low, medium, and high by calling set_speed method. Refer to the device datasheet for specifications for each speed.

§Internal Resistor

Weak internal pull-up and pull-down resistors for each pin is configurable by calling set_internal_resistor method. into_..._input methods are also available for convenience.

Modules§

gpioa
All Pins and associated registers for GPIO port GPIOA
gpiob
All Pins and associated registers for GPIO port GPIOB
gpioc
All Pins and associated registers for GPIO port GPIOC
gpiod
All Pins and associated registers for GPIO port GPIOD
gpioe
All Pins and associated registers for GPIO port GPIOE
gpiof
All Pins and associated registers for GPIO port GPIOF
marker
Marker traits used in this module

Structs§

Alternate
Alternate function (type state)
Analog
Analog mode (type state)
Gpioa
GPIO port GPIOA (type state)
Gpiob
GPIO port GPIOB (type state)
Gpioc
GPIO port GPIOC (type state)
Gpiod
GPIO port GPIOD (type state)
Gpioe
GPIO port GPIOE (type state)
Gpiof
GPIO port GPIOF (type state)
Gpiox
Runtime defined GPIO port (type state)
Input
Input mode (type state)
OpenDrain
Open-drain output (type state)
Output
Output mode (type state)
Pin
Generic pin
PushPull
Push-pull output (type state)
U
Compile time defined pin number (type state)
Ux
Runtime defined pin number (type state)

Enums§

Edge
GPIO interrupt trigger edge selection
Resistor
Internal pull-up and pull-down resistor configuration
Speed
Slew rate configuration

Traits§

GpioExt
Extension trait to split a GPIO peripheral in independent pins and registers

Type Aliases§

AF0
Alternate function 0 (type state)
AF1
Alternate function 1 (type state)
AF2
Alternate function 2 (type state)
AF3
Alternate function 3 (type state)
AF4
Alternate function 4 (type state)
AF5
Alternate function 5 (type state)
AF6
Alternate function 6 (type state)
AF7
Alternate function 7 (type state)
AF8
Alternate function 8 (type state)
AF9
Alternate function 9 (type state)
AF10
Alternate function 10 (type state)
AF11
Alternate function 11 (type state)
AF12
Alternate function 12 (type state)
AF13
Alternate function 13 (type state)
AF14
Alternate function 14 (type state)
AF15
Alternate function 15 (type state)
PA0
Pin PA0
PA1
Pin PA1
PA2
Pin PA2
PA3
Pin PA3
PA4
Pin PA4
PA5
Pin PA5
PA6
Pin PA6
PA7
Pin PA7
PA8
Pin PA8
PA9
Pin PA9
PA10
Pin PA10
PA11
Pin PA11
PA12
Pin PA12
PA13
Pin PA13
PA14
Pin PA14
PA15
Pin PA15
PAx
Partially erased pin for GPIOA
PB0
Pin PB0
PB1
Pin PB1
PB2
Pin PB2
PB3
Pin PB3
PB4
Pin PB4
PB5
Pin PB5
PB6
Pin PB6
PB7
Pin PB7
PB8
Pin PB8
PB9
Pin PB9
PB10
Pin PB10
PB11
Pin PB11
PB12
Pin PB12
PB13
Pin PB13
PB14
Pin PB14
PB15
Pin PB15
PBx
Partially erased pin for GPIOB
PC0
Pin PC0
PC1
Pin PC1
PC2
Pin PC2
PC3
Pin PC3
PC4
Pin PC4
PC5
Pin PC5
PC6
Pin PC6
PC7
Pin PC7
PC8
Pin PC8
PC9
Pin PC9
PC10
Pin PC10
PC11
Pin PC11
PC12
Pin PC12
PC13
Pin PC13
PC14
Pin PC14
PC15
Pin PC15
PCx
Partially erased pin for GPIOC
PD0
Pin PD0
PD1
Pin PD1
PD2
Pin PD2
PD3
Pin PD3
PD4
Pin PD4
PD5
Pin PD5
PD6
Pin PD6
PD7
Pin PD7
PD8
Pin PD8
PD9
Pin PD9
PD10
Pin PD10
PD11
Pin PD11
PD12
Pin PD12
PD13
Pin PD13
PD14
Pin PD14
PD15
Pin PD15
PDx
Partially erased pin for GPIOD
PE0
Pin PE0
PE1
Pin PE1
PE2
Pin PE2
PE3
Pin PE3
PE4
Pin PE4
PE5
Pin PE5
PE6
Pin PE6
PE7
Pin PE7
PE8
Pin PE8
PE9
Pin PE9
PE10
Pin PE10
PE11
Pin PE11
PE12
Pin PE12
PE13
Pin PE13
PE14
Pin PE14
PE15
Pin PE15
PEx
Partially erased pin for GPIOE
PF0
Pin PF0
PF1
Pin PF1
PF2
Pin PF2
PF4
Pin PF4
PF6
Pin PF6
PF9
Pin PF9
PF10
Pin PF10
PFx
Partially erased pin for GPIOF
PXx
Fully erased pin