Module tim1

Module tim1 

Source
Expand description

Advanced timer

Modules§

arr
auto-reload register
bdtr
break and dead-time register
ccer
capture/compare enable register
ccmr1_input
capture/compare mode register 1 (input mode)
ccmr1_output
capture/compare mode register (output mode)
ccmr2_input
capture/compare mode register 2 (input mode)
ccmr2_output
capture/compare mode register (output mode)
ccmr3_output
capture/compare mode register 3 (output mode)
ccr
capture/compare register 1
ccr5
capture/compare register 5
ccr6
capture/compare register 6
cnt
counter
cr1
control register 1
cr2
control register 2
dcr
DMA control register
dier
DMA/Interrupt enable register
dmar
DMA address for full transfer
egr
event generation register
or
option registers
psc
prescaler
rcr
repetition counter register
smcr
slave mode control register
sr
status register

Structs§

RegisterBlock
Register block

Type Aliases§

ARR
auto-reload register
BDTR
break and dead-time register
CCER
capture/compare enable register
CCMR1_INPUT
capture/compare mode register 1 (input mode)
CCMR1_OUTPUT
capture/compare mode register (output mode)
CCMR2_INPUT
capture/compare mode register 2 (input mode)
CCMR2_OUTPUT
capture/compare mode register (output mode)
CCMR3_OUTPUT
capture/compare mode register 3 (output mode)
CCR
capture/compare register 1
CCR5
capture/compare register 5
CCR6
capture/compare register 6
CNT
counter
CR1
control register 1
CR2
control register 2
DCR
DMA control register
DIER
DMA/Interrupt enable register
DMAR
DMA address for full transfer
EGR
event generation register
OR
option registers
PSC
prescaler
RCR
repetition counter register
SMCR
slave mode control register
SR
status register