1# [ doc = "General purpose timer" ]
2# [ repr ( C ) ]
3pub struct GpTim {
4 # [ doc = "0x00 - control register 1" ]
5 pub cr1: Cr1,
6 # [ doc = "0x04 - control register 2" ]
7 pub cr2: Cr2,
8 # [ doc = "0x08 - slave mode control register" ]
9 pub smcr: Smcr,
10 # [ doc = "0x0c - DMA/Interrupt enable register" ]
11 pub dier: Dier,
12 # [ doc = "0x10 - status register" ]
13 pub sr: Sr,
14 # [ doc = "0x14 - event generation register" ]
15 pub egr: Egr,
16 # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
17 pub ccmr1_output: Ccmr1Output,
18 # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
19 pub ccmr2_output: Ccmr2Output,
20 # [ doc = "0x20 - capture/compare enable register" ]
21 pub ccer: Ccer,
22 # [ doc = "0x24 - counter" ]
23 pub cnt: Cnt,
24 # [ doc = "0x28 - prescaler" ]
25 pub psc: Psc,
26 # [ doc = "0x2c - auto-reload register" ]
27 pub arr: Arr,
28 _reserved0: [u8; 4usize],
29 # [ doc = "0x34 - capture/compare register 1" ]
30 pub ccr1: Ccr1,
31 # [ doc = "0x38 - capture/compare register 2" ]
32 pub ccr2: Ccr2,
33 # [ doc = "0x3c - capture/compare register 3" ]
34 pub ccr3: Ccr3,
35 # [ doc = "0x40 - capture/compare register 4" ]
36 pub ccr4: Ccr4,
37 _reserved1: [u8; 4usize],
38 # [ doc = "0x48 - DMA control register" ]
39 pub dcr: Dcr,
40 # [ doc = "0x4c - DMA address for full transfer" ]
41 pub dmar: Dmar,
42}
43
44# [ repr ( C ) ]
45pub struct Cr1 {
46 register: ::volatile_register::RW<u32>,
47}
48
49impl Cr1 {
50 pub fn read_bits(&self) -> u32 {
51 self.register.read()
52 }
53 pub unsafe fn modify_bits<F>(&mut self, f: F)
54 where F: FnOnce(&mut u32)
55 {
56 let mut bits = self.register.read();
57 f(&mut bits);
58 self.register.write(bits);
59 }
60 pub unsafe fn write_bits(&mut self, bits: u32) {
61 self.register.write(bits);
62 }
63 pub fn modify<F>(&mut self, f: F)
64 where for<'w> F: FnOnce(&Cr1R, &'w mut Cr1W) -> &'w mut Cr1W
65 {
66 let bits = self.register.read();
67 let r = Cr1R { bits: bits };
68 let mut w = Cr1W { bits: bits };
69 f(&r, &mut w);
70 self.register.write(w.bits);
71 }
72 pub fn read(&self) -> Cr1R {
73 Cr1R { bits: self.register.read() }
74 }
75 pub fn write<F>(&mut self, f: F)
76 where F: FnOnce(&mut Cr1W) -> &mut Cr1W
77 {
78 let mut w = Cr1W::reset_value();
79 f(&mut w);
80 self.register.write(w.bits);
81 }
82}
83
84# [ derive ( Clone , Copy ) ]
85# [ repr ( C ) ]
86pub struct Cr1R {
87 bits: u32,
88}
89
90impl Cr1R {
91 # [ doc = "Bit 0 - Counter enable" ]
92 pub fn cen(&self) -> bool {
93 const OFFSET: u8 = 0u8;
94 self.bits & (1 << OFFSET) != 0
95 }
96 # [ doc = "Bit 1 - Update disable" ]
97 pub fn udis(&self) -> bool {
98 const OFFSET: u8 = 1u8;
99 self.bits & (1 << OFFSET) != 0
100 }
101 # [ doc = "Bit 2 - Update request source" ]
102 pub fn urs(&self) -> bool {
103 const OFFSET: u8 = 2u8;
104 self.bits & (1 << OFFSET) != 0
105 }
106 # [ doc = "Bit 3 - One-pulse mode" ]
107 pub fn opm(&self) -> bool {
108 const OFFSET: u8 = 3u8;
109 self.bits & (1 << OFFSET) != 0
110 }
111 # [ doc = "Bit 4 - Direction" ]
112 pub fn dir(&self) -> bool {
113 const OFFSET: u8 = 4u8;
114 self.bits & (1 << OFFSET) != 0
115 }
116 # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
117 pub fn cms(&self) -> u8 {
118 const MASK: u32 = 3;
119 const OFFSET: u8 = 5u8;
120 ((self.bits >> OFFSET) & MASK) as u8
121 }
122 # [ doc = "Bit 7 - Auto-reload preload enable" ]
123 pub fn arpe(&self) -> bool {
124 const OFFSET: u8 = 7u8;
125 self.bits & (1 << OFFSET) != 0
126 }
127 # [ doc = "Bits 8:9 - Clock division" ]
128 pub fn ckd(&self) -> u8 {
129 const MASK: u32 = 3;
130 const OFFSET: u8 = 8u8;
131 ((self.bits >> OFFSET) & MASK) as u8
132 }
133 # [ doc = "Bit 11 - UIF status bit remapping" ]
134 pub fn uifremap(&self) -> bool {
135 const OFFSET: u8 = 11u8;
136 self.bits & (1 << OFFSET) != 0
137 }
138}
139
140# [ derive ( Clone , Copy ) ]
141# [ repr ( C ) ]
142pub struct Cr1W {
143 bits: u32,
144}
145
146impl Cr1W {
147 # [ doc = r" Reset value" ]
148 pub fn reset_value() -> Self {
149 Cr1W { bits: 0 }
150 }
151 # [ doc = "Bit 0 - Counter enable" ]
152 pub fn cen(&mut self, value: bool) -> &mut Self {
153 const OFFSET: u8 = 0u8;
154 if value {
155 self.bits |= 1 << OFFSET;
156 } else {
157 self.bits &= !(1 << OFFSET);
158 }
159 self
160 }
161 # [ doc = "Bit 1 - Update disable" ]
162 pub fn udis(&mut self, value: bool) -> &mut Self {
163 const OFFSET: u8 = 1u8;
164 if value {
165 self.bits |= 1 << OFFSET;
166 } else {
167 self.bits &= !(1 << OFFSET);
168 }
169 self
170 }
171 # [ doc = "Bit 2 - Update request source" ]
172 pub fn urs(&mut self, value: bool) -> &mut Self {
173 const OFFSET: u8 = 2u8;
174 if value {
175 self.bits |= 1 << OFFSET;
176 } else {
177 self.bits &= !(1 << OFFSET);
178 }
179 self
180 }
181 # [ doc = "Bit 3 - One-pulse mode" ]
182 pub fn opm(&mut self, value: bool) -> &mut Self {
183 const OFFSET: u8 = 3u8;
184 if value {
185 self.bits |= 1 << OFFSET;
186 } else {
187 self.bits &= !(1 << OFFSET);
188 }
189 self
190 }
191 # [ doc = "Bit 4 - Direction" ]
192 pub fn dir(&mut self, value: bool) -> &mut Self {
193 const OFFSET: u8 = 4u8;
194 if value {
195 self.bits |= 1 << OFFSET;
196 } else {
197 self.bits &= !(1 << OFFSET);
198 }
199 self
200 }
201 # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
202 pub fn cms(&mut self, value: u8) -> &mut Self {
203 const OFFSET: u8 = 5u8;
204 const MASK: u8 = 3;
205 self.bits &= !((MASK as u32) << OFFSET);
206 self.bits |= ((value & MASK) as u32) << OFFSET;
207 self
208 }
209 # [ doc = "Bit 7 - Auto-reload preload enable" ]
210 pub fn arpe(&mut self, value: bool) -> &mut Self {
211 const OFFSET: u8 = 7u8;
212 if value {
213 self.bits |= 1 << OFFSET;
214 } else {
215 self.bits &= !(1 << OFFSET);
216 }
217 self
218 }
219 # [ doc = "Bits 8:9 - Clock division" ]
220 pub fn ckd(&mut self, value: u8) -> &mut Self {
221 const OFFSET: u8 = 8u8;
222 const MASK: u8 = 3;
223 self.bits &= !((MASK as u32) << OFFSET);
224 self.bits |= ((value & MASK) as u32) << OFFSET;
225 self
226 }
227 # [ doc = "Bit 11 - UIF status bit remapping" ]
228 pub fn uifremap(&mut self, value: bool) -> &mut Self {
229 const OFFSET: u8 = 11u8;
230 if value {
231 self.bits |= 1 << OFFSET;
232 } else {
233 self.bits &= !(1 << OFFSET);
234 }
235 self
236 }
237}
238
239# [ repr ( C ) ]
240pub struct Cr2 {
241 register: ::volatile_register::RW<u32>,
242}
243
244impl Cr2 {
245 pub fn read_bits(&self) -> u32 {
246 self.register.read()
247 }
248 pub unsafe fn modify_bits<F>(&mut self, f: F)
249 where F: FnOnce(&mut u32)
250 {
251 let mut bits = self.register.read();
252 f(&mut bits);
253 self.register.write(bits);
254 }
255 pub unsafe fn write_bits(&mut self, bits: u32) {
256 self.register.write(bits);
257 }
258 pub fn modify<F>(&mut self, f: F)
259 where for<'w> F: FnOnce(&Cr2R, &'w mut Cr2W) -> &'w mut Cr2W
260 {
261 let bits = self.register.read();
262 let r = Cr2R { bits: bits };
263 let mut w = Cr2W { bits: bits };
264 f(&r, &mut w);
265 self.register.write(w.bits);
266 }
267 pub fn read(&self) -> Cr2R {
268 Cr2R { bits: self.register.read() }
269 }
270 pub fn write<F>(&mut self, f: F)
271 where F: FnOnce(&mut Cr2W) -> &mut Cr2W
272 {
273 let mut w = Cr2W::reset_value();
274 f(&mut w);
275 self.register.write(w.bits);
276 }
277}
278
279# [ derive ( Clone , Copy ) ]
280# [ repr ( C ) ]
281pub struct Cr2R {
282 bits: u32,
283}
284
285impl Cr2R {
286 # [ doc = "Bit 7 - TI1 selection" ]
287 pub fn ti1s(&self) -> bool {
288 const OFFSET: u8 = 7u8;
289 self.bits & (1 << OFFSET) != 0
290 }
291 # [ doc = "Bits 4:6 - Master mode selection" ]
292 pub fn mms(&self) -> u8 {
293 const MASK: u32 = 7;
294 const OFFSET: u8 = 4u8;
295 ((self.bits >> OFFSET) & MASK) as u8
296 }
297 # [ doc = "Bit 3 - Capture/compare DMA selection" ]
298 pub fn ccds(&self) -> bool {
299 const OFFSET: u8 = 3u8;
300 self.bits & (1 << OFFSET) != 0
301 }
302}
303
304# [ derive ( Clone , Copy ) ]
305# [ repr ( C ) ]
306pub struct Cr2W {
307 bits: u32,
308}
309
310impl Cr2W {
311 # [ doc = r" Reset value" ]
312 pub fn reset_value() -> Self {
313 Cr2W { bits: 0 }
314 }
315 # [ doc = "Bit 7 - TI1 selection" ]
316 pub fn ti1s(&mut self, value: bool) -> &mut Self {
317 const OFFSET: u8 = 7u8;
318 if value {
319 self.bits |= 1 << OFFSET;
320 } else {
321 self.bits &= !(1 << OFFSET);
322 }
323 self
324 }
325 # [ doc = "Bits 4:6 - Master mode selection" ]
326 pub fn mms(&mut self, value: u8) -> &mut Self {
327 const OFFSET: u8 = 4u8;
328 const MASK: u8 = 7;
329 self.bits &= !((MASK as u32) << OFFSET);
330 self.bits |= ((value & MASK) as u32) << OFFSET;
331 self
332 }
333 # [ doc = "Bit 3 - Capture/compare DMA selection" ]
334 pub fn ccds(&mut self, value: bool) -> &mut Self {
335 const OFFSET: u8 = 3u8;
336 if value {
337 self.bits |= 1 << OFFSET;
338 } else {
339 self.bits &= !(1 << OFFSET);
340 }
341 self
342 }
343}
344
345# [ repr ( C ) ]
346pub struct Smcr {
347 register: ::volatile_register::RW<u32>,
348}
349
350impl Smcr {
351 pub fn read_bits(&self) -> u32 {
352 self.register.read()
353 }
354 pub unsafe fn modify_bits<F>(&mut self, f: F)
355 where F: FnOnce(&mut u32)
356 {
357 let mut bits = self.register.read();
358 f(&mut bits);
359 self.register.write(bits);
360 }
361 pub unsafe fn write_bits(&mut self, bits: u32) {
362 self.register.write(bits);
363 }
364 pub fn modify<F>(&mut self, f: F)
365 where for<'w> F: FnOnce(&SmcrR, &'w mut SmcrW) -> &'w mut SmcrW
366 {
367 let bits = self.register.read();
368 let r = SmcrR { bits: bits };
369 let mut w = SmcrW { bits: bits };
370 f(&r, &mut w);
371 self.register.write(w.bits);
372 }
373 pub fn read(&self) -> SmcrR {
374 SmcrR { bits: self.register.read() }
375 }
376 pub fn write<F>(&mut self, f: F)
377 where F: FnOnce(&mut SmcrW) -> &mut SmcrW
378 {
379 let mut w = SmcrW::reset_value();
380 f(&mut w);
381 self.register.write(w.bits);
382 }
383}
384
385# [ derive ( Clone , Copy ) ]
386# [ repr ( C ) ]
387pub struct SmcrR {
388 bits: u32,
389}
390
391impl SmcrR {
392 # [ doc = "Bits 0:2 - Slave mode selection" ]
393 pub fn sms(&self) -> u8 {
394 const MASK: u32 = 7;
395 const OFFSET: u8 = 0u8;
396 ((self.bits >> OFFSET) & MASK) as u8
397 }
398 # [ doc = "Bit 3 - OCREF clear selection" ]
399 pub fn occs(&self) -> bool {
400 const OFFSET: u8 = 3u8;
401 self.bits & (1 << OFFSET) != 0
402 }
403 # [ doc = "Bits 4:6 - Trigger selection" ]
404 pub fn ts(&self) -> u8 {
405 const MASK: u32 = 7;
406 const OFFSET: u8 = 4u8;
407 ((self.bits >> OFFSET) & MASK) as u8
408 }
409 # [ doc = "Bit 7 - Master/Slave mode" ]
410 pub fn msm(&self) -> bool {
411 const OFFSET: u8 = 7u8;
412 self.bits & (1 << OFFSET) != 0
413 }
414 # [ doc = "Bits 8:11 - External trigger filter" ]
415 pub fn etf(&self) -> u8 {
416 const MASK: u32 = 15;
417 const OFFSET: u8 = 8u8;
418 ((self.bits >> OFFSET) & MASK) as u8
419 }
420 # [ doc = "Bits 12:13 - External trigger prescaler" ]
421 pub fn etps(&self) -> u8 {
422 const MASK: u32 = 3;
423 const OFFSET: u8 = 12u8;
424 ((self.bits >> OFFSET) & MASK) as u8
425 }
426 # [ doc = "Bit 14 - External clock enable" ]
427 pub fn ece(&self) -> bool {
428 const OFFSET: u8 = 14u8;
429 self.bits & (1 << OFFSET) != 0
430 }
431 # [ doc = "Bit 15 - External trigger polarity" ]
432 pub fn etp(&self) -> bool {
433 const OFFSET: u8 = 15u8;
434 self.bits & (1 << OFFSET) != 0
435 }
436 # [ doc = "Bit 16 - Slave mode selection bit3" ]
437 pub fn sms_3(&self) -> bool {
438 const OFFSET: u8 = 16u8;
439 self.bits & (1 << OFFSET) != 0
440 }
441}
442
443# [ derive ( Clone , Copy ) ]
444# [ repr ( C ) ]
445pub struct SmcrW {
446 bits: u32,
447}
448
449impl SmcrW {
450 # [ doc = r" Reset value" ]
451 pub fn reset_value() -> Self {
452 SmcrW { bits: 0 }
453 }
454 # [ doc = "Bits 0:2 - Slave mode selection" ]
455 pub fn sms(&mut self, value: u8) -> &mut Self {
456 const OFFSET: u8 = 0u8;
457 const MASK: u8 = 7;
458 self.bits &= !((MASK as u32) << OFFSET);
459 self.bits |= ((value & MASK) as u32) << OFFSET;
460 self
461 }
462 # [ doc = "Bit 3 - OCREF clear selection" ]
463 pub fn occs(&mut self, value: bool) -> &mut Self {
464 const OFFSET: u8 = 3u8;
465 if value {
466 self.bits |= 1 << OFFSET;
467 } else {
468 self.bits &= !(1 << OFFSET);
469 }
470 self
471 }
472 # [ doc = "Bits 4:6 - Trigger selection" ]
473 pub fn ts(&mut self, value: u8) -> &mut Self {
474 const OFFSET: u8 = 4u8;
475 const MASK: u8 = 7;
476 self.bits &= !((MASK as u32) << OFFSET);
477 self.bits |= ((value & MASK) as u32) << OFFSET;
478 self
479 }
480 # [ doc = "Bit 7 - Master/Slave mode" ]
481 pub fn msm(&mut self, value: bool) -> &mut Self {
482 const OFFSET: u8 = 7u8;
483 if value {
484 self.bits |= 1 << OFFSET;
485 } else {
486 self.bits &= !(1 << OFFSET);
487 }
488 self
489 }
490 # [ doc = "Bits 8:11 - External trigger filter" ]
491 pub fn etf(&mut self, value: u8) -> &mut Self {
492 const OFFSET: u8 = 8u8;
493 const MASK: u8 = 15;
494 self.bits &= !((MASK as u32) << OFFSET);
495 self.bits |= ((value & MASK) as u32) << OFFSET;
496 self
497 }
498 # [ doc = "Bits 12:13 - External trigger prescaler" ]
499 pub fn etps(&mut self, value: u8) -> &mut Self {
500 const OFFSET: u8 = 12u8;
501 const MASK: u8 = 3;
502 self.bits &= !((MASK as u32) << OFFSET);
503 self.bits |= ((value & MASK) as u32) << OFFSET;
504 self
505 }
506 # [ doc = "Bit 14 - External clock enable" ]
507 pub fn ece(&mut self, value: bool) -> &mut Self {
508 const OFFSET: u8 = 14u8;
509 if value {
510 self.bits |= 1 << OFFSET;
511 } else {
512 self.bits &= !(1 << OFFSET);
513 }
514 self
515 }
516 # [ doc = "Bit 15 - External trigger polarity" ]
517 pub fn etp(&mut self, value: bool) -> &mut Self {
518 const OFFSET: u8 = 15u8;
519 if value {
520 self.bits |= 1 << OFFSET;
521 } else {
522 self.bits &= !(1 << OFFSET);
523 }
524 self
525 }
526 # [ doc = "Bit 16 - Slave mode selection bit3" ]
527 pub fn sms_3(&mut self, value: bool) -> &mut Self {
528 const OFFSET: u8 = 16u8;
529 if value {
530 self.bits |= 1 << OFFSET;
531 } else {
532 self.bits &= !(1 << OFFSET);
533 }
534 self
535 }
536}
537
538# [ repr ( C ) ]
539pub struct Dier {
540 register: ::volatile_register::RW<u32>,
541}
542
543impl Dier {
544 pub fn read_bits(&self) -> u32 {
545 self.register.read()
546 }
547 pub unsafe fn modify_bits<F>(&mut self, f: F)
548 where F: FnOnce(&mut u32)
549 {
550 let mut bits = self.register.read();
551 f(&mut bits);
552 self.register.write(bits);
553 }
554 pub unsafe fn write_bits(&mut self, bits: u32) {
555 self.register.write(bits);
556 }
557 pub fn modify<F>(&mut self, f: F)
558 where for<'w> F: FnOnce(&DierR, &'w mut DierW) -> &'w mut DierW
559 {
560 let bits = self.register.read();
561 let r = DierR { bits: bits };
562 let mut w = DierW { bits: bits };
563 f(&r, &mut w);
564 self.register.write(w.bits);
565 }
566 pub fn read(&self) -> DierR {
567 DierR { bits: self.register.read() }
568 }
569 pub fn write<F>(&mut self, f: F)
570 where F: FnOnce(&mut DierW) -> &mut DierW
571 {
572 let mut w = DierW::reset_value();
573 f(&mut w);
574 self.register.write(w.bits);
575 }
576}
577
578# [ derive ( Clone , Copy ) ]
579# [ repr ( C ) ]
580pub struct DierR {
581 bits: u32,
582}
583
584impl DierR {
585 # [ doc = "Bit 14 - Trigger DMA request enable" ]
586 pub fn tde(&self) -> bool {
587 const OFFSET: u8 = 14u8;
588 self.bits & (1 << OFFSET) != 0
589 }
590 # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
591 pub fn cc4de(&self) -> bool {
592 const OFFSET: u8 = 12u8;
593 self.bits & (1 << OFFSET) != 0
594 }
595 # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
596 pub fn cc3de(&self) -> bool {
597 const OFFSET: u8 = 11u8;
598 self.bits & (1 << OFFSET) != 0
599 }
600 # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
601 pub fn cc2de(&self) -> bool {
602 const OFFSET: u8 = 10u8;
603 self.bits & (1 << OFFSET) != 0
604 }
605 # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
606 pub fn cc1de(&self) -> bool {
607 const OFFSET: u8 = 9u8;
608 self.bits & (1 << OFFSET) != 0
609 }
610 # [ doc = "Bit 8 - Update DMA request enable" ]
611 pub fn ude(&self) -> bool {
612 const OFFSET: u8 = 8u8;
613 self.bits & (1 << OFFSET) != 0
614 }
615 # [ doc = "Bit 6 - Trigger interrupt enable" ]
616 pub fn tie(&self) -> bool {
617 const OFFSET: u8 = 6u8;
618 self.bits & (1 << OFFSET) != 0
619 }
620 # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
621 pub fn cc4ie(&self) -> bool {
622 const OFFSET: u8 = 4u8;
623 self.bits & (1 << OFFSET) != 0
624 }
625 # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
626 pub fn cc3ie(&self) -> bool {
627 const OFFSET: u8 = 3u8;
628 self.bits & (1 << OFFSET) != 0
629 }
630 # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
631 pub fn cc2ie(&self) -> bool {
632 const OFFSET: u8 = 2u8;
633 self.bits & (1 << OFFSET) != 0
634 }
635 # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
636 pub fn cc1ie(&self) -> bool {
637 const OFFSET: u8 = 1u8;
638 self.bits & (1 << OFFSET) != 0
639 }
640 # [ doc = "Bit 0 - Update interrupt enable" ]
641 pub fn uie(&self) -> bool {
642 const OFFSET: u8 = 0u8;
643 self.bits & (1 << OFFSET) != 0
644 }
645}
646
647# [ derive ( Clone , Copy ) ]
648# [ repr ( C ) ]
649pub struct DierW {
650 bits: u32,
651}
652
653impl DierW {
654 # [ doc = r" Reset value" ]
655 pub fn reset_value() -> Self {
656 DierW { bits: 0 }
657 }
658 # [ doc = "Bit 14 - Trigger DMA request enable" ]
659 pub fn tde(&mut self, value: bool) -> &mut Self {
660 const OFFSET: u8 = 14u8;
661 if value {
662 self.bits |= 1 << OFFSET;
663 } else {
664 self.bits &= !(1 << OFFSET);
665 }
666 self
667 }
668 # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
669 pub fn cc4de(&mut self, value: bool) -> &mut Self {
670 const OFFSET: u8 = 12u8;
671 if value {
672 self.bits |= 1 << OFFSET;
673 } else {
674 self.bits &= !(1 << OFFSET);
675 }
676 self
677 }
678 # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
679 pub fn cc3de(&mut self, value: bool) -> &mut Self {
680 const OFFSET: u8 = 11u8;
681 if value {
682 self.bits |= 1 << OFFSET;
683 } else {
684 self.bits &= !(1 << OFFSET);
685 }
686 self
687 }
688 # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
689 pub fn cc2de(&mut self, value: bool) -> &mut Self {
690 const OFFSET: u8 = 10u8;
691 if value {
692 self.bits |= 1 << OFFSET;
693 } else {
694 self.bits &= !(1 << OFFSET);
695 }
696 self
697 }
698 # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
699 pub fn cc1de(&mut self, value: bool) -> &mut Self {
700 const OFFSET: u8 = 9u8;
701 if value {
702 self.bits |= 1 << OFFSET;
703 } else {
704 self.bits &= !(1 << OFFSET);
705 }
706 self
707 }
708 # [ doc = "Bit 8 - Update DMA request enable" ]
709 pub fn ude(&mut self, value: bool) -> &mut Self {
710 const OFFSET: u8 = 8u8;
711 if value {
712 self.bits |= 1 << OFFSET;
713 } else {
714 self.bits &= !(1 << OFFSET);
715 }
716 self
717 }
718 # [ doc = "Bit 6 - Trigger interrupt enable" ]
719 pub fn tie(&mut self, value: bool) -> &mut Self {
720 const OFFSET: u8 = 6u8;
721 if value {
722 self.bits |= 1 << OFFSET;
723 } else {
724 self.bits &= !(1 << OFFSET);
725 }
726 self
727 }
728 # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
729 pub fn cc4ie(&mut self, value: bool) -> &mut Self {
730 const OFFSET: u8 = 4u8;
731 if value {
732 self.bits |= 1 << OFFSET;
733 } else {
734 self.bits &= !(1 << OFFSET);
735 }
736 self
737 }
738 # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
739 pub fn cc3ie(&mut self, value: bool) -> &mut Self {
740 const OFFSET: u8 = 3u8;
741 if value {
742 self.bits |= 1 << OFFSET;
743 } else {
744 self.bits &= !(1 << OFFSET);
745 }
746 self
747 }
748 # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
749 pub fn cc2ie(&mut self, value: bool) -> &mut Self {
750 const OFFSET: u8 = 2u8;
751 if value {
752 self.bits |= 1 << OFFSET;
753 } else {
754 self.bits &= !(1 << OFFSET);
755 }
756 self
757 }
758 # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
759 pub fn cc1ie(&mut self, value: bool) -> &mut Self {
760 const OFFSET: u8 = 1u8;
761 if value {
762 self.bits |= 1 << OFFSET;
763 } else {
764 self.bits &= !(1 << OFFSET);
765 }
766 self
767 }
768 # [ doc = "Bit 0 - Update interrupt enable" ]
769 pub fn uie(&mut self, value: bool) -> &mut Self {
770 const OFFSET: u8 = 0u8;
771 if value {
772 self.bits |= 1 << OFFSET;
773 } else {
774 self.bits &= !(1 << OFFSET);
775 }
776 self
777 }
778}
779
780# [ repr ( C ) ]
781pub struct Sr {
782 register: ::volatile_register::RW<u32>,
783}
784
785impl Sr {
786 pub fn read_bits(&self) -> u32 {
787 self.register.read()
788 }
789 pub unsafe fn modify_bits<F>(&mut self, f: F)
790 where F: FnOnce(&mut u32)
791 {
792 let mut bits = self.register.read();
793 f(&mut bits);
794 self.register.write(bits);
795 }
796 pub unsafe fn write_bits(&mut self, bits: u32) {
797 self.register.write(bits);
798 }
799 pub fn modify<F>(&mut self, f: F)
800 where for<'w> F: FnOnce(&SrR, &'w mut SrW) -> &'w mut SrW
801 {
802 let bits = self.register.read();
803 let r = SrR { bits: bits };
804 let mut w = SrW { bits: bits };
805 f(&r, &mut w);
806 self.register.write(w.bits);
807 }
808 pub fn read(&self) -> SrR {
809 SrR { bits: self.register.read() }
810 }
811 pub fn write<F>(&mut self, f: F)
812 where F: FnOnce(&mut SrW) -> &mut SrW
813 {
814 let mut w = SrW::reset_value();
815 f(&mut w);
816 self.register.write(w.bits);
817 }
818}
819
820# [ derive ( Clone , Copy ) ]
821# [ repr ( C ) ]
822pub struct SrR {
823 bits: u32,
824}
825
826impl SrR {
827 # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
828 pub fn cc4of(&self) -> bool {
829 const OFFSET: u8 = 12u8;
830 self.bits & (1 << OFFSET) != 0
831 }
832 # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
833 pub fn cc3of(&self) -> bool {
834 const OFFSET: u8 = 11u8;
835 self.bits & (1 << OFFSET) != 0
836 }
837 # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
838 pub fn cc2of(&self) -> bool {
839 const OFFSET: u8 = 10u8;
840 self.bits & (1 << OFFSET) != 0
841 }
842 # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
843 pub fn cc1of(&self) -> bool {
844 const OFFSET: u8 = 9u8;
845 self.bits & (1 << OFFSET) != 0
846 }
847 # [ doc = "Bit 6 - Trigger interrupt flag" ]
848 pub fn tif(&self) -> bool {
849 const OFFSET: u8 = 6u8;
850 self.bits & (1 << OFFSET) != 0
851 }
852 # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
853 pub fn cc4if(&self) -> bool {
854 const OFFSET: u8 = 4u8;
855 self.bits & (1 << OFFSET) != 0
856 }
857 # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
858 pub fn cc3if(&self) -> bool {
859 const OFFSET: u8 = 3u8;
860 self.bits & (1 << OFFSET) != 0
861 }
862 # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
863 pub fn cc2if(&self) -> bool {
864 const OFFSET: u8 = 2u8;
865 self.bits & (1 << OFFSET) != 0
866 }
867 # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
868 pub fn cc1if(&self) -> bool {
869 const OFFSET: u8 = 1u8;
870 self.bits & (1 << OFFSET) != 0
871 }
872 # [ doc = "Bit 0 - Update interrupt flag" ]
873 pub fn uif(&self) -> bool {
874 const OFFSET: u8 = 0u8;
875 self.bits & (1 << OFFSET) != 0
876 }
877}
878
879# [ derive ( Clone , Copy ) ]
880# [ repr ( C ) ]
881pub struct SrW {
882 bits: u32,
883}
884
885impl SrW {
886 # [ doc = r" Reset value" ]
887 pub fn reset_value() -> Self {
888 SrW { bits: 0 }
889 }
890 # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
891 pub fn cc4of(&mut self, value: bool) -> &mut Self {
892 const OFFSET: u8 = 12u8;
893 if value {
894 self.bits |= 1 << OFFSET;
895 } else {
896 self.bits &= !(1 << OFFSET);
897 }
898 self
899 }
900 # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
901 pub fn cc3of(&mut self, value: bool) -> &mut Self {
902 const OFFSET: u8 = 11u8;
903 if value {
904 self.bits |= 1 << OFFSET;
905 } else {
906 self.bits &= !(1 << OFFSET);
907 }
908 self
909 }
910 # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
911 pub fn cc2of(&mut self, value: bool) -> &mut Self {
912 const OFFSET: u8 = 10u8;
913 if value {
914 self.bits |= 1 << OFFSET;
915 } else {
916 self.bits &= !(1 << OFFSET);
917 }
918 self
919 }
920 # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
921 pub fn cc1of(&mut self, value: bool) -> &mut Self {
922 const OFFSET: u8 = 9u8;
923 if value {
924 self.bits |= 1 << OFFSET;
925 } else {
926 self.bits &= !(1 << OFFSET);
927 }
928 self
929 }
930 # [ doc = "Bit 6 - Trigger interrupt flag" ]
931 pub fn tif(&mut self, value: bool) -> &mut Self {
932 const OFFSET: u8 = 6u8;
933 if value {
934 self.bits |= 1 << OFFSET;
935 } else {
936 self.bits &= !(1 << OFFSET);
937 }
938 self
939 }
940 # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
941 pub fn cc4if(&mut self, value: bool) -> &mut Self {
942 const OFFSET: u8 = 4u8;
943 if value {
944 self.bits |= 1 << OFFSET;
945 } else {
946 self.bits &= !(1 << OFFSET);
947 }
948 self
949 }
950 # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
951 pub fn cc3if(&mut self, value: bool) -> &mut Self {
952 const OFFSET: u8 = 3u8;
953 if value {
954 self.bits |= 1 << OFFSET;
955 } else {
956 self.bits &= !(1 << OFFSET);
957 }
958 self
959 }
960 # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
961 pub fn cc2if(&mut self, value: bool) -> &mut Self {
962 const OFFSET: u8 = 2u8;
963 if value {
964 self.bits |= 1 << OFFSET;
965 } else {
966 self.bits &= !(1 << OFFSET);
967 }
968 self
969 }
970 # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
971 pub fn cc1if(&mut self, value: bool) -> &mut Self {
972 const OFFSET: u8 = 1u8;
973 if value {
974 self.bits |= 1 << OFFSET;
975 } else {
976 self.bits &= !(1 << OFFSET);
977 }
978 self
979 }
980 # [ doc = "Bit 0 - Update interrupt flag" ]
981 pub fn uif(&mut self, value: bool) -> &mut Self {
982 const OFFSET: u8 = 0u8;
983 if value {
984 self.bits |= 1 << OFFSET;
985 } else {
986 self.bits &= !(1 << OFFSET);
987 }
988 self
989 }
990}
991
992# [ repr ( C ) ]
993pub struct Egr {
994 register: ::volatile_register::WO<u32>,
995}
996
997impl Egr {
998 pub unsafe fn write_bits(&mut self, bits: u32) {
999 self.register.write(bits);
1000 }
1001 pub fn write<F>(&self, f: F)
1002 where F: FnOnce(&mut EgrW) -> &mut EgrW
1003 {
1004 let mut w = EgrW::reset_value();
1005 f(&mut w);
1006 self.register.write(w.bits);
1007 }
1008}
1009
1010# [ derive ( Clone , Copy ) ]
1011# [ repr ( C ) ]
1012pub struct EgrW {
1013 bits: u32,
1014}
1015
1016impl EgrW {
1017 # [ doc = r" Reset value" ]
1018 pub fn reset_value() -> Self {
1019 EgrW { bits: 0 }
1020 }
1021 # [ doc = "Bit 6 - Trigger generation" ]
1022 pub fn tg(&mut self, value: bool) -> &mut Self {
1023 const OFFSET: u8 = 6u8;
1024 if value {
1025 self.bits |= 1 << OFFSET;
1026 } else {
1027 self.bits &= !(1 << OFFSET);
1028 }
1029 self
1030 }
1031 # [ doc = "Bit 4 - Capture/compare 4 generation" ]
1032 pub fn cc4g(&mut self, value: bool) -> &mut Self {
1033 const OFFSET: u8 = 4u8;
1034 if value {
1035 self.bits |= 1 << OFFSET;
1036 } else {
1037 self.bits &= !(1 << OFFSET);
1038 }
1039 self
1040 }
1041 # [ doc = "Bit 3 - Capture/compare 3 generation" ]
1042 pub fn cc3g(&mut self, value: bool) -> &mut Self {
1043 const OFFSET: u8 = 3u8;
1044 if value {
1045 self.bits |= 1 << OFFSET;
1046 } else {
1047 self.bits &= !(1 << OFFSET);
1048 }
1049 self
1050 }
1051 # [ doc = "Bit 2 - Capture/compare 2 generation" ]
1052 pub fn cc2g(&mut self, value: bool) -> &mut Self {
1053 const OFFSET: u8 = 2u8;
1054 if value {
1055 self.bits |= 1 << OFFSET;
1056 } else {
1057 self.bits &= !(1 << OFFSET);
1058 }
1059 self
1060 }
1061 # [ doc = "Bit 1 - Capture/compare 1 generation" ]
1062 pub fn cc1g(&mut self, value: bool) -> &mut Self {
1063 const OFFSET: u8 = 1u8;
1064 if value {
1065 self.bits |= 1 << OFFSET;
1066 } else {
1067 self.bits &= !(1 << OFFSET);
1068 }
1069 self
1070 }
1071 # [ doc = "Bit 0 - Update generation" ]
1072 pub fn ug(&mut self, value: bool) -> &mut Self {
1073 const OFFSET: u8 = 0u8;
1074 if value {
1075 self.bits |= 1 << OFFSET;
1076 } else {
1077 self.bits &= !(1 << OFFSET);
1078 }
1079 self
1080 }
1081}
1082
1083# [ repr ( C ) ]
1084pub struct Ccmr1Output {
1085 register: ::volatile_register::RW<u32>,
1086}
1087
1088impl Ccmr1Output {
1089 pub fn read_bits(&self) -> u32 {
1090 self.register.read()
1091 }
1092 pub unsafe fn modify_bits<F>(&mut self, f: F)
1093 where F: FnOnce(&mut u32)
1094 {
1095 let mut bits = self.register.read();
1096 f(&mut bits);
1097 self.register.write(bits);
1098 }
1099 pub unsafe fn write_bits(&mut self, bits: u32) {
1100 self.register.write(bits);
1101 }
1102 pub fn modify<F>(&mut self, f: F)
1103 where for<'w> F: FnOnce(&Ccmr1OutputR, &'w mut Ccmr1OutputW)
1104 -> &'w mut Ccmr1OutputW
1105 {
1106 let bits = self.register.read();
1107 let r = Ccmr1OutputR { bits: bits };
1108 let mut w = Ccmr1OutputW { bits: bits };
1109 f(&r, &mut w);
1110 self.register.write(w.bits);
1111 }
1112 pub fn read(&self) -> Ccmr1OutputR {
1113 Ccmr1OutputR { bits: self.register.read() }
1114 }
1115 pub fn write<F>(&mut self, f: F)
1116 where F: FnOnce(&mut Ccmr1OutputW) -> &mut Ccmr1OutputW
1117 {
1118 let mut w = Ccmr1OutputW::reset_value();
1119 f(&mut w);
1120 self.register.write(w.bits);
1121 }
1122}
1123
1124# [ derive ( Clone , Copy ) ]
1125# [ repr ( C ) ]
1126pub struct Ccmr1OutputR {
1127 bits: u32,
1128}
1129
1130impl Ccmr1OutputR {
1131 # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
1132 pub fn cc1s(&self) -> u8 {
1133 const MASK: u32 = 3;
1134 const OFFSET: u8 = 0u8;
1135 ((self.bits >> OFFSET) & MASK) as u8
1136 }
1137 # [ doc = "Bit 2 - Output compare 1 fast enable" ]
1138 pub fn oc1fe(&self) -> bool {
1139 const OFFSET: u8 = 2u8;
1140 self.bits & (1 << OFFSET) != 0
1141 }
1142 # [ doc = "Bit 3 - Output compare 1 preload enable" ]
1143 pub fn oc1pe(&self) -> bool {
1144 const OFFSET: u8 = 3u8;
1145 self.bits & (1 << OFFSET) != 0
1146 }
1147 # [ doc = "Bits 4:6 - Output compare 1 mode" ]
1148 pub fn oc1m(&self) -> u8 {
1149 const MASK: u32 = 7;
1150 const OFFSET: u8 = 4u8;
1151 ((self.bits >> OFFSET) & MASK) as u8
1152 }
1153 # [ doc = "Bit 7 - Output compare 1 clear enable" ]
1154 pub fn oc1ce(&self) -> bool {
1155 const OFFSET: u8 = 7u8;
1156 self.bits & (1 << OFFSET) != 0
1157 }
1158 # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
1159 pub fn cc2s(&self) -> u8 {
1160 const MASK: u32 = 3;
1161 const OFFSET: u8 = 8u8;
1162 ((self.bits >> OFFSET) & MASK) as u8
1163 }
1164 # [ doc = "Bit 10 - Output compare 2 fast enable" ]
1165 pub fn oc2fe(&self) -> bool {
1166 const OFFSET: u8 = 10u8;
1167 self.bits & (1 << OFFSET) != 0
1168 }
1169 # [ doc = "Bit 11 - Output compare 2 preload enable" ]
1170 pub fn oc2pe(&self) -> bool {
1171 const OFFSET: u8 = 11u8;
1172 self.bits & (1 << OFFSET) != 0
1173 }
1174 # [ doc = "Bits 12:14 - Output compare 2 mode" ]
1175 pub fn oc2m(&self) -> u8 {
1176 const MASK: u32 = 7;
1177 const OFFSET: u8 = 12u8;
1178 ((self.bits >> OFFSET) & MASK) as u8
1179 }
1180 # [ doc = "Bit 15 - Output compare 2 clear enable" ]
1181 pub fn oc2ce(&self) -> bool {
1182 const OFFSET: u8 = 15u8;
1183 self.bits & (1 << OFFSET) != 0
1184 }
1185 # [ doc = "Bit 16 - Output compare 1 mode bit 3" ]
1186 pub fn oc1m_3(&self) -> bool {
1187 const OFFSET: u8 = 16u8;
1188 self.bits & (1 << OFFSET) != 0
1189 }
1190 # [ doc = "Bit 24 - Output compare 2 mode bit 3" ]
1191 pub fn oc2m_3(&self) -> bool {
1192 const OFFSET: u8 = 24u8;
1193 self.bits & (1 << OFFSET) != 0
1194 }
1195}
1196
1197# [ derive ( Clone , Copy ) ]
1198# [ repr ( C ) ]
1199pub struct Ccmr1OutputW {
1200 bits: u32,
1201}
1202
1203impl Ccmr1OutputW {
1204 # [ doc = r" Reset value" ]
1205 pub fn reset_value() -> Self {
1206 Ccmr1OutputW { bits: 0 }
1207 }
1208 # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
1209 pub fn cc1s(&mut self, value: u8) -> &mut Self {
1210 const OFFSET: u8 = 0u8;
1211 const MASK: u8 = 3;
1212 self.bits &= !((MASK as u32) << OFFSET);
1213 self.bits |= ((value & MASK) as u32) << OFFSET;
1214 self
1215 }
1216 # [ doc = "Bit 2 - Output compare 1 fast enable" ]
1217 pub fn oc1fe(&mut self, value: bool) -> &mut Self {
1218 const OFFSET: u8 = 2u8;
1219 if value {
1220 self.bits |= 1 << OFFSET;
1221 } else {
1222 self.bits &= !(1 << OFFSET);
1223 }
1224 self
1225 }
1226 # [ doc = "Bit 3 - Output compare 1 preload enable" ]
1227 pub fn oc1pe(&mut self, value: bool) -> &mut Self {
1228 const OFFSET: u8 = 3u8;
1229 if value {
1230 self.bits |= 1 << OFFSET;
1231 } else {
1232 self.bits &= !(1 << OFFSET);
1233 }
1234 self
1235 }
1236 # [ doc = "Bits 4:6 - Output compare 1 mode" ]
1237 pub fn oc1m(&mut self, value: u8) -> &mut Self {
1238 const OFFSET: u8 = 4u8;
1239 const MASK: u8 = 7;
1240 self.bits &= !((MASK as u32) << OFFSET);
1241 self.bits |= ((value & MASK) as u32) << OFFSET;
1242 self
1243 }
1244 # [ doc = "Bit 7 - Output compare 1 clear enable" ]
1245 pub fn oc1ce(&mut self, value: bool) -> &mut Self {
1246 const OFFSET: u8 = 7u8;
1247 if value {
1248 self.bits |= 1 << OFFSET;
1249 } else {
1250 self.bits &= !(1 << OFFSET);
1251 }
1252 self
1253 }
1254 # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
1255 pub fn cc2s(&mut self, value: u8) -> &mut Self {
1256 const OFFSET: u8 = 8u8;
1257 const MASK: u8 = 3;
1258 self.bits &= !((MASK as u32) << OFFSET);
1259 self.bits |= ((value & MASK) as u32) << OFFSET;
1260 self
1261 }
1262 # [ doc = "Bit 10 - Output compare 2 fast enable" ]
1263 pub fn oc2fe(&mut self, value: bool) -> &mut Self {
1264 const OFFSET: u8 = 10u8;
1265 if value {
1266 self.bits |= 1 << OFFSET;
1267 } else {
1268 self.bits &= !(1 << OFFSET);
1269 }
1270 self
1271 }
1272 # [ doc = "Bit 11 - Output compare 2 preload enable" ]
1273 pub fn oc2pe(&mut self, value: bool) -> &mut Self {
1274 const OFFSET: u8 = 11u8;
1275 if value {
1276 self.bits |= 1 << OFFSET;
1277 } else {
1278 self.bits &= !(1 << OFFSET);
1279 }
1280 self
1281 }
1282 # [ doc = "Bits 12:14 - Output compare 2 mode" ]
1283 pub fn oc2m(&mut self, value: u8) -> &mut Self {
1284 const OFFSET: u8 = 12u8;
1285 const MASK: u8 = 7;
1286 self.bits &= !((MASK as u32) << OFFSET);
1287 self.bits |= ((value & MASK) as u32) << OFFSET;
1288 self
1289 }
1290 # [ doc = "Bit 15 - Output compare 2 clear enable" ]
1291 pub fn oc2ce(&mut self, value: bool) -> &mut Self {
1292 const OFFSET: u8 = 15u8;
1293 if value {
1294 self.bits |= 1 << OFFSET;
1295 } else {
1296 self.bits &= !(1 << OFFSET);
1297 }
1298 self
1299 }
1300 # [ doc = "Bit 16 - Output compare 1 mode bit 3" ]
1301 pub fn oc1m_3(&mut self, value: bool) -> &mut Self {
1302 const OFFSET: u8 = 16u8;
1303 if value {
1304 self.bits |= 1 << OFFSET;
1305 } else {
1306 self.bits &= !(1 << OFFSET);
1307 }
1308 self
1309 }
1310 # [ doc = "Bit 24 - Output compare 2 mode bit 3" ]
1311 pub fn oc2m_3(&mut self, value: bool) -> &mut Self {
1312 const OFFSET: u8 = 24u8;
1313 if value {
1314 self.bits |= 1 << OFFSET;
1315 } else {
1316 self.bits &= !(1 << OFFSET);
1317 }
1318 self
1319 }
1320}
1321
1322# [ repr ( C ) ]
1323pub struct Ccmr1Input {
1324 register: ::volatile_register::RW<u32>,
1325}
1326
1327impl Ccmr1Input {
1328 pub fn read_bits(&self) -> u32 {
1329 self.register.read()
1330 }
1331 pub unsafe fn modify_bits<F>(&mut self, f: F)
1332 where F: FnOnce(&mut u32)
1333 {
1334 let mut bits = self.register.read();
1335 f(&mut bits);
1336 self.register.write(bits);
1337 }
1338 pub unsafe fn write_bits(&mut self, bits: u32) {
1339 self.register.write(bits);
1340 }
1341 pub fn modify<F>(&mut self, f: F)
1342 where for<'w> F: FnOnce(&Ccmr1InputR, &'w mut Ccmr1InputW)
1343 -> &'w mut Ccmr1InputW
1344 {
1345 let bits = self.register.read();
1346 let r = Ccmr1InputR { bits: bits };
1347 let mut w = Ccmr1InputW { bits: bits };
1348 f(&r, &mut w);
1349 self.register.write(w.bits);
1350 }
1351 pub fn read(&self) -> Ccmr1InputR {
1352 Ccmr1InputR { bits: self.register.read() }
1353 }
1354 pub fn write<F>(&mut self, f: F)
1355 where F: FnOnce(&mut Ccmr1InputW) -> &mut Ccmr1InputW
1356 {
1357 let mut w = Ccmr1InputW::reset_value();
1358 f(&mut w);
1359 self.register.write(w.bits);
1360 }
1361}
1362
1363# [ derive ( Clone , Copy ) ]
1364# [ repr ( C ) ]
1365pub struct Ccmr1InputR {
1366 bits: u32,
1367}
1368
1369impl Ccmr1InputR {
1370 # [ doc = "Bits 12:15 - Input capture 2 filter" ]
1371 pub fn ic2f(&self) -> u8 {
1372 const MASK: u32 = 15;
1373 const OFFSET: u8 = 12u8;
1374 ((self.bits >> OFFSET) & MASK) as u8
1375 }
1376 # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
1377 pub fn ic2psc(&self) -> u8 {
1378 const MASK: u32 = 3;
1379 const OFFSET: u8 = 10u8;
1380 ((self.bits >> OFFSET) & MASK) as u8
1381 }
1382 # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
1383 pub fn cc2s(&self) -> u8 {
1384 const MASK: u32 = 3;
1385 const OFFSET: u8 = 8u8;
1386 ((self.bits >> OFFSET) & MASK) as u8
1387 }
1388 # [ doc = "Bits 4:7 - Input capture 1 filter" ]
1389 pub fn ic1f(&self) -> u8 {
1390 const MASK: u32 = 15;
1391 const OFFSET: u8 = 4u8;
1392 ((self.bits >> OFFSET) & MASK) as u8
1393 }
1394 # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
1395 pub fn ic1psc(&self) -> u8 {
1396 const MASK: u32 = 3;
1397 const OFFSET: u8 = 2u8;
1398 ((self.bits >> OFFSET) & MASK) as u8
1399 }
1400 # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
1401 pub fn cc1s(&self) -> u8 {
1402 const MASK: u32 = 3;
1403 const OFFSET: u8 = 0u8;
1404 ((self.bits >> OFFSET) & MASK) as u8
1405 }
1406}
1407
1408# [ derive ( Clone , Copy ) ]
1409# [ repr ( C ) ]
1410pub struct Ccmr1InputW {
1411 bits: u32,
1412}
1413
1414impl Ccmr1InputW {
1415 # [ doc = r" Reset value" ]
1416 pub fn reset_value() -> Self {
1417 Ccmr1InputW { bits: 0 }
1418 }
1419 # [ doc = "Bits 12:15 - Input capture 2 filter" ]
1420 pub fn ic2f(&mut self, value: u8) -> &mut Self {
1421 const OFFSET: u8 = 12u8;
1422 const MASK: u8 = 15;
1423 self.bits &= !((MASK as u32) << OFFSET);
1424 self.bits |= ((value & MASK) as u32) << OFFSET;
1425 self
1426 }
1427 # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
1428 pub fn ic2psc(&mut self, value: u8) -> &mut Self {
1429 const OFFSET: u8 = 10u8;
1430 const MASK: u8 = 3;
1431 self.bits &= !((MASK as u32) << OFFSET);
1432 self.bits |= ((value & MASK) as u32) << OFFSET;
1433 self
1434 }
1435 # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
1436 pub fn cc2s(&mut self, value: u8) -> &mut Self {
1437 const OFFSET: u8 = 8u8;
1438 const MASK: u8 = 3;
1439 self.bits &= !((MASK as u32) << OFFSET);
1440 self.bits |= ((value & MASK) as u32) << OFFSET;
1441 self
1442 }
1443 # [ doc = "Bits 4:7 - Input capture 1 filter" ]
1444 pub fn ic1f(&mut self, value: u8) -> &mut Self {
1445 const OFFSET: u8 = 4u8;
1446 const MASK: u8 = 15;
1447 self.bits &= !((MASK as u32) << OFFSET);
1448 self.bits |= ((value & MASK) as u32) << OFFSET;
1449 self
1450 }
1451 # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
1452 pub fn ic1psc(&mut self, value: u8) -> &mut Self {
1453 const OFFSET: u8 = 2u8;
1454 const MASK: u8 = 3;
1455 self.bits &= !((MASK as u32) << OFFSET);
1456 self.bits |= ((value & MASK) as u32) << OFFSET;
1457 self
1458 }
1459 # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
1460 pub fn cc1s(&mut self, value: u8) -> &mut Self {
1461 const OFFSET: u8 = 0u8;
1462 const MASK: u8 = 3;
1463 self.bits &= !((MASK as u32) << OFFSET);
1464 self.bits |= ((value & MASK) as u32) << OFFSET;
1465 self
1466 }
1467}
1468
1469# [ repr ( C ) ]
1470pub struct Ccmr2Output {
1471 register: ::volatile_register::RW<u32>,
1472}
1473
1474impl Ccmr2Output {
1475 pub fn read_bits(&self) -> u32 {
1476 self.register.read()
1477 }
1478 pub unsafe fn modify_bits<F>(&mut self, f: F)
1479 where F: FnOnce(&mut u32)
1480 {
1481 let mut bits = self.register.read();
1482 f(&mut bits);
1483 self.register.write(bits);
1484 }
1485 pub unsafe fn write_bits(&mut self, bits: u32) {
1486 self.register.write(bits);
1487 }
1488 pub fn modify<F>(&mut self, f: F)
1489 where for<'w> F: FnOnce(&Ccmr2OutputR, &'w mut Ccmr2OutputW)
1490 -> &'w mut Ccmr2OutputW
1491 {
1492 let bits = self.register.read();
1493 let r = Ccmr2OutputR { bits: bits };
1494 let mut w = Ccmr2OutputW { bits: bits };
1495 f(&r, &mut w);
1496 self.register.write(w.bits);
1497 }
1498 pub fn read(&self) -> Ccmr2OutputR {
1499 Ccmr2OutputR { bits: self.register.read() }
1500 }
1501 pub fn write<F>(&mut self, f: F)
1502 where F: FnOnce(&mut Ccmr2OutputW) -> &mut Ccmr2OutputW
1503 {
1504 let mut w = Ccmr2OutputW::reset_value();
1505 f(&mut w);
1506 self.register.write(w.bits);
1507 }
1508}
1509
1510# [ derive ( Clone , Copy ) ]
1511# [ repr ( C ) ]
1512pub struct Ccmr2OutputR {
1513 bits: u32,
1514}
1515
1516impl Ccmr2OutputR {
1517 # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
1518 pub fn cc3s(&self) -> u8 {
1519 const MASK: u32 = 3;
1520 const OFFSET: u8 = 0u8;
1521 ((self.bits >> OFFSET) & MASK) as u8
1522 }
1523 # [ doc = "Bit 2 - Output compare 3 fast enable" ]
1524 pub fn oc3fe(&self) -> bool {
1525 const OFFSET: u8 = 2u8;
1526 self.bits & (1 << OFFSET) != 0
1527 }
1528 # [ doc = "Bit 3 - Output compare 3 preload enable" ]
1529 pub fn oc3pe(&self) -> bool {
1530 const OFFSET: u8 = 3u8;
1531 self.bits & (1 << OFFSET) != 0
1532 }
1533 # [ doc = "Bits 4:6 - Output compare 3 mode" ]
1534 pub fn oc3m(&self) -> u8 {
1535 const MASK: u32 = 7;
1536 const OFFSET: u8 = 4u8;
1537 ((self.bits >> OFFSET) & MASK) as u8
1538 }
1539 # [ doc = "Bit 7 - Output compare 3 clear enable" ]
1540 pub fn oc3ce(&self) -> bool {
1541 const OFFSET: u8 = 7u8;
1542 self.bits & (1 << OFFSET) != 0
1543 }
1544 # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
1545 pub fn cc4s(&self) -> u8 {
1546 const MASK: u32 = 3;
1547 const OFFSET: u8 = 8u8;
1548 ((self.bits >> OFFSET) & MASK) as u8
1549 }
1550 # [ doc = "Bit 10 - Output compare 4 fast enable" ]
1551 pub fn oc4fe(&self) -> bool {
1552 const OFFSET: u8 = 10u8;
1553 self.bits & (1 << OFFSET) != 0
1554 }
1555 # [ doc = "Bit 11 - Output compare 4 preload enable" ]
1556 pub fn oc4pe(&self) -> bool {
1557 const OFFSET: u8 = 11u8;
1558 self.bits & (1 << OFFSET) != 0
1559 }
1560 # [ doc = "Bits 12:14 - Output compare 4 mode" ]
1561 pub fn oc4m(&self) -> u8 {
1562 const MASK: u32 = 7;
1563 const OFFSET: u8 = 12u8;
1564 ((self.bits >> OFFSET) & MASK) as u8
1565 }
1566 # [ doc = "Bit 15 - Output compare 4 clear enable" ]
1567 pub fn o24ce(&self) -> bool {
1568 const OFFSET: u8 = 15u8;
1569 self.bits & (1 << OFFSET) != 0
1570 }
1571 # [ doc = "Bit 16 - Output compare 3 mode bit3" ]
1572 pub fn oc3m_3(&self) -> bool {
1573 const OFFSET: u8 = 16u8;
1574 self.bits & (1 << OFFSET) != 0
1575 }
1576 # [ doc = "Bit 24 - Output compare 4 mode bit3" ]
1577 pub fn oc4m_3(&self) -> bool {
1578 const OFFSET: u8 = 24u8;
1579 self.bits & (1 << OFFSET) != 0
1580 }
1581}
1582
1583# [ derive ( Clone , Copy ) ]
1584# [ repr ( C ) ]
1585pub struct Ccmr2OutputW {
1586 bits: u32,
1587}
1588
1589impl Ccmr2OutputW {
1590 # [ doc = r" Reset value" ]
1591 pub fn reset_value() -> Self {
1592 Ccmr2OutputW { bits: 0 }
1593 }
1594 # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
1595 pub fn cc3s(&mut self, value: u8) -> &mut Self {
1596 const OFFSET: u8 = 0u8;
1597 const MASK: u8 = 3;
1598 self.bits &= !((MASK as u32) << OFFSET);
1599 self.bits |= ((value & MASK) as u32) << OFFSET;
1600 self
1601 }
1602 # [ doc = "Bit 2 - Output compare 3 fast enable" ]
1603 pub fn oc3fe(&mut self, value: bool) -> &mut Self {
1604 const OFFSET: u8 = 2u8;
1605 if value {
1606 self.bits |= 1 << OFFSET;
1607 } else {
1608 self.bits &= !(1 << OFFSET);
1609 }
1610 self
1611 }
1612 # [ doc = "Bit 3 - Output compare 3 preload enable" ]
1613 pub fn oc3pe(&mut self, value: bool) -> &mut Self {
1614 const OFFSET: u8 = 3u8;
1615 if value {
1616 self.bits |= 1 << OFFSET;
1617 } else {
1618 self.bits &= !(1 << OFFSET);
1619 }
1620 self
1621 }
1622 # [ doc = "Bits 4:6 - Output compare 3 mode" ]
1623 pub fn oc3m(&mut self, value: u8) -> &mut Self {
1624 const OFFSET: u8 = 4u8;
1625 const MASK: u8 = 7;
1626 self.bits &= !((MASK as u32) << OFFSET);
1627 self.bits |= ((value & MASK) as u32) << OFFSET;
1628 self
1629 }
1630 # [ doc = "Bit 7 - Output compare 3 clear enable" ]
1631 pub fn oc3ce(&mut self, value: bool) -> &mut Self {
1632 const OFFSET: u8 = 7u8;
1633 if value {
1634 self.bits |= 1 << OFFSET;
1635 } else {
1636 self.bits &= !(1 << OFFSET);
1637 }
1638 self
1639 }
1640 # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
1641 pub fn cc4s(&mut self, value: u8) -> &mut Self {
1642 const OFFSET: u8 = 8u8;
1643 const MASK: u8 = 3;
1644 self.bits &= !((MASK as u32) << OFFSET);
1645 self.bits |= ((value & MASK) as u32) << OFFSET;
1646 self
1647 }
1648 # [ doc = "Bit 10 - Output compare 4 fast enable" ]
1649 pub fn oc4fe(&mut self, value: bool) -> &mut Self {
1650 const OFFSET: u8 = 10u8;
1651 if value {
1652 self.bits |= 1 << OFFSET;
1653 } else {
1654 self.bits &= !(1 << OFFSET);
1655 }
1656 self
1657 }
1658 # [ doc = "Bit 11 - Output compare 4 preload enable" ]
1659 pub fn oc4pe(&mut self, value: bool) -> &mut Self {
1660 const OFFSET: u8 = 11u8;
1661 if value {
1662 self.bits |= 1 << OFFSET;
1663 } else {
1664 self.bits &= !(1 << OFFSET);
1665 }
1666 self
1667 }
1668 # [ doc = "Bits 12:14 - Output compare 4 mode" ]
1669 pub fn oc4m(&mut self, value: u8) -> &mut Self {
1670 const OFFSET: u8 = 12u8;
1671 const MASK: u8 = 7;
1672 self.bits &= !((MASK as u32) << OFFSET);
1673 self.bits |= ((value & MASK) as u32) << OFFSET;
1674 self
1675 }
1676 # [ doc = "Bit 15 - Output compare 4 clear enable" ]
1677 pub fn o24ce(&mut self, value: bool) -> &mut Self {
1678 const OFFSET: u8 = 15u8;
1679 if value {
1680 self.bits |= 1 << OFFSET;
1681 } else {
1682 self.bits &= !(1 << OFFSET);
1683 }
1684 self
1685 }
1686 # [ doc = "Bit 16 - Output compare 3 mode bit3" ]
1687 pub fn oc3m_3(&mut self, value: bool) -> &mut Self {
1688 const OFFSET: u8 = 16u8;
1689 if value {
1690 self.bits |= 1 << OFFSET;
1691 } else {
1692 self.bits &= !(1 << OFFSET);
1693 }
1694 self
1695 }
1696 # [ doc = "Bit 24 - Output compare 4 mode bit3" ]
1697 pub fn oc4m_3(&mut self, value: bool) -> &mut Self {
1698 const OFFSET: u8 = 24u8;
1699 if value {
1700 self.bits |= 1 << OFFSET;
1701 } else {
1702 self.bits &= !(1 << OFFSET);
1703 }
1704 self
1705 }
1706}
1707
1708# [ repr ( C ) ]
1709pub struct Ccmr2Input {
1710 register: ::volatile_register::RW<u32>,
1711}
1712
1713impl Ccmr2Input {
1714 pub fn read_bits(&self) -> u32 {
1715 self.register.read()
1716 }
1717 pub unsafe fn modify_bits<F>(&mut self, f: F)
1718 where F: FnOnce(&mut u32)
1719 {
1720 let mut bits = self.register.read();
1721 f(&mut bits);
1722 self.register.write(bits);
1723 }
1724 pub unsafe fn write_bits(&mut self, bits: u32) {
1725 self.register.write(bits);
1726 }
1727 pub fn modify<F>(&mut self, f: F)
1728 where for<'w> F: FnOnce(&Ccmr2InputR, &'w mut Ccmr2InputW)
1729 -> &'w mut Ccmr2InputW
1730 {
1731 let bits = self.register.read();
1732 let r = Ccmr2InputR { bits: bits };
1733 let mut w = Ccmr2InputW { bits: bits };
1734 f(&r, &mut w);
1735 self.register.write(w.bits);
1736 }
1737 pub fn read(&self) -> Ccmr2InputR {
1738 Ccmr2InputR { bits: self.register.read() }
1739 }
1740 pub fn write<F>(&mut self, f: F)
1741 where F: FnOnce(&mut Ccmr2InputW) -> &mut Ccmr2InputW
1742 {
1743 let mut w = Ccmr2InputW::reset_value();
1744 f(&mut w);
1745 self.register.write(w.bits);
1746 }
1747}
1748
1749# [ derive ( Clone , Copy ) ]
1750# [ repr ( C ) ]
1751pub struct Ccmr2InputR {
1752 bits: u32,
1753}
1754
1755impl Ccmr2InputR {
1756 # [ doc = "Bits 12:15 - Input capture 4 filter" ]
1757 pub fn ic4f(&self) -> u8 {
1758 const MASK: u32 = 15;
1759 const OFFSET: u8 = 12u8;
1760 ((self.bits >> OFFSET) & MASK) as u8
1761 }
1762 # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
1763 pub fn ic4psc(&self) -> u8 {
1764 const MASK: u32 = 3;
1765 const OFFSET: u8 = 10u8;
1766 ((self.bits >> OFFSET) & MASK) as u8
1767 }
1768 # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
1769 pub fn cc4s(&self) -> u8 {
1770 const MASK: u32 = 3;
1771 const OFFSET: u8 = 8u8;
1772 ((self.bits >> OFFSET) & MASK) as u8
1773 }
1774 # [ doc = "Bits 4:7 - Input capture 3 filter" ]
1775 pub fn ic3f(&self) -> u8 {
1776 const MASK: u32 = 15;
1777 const OFFSET: u8 = 4u8;
1778 ((self.bits >> OFFSET) & MASK) as u8
1779 }
1780 # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
1781 pub fn ic3psc(&self) -> u8 {
1782 const MASK: u32 = 3;
1783 const OFFSET: u8 = 2u8;
1784 ((self.bits >> OFFSET) & MASK) as u8
1785 }
1786 # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
1787 pub fn cc3s(&self) -> u8 {
1788 const MASK: u32 = 3;
1789 const OFFSET: u8 = 0u8;
1790 ((self.bits >> OFFSET) & MASK) as u8
1791 }
1792}
1793
1794# [ derive ( Clone , Copy ) ]
1795# [ repr ( C ) ]
1796pub struct Ccmr2InputW {
1797 bits: u32,
1798}
1799
1800impl Ccmr2InputW {
1801 # [ doc = r" Reset value" ]
1802 pub fn reset_value() -> Self {
1803 Ccmr2InputW { bits: 0 }
1804 }
1805 # [ doc = "Bits 12:15 - Input capture 4 filter" ]
1806 pub fn ic4f(&mut self, value: u8) -> &mut Self {
1807 const OFFSET: u8 = 12u8;
1808 const MASK: u8 = 15;
1809 self.bits &= !((MASK as u32) << OFFSET);
1810 self.bits |= ((value & MASK) as u32) << OFFSET;
1811 self
1812 }
1813 # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
1814 pub fn ic4psc(&mut self, value: u8) -> &mut Self {
1815 const OFFSET: u8 = 10u8;
1816 const MASK: u8 = 3;
1817 self.bits &= !((MASK as u32) << OFFSET);
1818 self.bits |= ((value & MASK) as u32) << OFFSET;
1819 self
1820 }
1821 # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
1822 pub fn cc4s(&mut self, value: u8) -> &mut Self {
1823 const OFFSET: u8 = 8u8;
1824 const MASK: u8 = 3;
1825 self.bits &= !((MASK as u32) << OFFSET);
1826 self.bits |= ((value & MASK) as u32) << OFFSET;
1827 self
1828 }
1829 # [ doc = "Bits 4:7 - Input capture 3 filter" ]
1830 pub fn ic3f(&mut self, value: u8) -> &mut Self {
1831 const OFFSET: u8 = 4u8;
1832 const MASK: u8 = 15;
1833 self.bits &= !((MASK as u32) << OFFSET);
1834 self.bits |= ((value & MASK) as u32) << OFFSET;
1835 self
1836 }
1837 # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
1838 pub fn ic3psc(&mut self, value: u8) -> &mut Self {
1839 const OFFSET: u8 = 2u8;
1840 const MASK: u8 = 3;
1841 self.bits &= !((MASK as u32) << OFFSET);
1842 self.bits |= ((value & MASK) as u32) << OFFSET;
1843 self
1844 }
1845 # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
1846 pub fn cc3s(&mut self, value: u8) -> &mut Self {
1847 const OFFSET: u8 = 0u8;
1848 const MASK: u8 = 3;
1849 self.bits &= !((MASK as u32) << OFFSET);
1850 self.bits |= ((value & MASK) as u32) << OFFSET;
1851 self
1852 }
1853}
1854
1855# [ repr ( C ) ]
1856pub struct Ccer {
1857 register: ::volatile_register::RW<u32>,
1858}
1859
1860impl Ccer {
1861 pub fn read_bits(&self) -> u32 {
1862 self.register.read()
1863 }
1864 pub unsafe fn modify_bits<F>(&mut self, f: F)
1865 where F: FnOnce(&mut u32)
1866 {
1867 let mut bits = self.register.read();
1868 f(&mut bits);
1869 self.register.write(bits);
1870 }
1871 pub unsafe fn write_bits(&mut self, bits: u32) {
1872 self.register.write(bits);
1873 }
1874 pub fn modify<F>(&mut self, f: F)
1875 where for<'w> F: FnOnce(&CcerR, &'w mut CcerW) -> &'w mut CcerW
1876 {
1877 let bits = self.register.read();
1878 let r = CcerR { bits: bits };
1879 let mut w = CcerW { bits: bits };
1880 f(&r, &mut w);
1881 self.register.write(w.bits);
1882 }
1883 pub fn read(&self) -> CcerR {
1884 CcerR { bits: self.register.read() }
1885 }
1886 pub fn write<F>(&mut self, f: F)
1887 where F: FnOnce(&mut CcerW) -> &mut CcerW
1888 {
1889 let mut w = CcerW::reset_value();
1890 f(&mut w);
1891 self.register.write(w.bits);
1892 }
1893}
1894
1895# [ derive ( Clone , Copy ) ]
1896# [ repr ( C ) ]
1897pub struct CcerR {
1898 bits: u32,
1899}
1900
1901impl CcerR {
1902 # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
1903 pub fn cc1e(&self) -> bool {
1904 const OFFSET: u8 = 0u8;
1905 self.bits & (1 << OFFSET) != 0
1906 }
1907 # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
1908 pub fn cc1p(&self) -> bool {
1909 const OFFSET: u8 = 1u8;
1910 self.bits & (1 << OFFSET) != 0
1911 }
1912 # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
1913 pub fn cc1np(&self) -> bool {
1914 const OFFSET: u8 = 3u8;
1915 self.bits & (1 << OFFSET) != 0
1916 }
1917 # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
1918 pub fn cc2e(&self) -> bool {
1919 const OFFSET: u8 = 4u8;
1920 self.bits & (1 << OFFSET) != 0
1921 }
1922 # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
1923 pub fn cc2p(&self) -> bool {
1924 const OFFSET: u8 = 5u8;
1925 self.bits & (1 << OFFSET) != 0
1926 }
1927 # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
1928 pub fn cc2np(&self) -> bool {
1929 const OFFSET: u8 = 7u8;
1930 self.bits & (1 << OFFSET) != 0
1931 }
1932 # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
1933 pub fn cc3e(&self) -> bool {
1934 const OFFSET: u8 = 8u8;
1935 self.bits & (1 << OFFSET) != 0
1936 }
1937 # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
1938 pub fn cc3p(&self) -> bool {
1939 const OFFSET: u8 = 9u8;
1940 self.bits & (1 << OFFSET) != 0
1941 }
1942 # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
1943 pub fn cc3np(&self) -> bool {
1944 const OFFSET: u8 = 11u8;
1945 self.bits & (1 << OFFSET) != 0
1946 }
1947 # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
1948 pub fn cc4e(&self) -> bool {
1949 const OFFSET: u8 = 12u8;
1950 self.bits & (1 << OFFSET) != 0
1951 }
1952 # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
1953 pub fn cc4p(&self) -> bool {
1954 const OFFSET: u8 = 13u8;
1955 self.bits & (1 << OFFSET) != 0
1956 }
1957 # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
1958 pub fn cc4np(&self) -> bool {
1959 const OFFSET: u8 = 15u8;
1960 self.bits & (1 << OFFSET) != 0
1961 }
1962}
1963
1964# [ derive ( Clone , Copy ) ]
1965# [ repr ( C ) ]
1966pub struct CcerW {
1967 bits: u32,
1968}
1969
1970impl CcerW {
1971 # [ doc = r" Reset value" ]
1972 pub fn reset_value() -> Self {
1973 CcerW { bits: 0 }
1974 }
1975 # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
1976 pub fn cc1e(&mut self, value: bool) -> &mut Self {
1977 const OFFSET: u8 = 0u8;
1978 if value {
1979 self.bits |= 1 << OFFSET;
1980 } else {
1981 self.bits &= !(1 << OFFSET);
1982 }
1983 self
1984 }
1985 # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
1986 pub fn cc1p(&mut self, value: bool) -> &mut Self {
1987 const OFFSET: u8 = 1u8;
1988 if value {
1989 self.bits |= 1 << OFFSET;
1990 } else {
1991 self.bits &= !(1 << OFFSET);
1992 }
1993 self
1994 }
1995 # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
1996 pub fn cc1np(&mut self, value: bool) -> &mut Self {
1997 const OFFSET: u8 = 3u8;
1998 if value {
1999 self.bits |= 1 << OFFSET;
2000 } else {
2001 self.bits &= !(1 << OFFSET);
2002 }
2003 self
2004 }
2005 # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
2006 pub fn cc2e(&mut self, value: bool) -> &mut Self {
2007 const OFFSET: u8 = 4u8;
2008 if value {
2009 self.bits |= 1 << OFFSET;
2010 } else {
2011 self.bits &= !(1 << OFFSET);
2012 }
2013 self
2014 }
2015 # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
2016 pub fn cc2p(&mut self, value: bool) -> &mut Self {
2017 const OFFSET: u8 = 5u8;
2018 if value {
2019 self.bits |= 1 << OFFSET;
2020 } else {
2021 self.bits &= !(1 << OFFSET);
2022 }
2023 self
2024 }
2025 # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
2026 pub fn cc2np(&mut self, value: bool) -> &mut Self {
2027 const OFFSET: u8 = 7u8;
2028 if value {
2029 self.bits |= 1 << OFFSET;
2030 } else {
2031 self.bits &= !(1 << OFFSET);
2032 }
2033 self
2034 }
2035 # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
2036 pub fn cc3e(&mut self, value: bool) -> &mut Self {
2037 const OFFSET: u8 = 8u8;
2038 if value {
2039 self.bits |= 1 << OFFSET;
2040 } else {
2041 self.bits &= !(1 << OFFSET);
2042 }
2043 self
2044 }
2045 # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
2046 pub fn cc3p(&mut self, value: bool) -> &mut Self {
2047 const OFFSET: u8 = 9u8;
2048 if value {
2049 self.bits |= 1 << OFFSET;
2050 } else {
2051 self.bits &= !(1 << OFFSET);
2052 }
2053 self
2054 }
2055 # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
2056 pub fn cc3np(&mut self, value: bool) -> &mut Self {
2057 const OFFSET: u8 = 11u8;
2058 if value {
2059 self.bits |= 1 << OFFSET;
2060 } else {
2061 self.bits &= !(1 << OFFSET);
2062 }
2063 self
2064 }
2065 # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
2066 pub fn cc4e(&mut self, value: bool) -> &mut Self {
2067 const OFFSET: u8 = 12u8;
2068 if value {
2069 self.bits |= 1 << OFFSET;
2070 } else {
2071 self.bits &= !(1 << OFFSET);
2072 }
2073 self
2074 }
2075 # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
2076 pub fn cc4p(&mut self, value: bool) -> &mut Self {
2077 const OFFSET: u8 = 13u8;
2078 if value {
2079 self.bits |= 1 << OFFSET;
2080 } else {
2081 self.bits &= !(1 << OFFSET);
2082 }
2083 self
2084 }
2085 # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
2086 pub fn cc4np(&mut self, value: bool) -> &mut Self {
2087 const OFFSET: u8 = 15u8;
2088 if value {
2089 self.bits |= 1 << OFFSET;
2090 } else {
2091 self.bits &= !(1 << OFFSET);
2092 }
2093 self
2094 }
2095}
2096
2097# [ repr ( C ) ]
2098pub struct Cnt {
2099 register: ::volatile_register::RW<u32>,
2100}
2101
2102impl Cnt {
2103 pub fn read_bits(&self) -> u32 {
2104 self.register.read()
2105 }
2106 pub unsafe fn modify_bits<F>(&mut self, f: F)
2107 where F: FnOnce(&mut u32)
2108 {
2109 let mut bits = self.register.read();
2110 f(&mut bits);
2111 self.register.write(bits);
2112 }
2113 pub unsafe fn write_bits(&mut self, bits: u32) {
2114 self.register.write(bits);
2115 }
2116 pub fn modify<F>(&mut self, f: F)
2117 where for<'w> F: FnOnce(&CntR, &'w mut CntW) -> &'w mut CntW
2118 {
2119 let bits = self.register.read();
2120 let r = CntR { bits: bits };
2121 let mut w = CntW { bits: bits };
2122 f(&r, &mut w);
2123 self.register.write(w.bits);
2124 }
2125 pub fn read(&self) -> CntR {
2126 CntR { bits: self.register.read() }
2127 }
2128 pub fn write<F>(&mut self, f: F)
2129 where F: FnOnce(&mut CntW) -> &mut CntW
2130 {
2131 let mut w = CntW::reset_value();
2132 f(&mut w);
2133 self.register.write(w.bits);
2134 }
2135}
2136
2137# [ derive ( Clone , Copy ) ]
2138# [ repr ( C ) ]
2139pub struct CntR {
2140 bits: u32,
2141}
2142
2143impl CntR {
2144 # [ doc = "Bits 0:15 - Low counter value" ]
2145 pub fn cntl(&self) -> u16 {
2146 const MASK: u32 = 65535;
2147 const OFFSET: u8 = 0u8;
2148 ((self.bits >> OFFSET) & MASK) as u16
2149 }
2150 # [ doc = "Bits 16:30 - High counter value" ]
2151 pub fn cnth(&self) -> u16 {
2152 const MASK: u32 = 32767;
2153 const OFFSET: u8 = 16u8;
2154 ((self.bits >> OFFSET) & MASK) as u16
2155 }
2156 # [ doc = "Bit 31 - if IUFREMAP=0 than CNT with read write access else UIFCPY with read only access" ]
2157 pub fn cnt_or_uifcpy(&self) -> bool {
2158 const OFFSET: u8 = 31u8;
2159 self.bits & (1 << OFFSET) != 0
2160 }
2161}
2162
2163# [ derive ( Clone , Copy ) ]
2164# [ repr ( C ) ]
2165pub struct CntW {
2166 bits: u32,
2167}
2168
2169impl CntW {
2170 # [ doc = r" Reset value" ]
2171 pub fn reset_value() -> Self {
2172 CntW { bits: 0 }
2173 }
2174 # [ doc = "Bits 0:15 - Low counter value" ]
2175 pub fn cntl(&mut self, value: u16) -> &mut Self {
2176 const OFFSET: u8 = 0u8;
2177 const MASK: u16 = 65535;
2178 self.bits &= !((MASK as u32) << OFFSET);
2179 self.bits |= ((value & MASK) as u32) << OFFSET;
2180 self
2181 }
2182 # [ doc = "Bits 16:30 - High counter value" ]
2183 pub fn cnth(&mut self, value: u16) -> &mut Self {
2184 const OFFSET: u8 = 16u8;
2185 const MASK: u16 = 32767;
2186 self.bits &= !((MASK as u32) << OFFSET);
2187 self.bits |= ((value & MASK) as u32) << OFFSET;
2188 self
2189 }
2190 # [ doc = "Bit 31 - if IUFREMAP=0 than CNT with read write access else UIFCPY with read only access" ]
2191 pub fn cnt_or_uifcpy(&mut self, value: bool) -> &mut Self {
2192 const OFFSET: u8 = 31u8;
2193 if value {
2194 self.bits |= 1 << OFFSET;
2195 } else {
2196 self.bits &= !(1 << OFFSET);
2197 }
2198 self
2199 }
2200}
2201
2202# [ repr ( C ) ]
2203pub struct Psc {
2204 register: ::volatile_register::RW<u32>,
2205}
2206
2207impl Psc {
2208 pub fn read_bits(&self) -> u32 {
2209 self.register.read()
2210 }
2211 pub unsafe fn modify_bits<F>(&mut self, f: F)
2212 where F: FnOnce(&mut u32)
2213 {
2214 let mut bits = self.register.read();
2215 f(&mut bits);
2216 self.register.write(bits);
2217 }
2218 pub unsafe fn write_bits(&mut self, bits: u32) {
2219 self.register.write(bits);
2220 }
2221 pub fn modify<F>(&mut self, f: F)
2222 where for<'w> F: FnOnce(&PscR, &'w mut PscW) -> &'w mut PscW
2223 {
2224 let bits = self.register.read();
2225 let r = PscR { bits: bits };
2226 let mut w = PscW { bits: bits };
2227 f(&r, &mut w);
2228 self.register.write(w.bits);
2229 }
2230 pub fn read(&self) -> PscR {
2231 PscR { bits: self.register.read() }
2232 }
2233 pub fn write<F>(&mut self, f: F)
2234 where F: FnOnce(&mut PscW) -> &mut PscW
2235 {
2236 let mut w = PscW::reset_value();
2237 f(&mut w);
2238 self.register.write(w.bits);
2239 }
2240}
2241
2242# [ derive ( Clone , Copy ) ]
2243# [ repr ( C ) ]
2244pub struct PscR {
2245 bits: u32,
2246}
2247
2248impl PscR {
2249 # [ doc = "Bits 0:15 - Prescaler value" ]
2250 pub fn psc(&self) -> u16 {
2251 const MASK: u32 = 65535;
2252 const OFFSET: u8 = 0u8;
2253 ((self.bits >> OFFSET) & MASK) as u16
2254 }
2255}
2256
2257# [ derive ( Clone , Copy ) ]
2258# [ repr ( C ) ]
2259pub struct PscW {
2260 bits: u32,
2261}
2262
2263impl PscW {
2264 # [ doc = r" Reset value" ]
2265 pub fn reset_value() -> Self {
2266 PscW { bits: 0 }
2267 }
2268 # [ doc = "Bits 0:15 - Prescaler value" ]
2269 pub fn psc(&mut self, value: u16) -> &mut Self {
2270 const OFFSET: u8 = 0u8;
2271 const MASK: u16 = 65535;
2272 self.bits &= !((MASK as u32) << OFFSET);
2273 self.bits |= ((value & MASK) as u32) << OFFSET;
2274 self
2275 }
2276}
2277
2278# [ repr ( C ) ]
2279pub struct Arr {
2280 register: ::volatile_register::RW<u32>,
2281}
2282
2283impl Arr {
2284 pub fn read_bits(&self) -> u32 {
2285 self.register.read()
2286 }
2287 pub unsafe fn modify_bits<F>(&mut self, f: F)
2288 where F: FnOnce(&mut u32)
2289 {
2290 let mut bits = self.register.read();
2291 f(&mut bits);
2292 self.register.write(bits);
2293 }
2294 pub unsafe fn write_bits(&mut self, bits: u32) {
2295 self.register.write(bits);
2296 }
2297 pub fn modify<F>(&mut self, f: F)
2298 where for<'w> F: FnOnce(&ArrR, &'w mut ArrW) -> &'w mut ArrW
2299 {
2300 let bits = self.register.read();
2301 let r = ArrR { bits: bits };
2302 let mut w = ArrW { bits: bits };
2303 f(&r, &mut w);
2304 self.register.write(w.bits);
2305 }
2306 pub fn read(&self) -> ArrR {
2307 ArrR { bits: self.register.read() }
2308 }
2309 pub fn write<F>(&mut self, f: F)
2310 where F: FnOnce(&mut ArrW) -> &mut ArrW
2311 {
2312 let mut w = ArrW::reset_value();
2313 f(&mut w);
2314 self.register.write(w.bits);
2315 }
2316}
2317
2318# [ derive ( Clone , Copy ) ]
2319# [ repr ( C ) ]
2320pub struct ArrR {
2321 bits: u32,
2322}
2323
2324impl ArrR {
2325 # [ doc = "Bits 0:15 - Low Auto-reload value" ]
2326 pub fn arrl(&self) -> u16 {
2327 const MASK: u32 = 65535;
2328 const OFFSET: u8 = 0u8;
2329 ((self.bits >> OFFSET) & MASK) as u16
2330 }
2331 # [ doc = "Bits 16:31 - High Auto-reload value" ]
2332 pub fn arrh(&self) -> u16 {
2333 const MASK: u32 = 65535;
2334 const OFFSET: u8 = 16u8;
2335 ((self.bits >> OFFSET) & MASK) as u16
2336 }
2337}
2338
2339# [ derive ( Clone , Copy ) ]
2340# [ repr ( C ) ]
2341pub struct ArrW {
2342 bits: u32,
2343}
2344
2345impl ArrW {
2346 # [ doc = r" Reset value" ]
2347 pub fn reset_value() -> Self {
2348 ArrW { bits: 0 }
2349 }
2350 # [ doc = "Bits 0:15 - Low Auto-reload value" ]
2351 pub fn arrl(&mut self, value: u16) -> &mut Self {
2352 const OFFSET: u8 = 0u8;
2353 const MASK: u16 = 65535;
2354 self.bits &= !((MASK as u32) << OFFSET);
2355 self.bits |= ((value & MASK) as u32) << OFFSET;
2356 self
2357 }
2358 # [ doc = "Bits 16:31 - High Auto-reload value" ]
2359 pub fn arrh(&mut self, value: u16) -> &mut Self {
2360 const OFFSET: u8 = 16u8;
2361 const MASK: u16 = 65535;
2362 self.bits &= !((MASK as u32) << OFFSET);
2363 self.bits |= ((value & MASK) as u32) << OFFSET;
2364 self
2365 }
2366}
2367
2368# [ repr ( C ) ]
2369pub struct Ccr1 {
2370 register: ::volatile_register::RW<u32>,
2371}
2372
2373impl Ccr1 {
2374 pub fn read_bits(&self) -> u32 {
2375 self.register.read()
2376 }
2377 pub unsafe fn modify_bits<F>(&mut self, f: F)
2378 where F: FnOnce(&mut u32)
2379 {
2380 let mut bits = self.register.read();
2381 f(&mut bits);
2382 self.register.write(bits);
2383 }
2384 pub unsafe fn write_bits(&mut self, bits: u32) {
2385 self.register.write(bits);
2386 }
2387 pub fn modify<F>(&mut self, f: F)
2388 where for<'w> F: FnOnce(&Ccr1R, &'w mut Ccr1W) -> &'w mut Ccr1W
2389 {
2390 let bits = self.register.read();
2391 let r = Ccr1R { bits: bits };
2392 let mut w = Ccr1W { bits: bits };
2393 f(&r, &mut w);
2394 self.register.write(w.bits);
2395 }
2396 pub fn read(&self) -> Ccr1R {
2397 Ccr1R { bits: self.register.read() }
2398 }
2399 pub fn write<F>(&mut self, f: F)
2400 where F: FnOnce(&mut Ccr1W) -> &mut Ccr1W
2401 {
2402 let mut w = Ccr1W::reset_value();
2403 f(&mut w);
2404 self.register.write(w.bits);
2405 }
2406}
2407
2408# [ derive ( Clone , Copy ) ]
2409# [ repr ( C ) ]
2410pub struct Ccr1R {
2411 bits: u32,
2412}
2413
2414impl Ccr1R {
2415 # [ doc = "Bits 0:15 - Low Capture/Compare 1 value" ]
2416 pub fn ccr1l(&self) -> u16 {
2417 const MASK: u32 = 65535;
2418 const OFFSET: u8 = 0u8;
2419 ((self.bits >> OFFSET) & MASK) as u16
2420 }
2421 # [ doc = "Bits 16:31 - High Capture/Compare 1 value (on TIM2)" ]
2422 pub fn ccr1h(&self) -> u16 {
2423 const MASK: u32 = 65535;
2424 const OFFSET: u8 = 16u8;
2425 ((self.bits >> OFFSET) & MASK) as u16
2426 }
2427}
2428
2429# [ derive ( Clone , Copy ) ]
2430# [ repr ( C ) ]
2431pub struct Ccr1W {
2432 bits: u32,
2433}
2434
2435impl Ccr1W {
2436 # [ doc = r" Reset value" ]
2437 pub fn reset_value() -> Self {
2438 Ccr1W { bits: 0 }
2439 }
2440 # [ doc = "Bits 0:15 - Low Capture/Compare 1 value" ]
2441 pub fn ccr1l(&mut self, value: u16) -> &mut Self {
2442 const OFFSET: u8 = 0u8;
2443 const MASK: u16 = 65535;
2444 self.bits &= !((MASK as u32) << OFFSET);
2445 self.bits |= ((value & MASK) as u32) << OFFSET;
2446 self
2447 }
2448 # [ doc = "Bits 16:31 - High Capture/Compare 1 value (on TIM2)" ]
2449 pub fn ccr1h(&mut self, value: u16) -> &mut Self {
2450 const OFFSET: u8 = 16u8;
2451 const MASK: u16 = 65535;
2452 self.bits &= !((MASK as u32) << OFFSET);
2453 self.bits |= ((value & MASK) as u32) << OFFSET;
2454 self
2455 }
2456}
2457
2458# [ repr ( C ) ]
2459pub struct Ccr2 {
2460 register: ::volatile_register::RW<u32>,
2461}
2462
2463impl Ccr2 {
2464 pub fn read_bits(&self) -> u32 {
2465 self.register.read()
2466 }
2467 pub unsafe fn modify_bits<F>(&mut self, f: F)
2468 where F: FnOnce(&mut u32)
2469 {
2470 let mut bits = self.register.read();
2471 f(&mut bits);
2472 self.register.write(bits);
2473 }
2474 pub unsafe fn write_bits(&mut self, bits: u32) {
2475 self.register.write(bits);
2476 }
2477 pub fn modify<F>(&mut self, f: F)
2478 where for<'w> F: FnOnce(&Ccr2R, &'w mut Ccr2W) -> &'w mut Ccr2W
2479 {
2480 let bits = self.register.read();
2481 let r = Ccr2R { bits: bits };
2482 let mut w = Ccr2W { bits: bits };
2483 f(&r, &mut w);
2484 self.register.write(w.bits);
2485 }
2486 pub fn read(&self) -> Ccr2R {
2487 Ccr2R { bits: self.register.read() }
2488 }
2489 pub fn write<F>(&mut self, f: F)
2490 where F: FnOnce(&mut Ccr2W) -> &mut Ccr2W
2491 {
2492 let mut w = Ccr2W::reset_value();
2493 f(&mut w);
2494 self.register.write(w.bits);
2495 }
2496}
2497
2498# [ derive ( Clone , Copy ) ]
2499# [ repr ( C ) ]
2500pub struct Ccr2R {
2501 bits: u32,
2502}
2503
2504impl Ccr2R {
2505 # [ doc = "Bits 0:15 - Low Capture/Compare 2 value" ]
2506 pub fn ccr2l(&self) -> u16 {
2507 const MASK: u32 = 65535;
2508 const OFFSET: u8 = 0u8;
2509 ((self.bits >> OFFSET) & MASK) as u16
2510 }
2511 # [ doc = "Bits 16:31 - High Capture/Compare 2 value (on TIM2)" ]
2512 pub fn ccr2h(&self) -> u16 {
2513 const MASK: u32 = 65535;
2514 const OFFSET: u8 = 16u8;
2515 ((self.bits >> OFFSET) & MASK) as u16
2516 }
2517}
2518
2519# [ derive ( Clone , Copy ) ]
2520# [ repr ( C ) ]
2521pub struct Ccr2W {
2522 bits: u32,
2523}
2524
2525impl Ccr2W {
2526 # [ doc = r" Reset value" ]
2527 pub fn reset_value() -> Self {
2528 Ccr2W { bits: 0 }
2529 }
2530 # [ doc = "Bits 0:15 - Low Capture/Compare 2 value" ]
2531 pub fn ccr2l(&mut self, value: u16) -> &mut Self {
2532 const OFFSET: u8 = 0u8;
2533 const MASK: u16 = 65535;
2534 self.bits &= !((MASK as u32) << OFFSET);
2535 self.bits |= ((value & MASK) as u32) << OFFSET;
2536 self
2537 }
2538 # [ doc = "Bits 16:31 - High Capture/Compare 2 value (on TIM2)" ]
2539 pub fn ccr2h(&mut self, value: u16) -> &mut Self {
2540 const OFFSET: u8 = 16u8;
2541 const MASK: u16 = 65535;
2542 self.bits &= !((MASK as u32) << OFFSET);
2543 self.bits |= ((value & MASK) as u32) << OFFSET;
2544 self
2545 }
2546}
2547
2548# [ repr ( C ) ]
2549pub struct Ccr3 {
2550 register: ::volatile_register::RW<u32>,
2551}
2552
2553impl Ccr3 {
2554 pub fn read_bits(&self) -> u32 {
2555 self.register.read()
2556 }
2557 pub unsafe fn modify_bits<F>(&mut self, f: F)
2558 where F: FnOnce(&mut u32)
2559 {
2560 let mut bits = self.register.read();
2561 f(&mut bits);
2562 self.register.write(bits);
2563 }
2564 pub unsafe fn write_bits(&mut self, bits: u32) {
2565 self.register.write(bits);
2566 }
2567 pub fn modify<F>(&mut self, f: F)
2568 where for<'w> F: FnOnce(&Ccr3R, &'w mut Ccr3W) -> &'w mut Ccr3W
2569 {
2570 let bits = self.register.read();
2571 let r = Ccr3R { bits: bits };
2572 let mut w = Ccr3W { bits: bits };
2573 f(&r, &mut w);
2574 self.register.write(w.bits);
2575 }
2576 pub fn read(&self) -> Ccr3R {
2577 Ccr3R { bits: self.register.read() }
2578 }
2579 pub fn write<F>(&mut self, f: F)
2580 where F: FnOnce(&mut Ccr3W) -> &mut Ccr3W
2581 {
2582 let mut w = Ccr3W::reset_value();
2583 f(&mut w);
2584 self.register.write(w.bits);
2585 }
2586}
2587
2588# [ derive ( Clone , Copy ) ]
2589# [ repr ( C ) ]
2590pub struct Ccr3R {
2591 bits: u32,
2592}
2593
2594impl Ccr3R {
2595 # [ doc = "Bits 0:15 - Low Capture/Compare value" ]
2596 pub fn ccr3l(&self) -> u16 {
2597 const MASK: u32 = 65535;
2598 const OFFSET: u8 = 0u8;
2599 ((self.bits >> OFFSET) & MASK) as u16
2600 }
2601 # [ doc = "Bits 16:31 - High Capture/Compare value (on TIM2)" ]
2602 pub fn ccr3h(&self) -> u16 {
2603 const MASK: u32 = 65535;
2604 const OFFSET: u8 = 16u8;
2605 ((self.bits >> OFFSET) & MASK) as u16
2606 }
2607}
2608
2609# [ derive ( Clone , Copy ) ]
2610# [ repr ( C ) ]
2611pub struct Ccr3W {
2612 bits: u32,
2613}
2614
2615impl Ccr3W {
2616 # [ doc = r" Reset value" ]
2617 pub fn reset_value() -> Self {
2618 Ccr3W { bits: 0 }
2619 }
2620 # [ doc = "Bits 0:15 - Low Capture/Compare value" ]
2621 pub fn ccr3l(&mut self, value: u16) -> &mut Self {
2622 const OFFSET: u8 = 0u8;
2623 const MASK: u16 = 65535;
2624 self.bits &= !((MASK as u32) << OFFSET);
2625 self.bits |= ((value & MASK) as u32) << OFFSET;
2626 self
2627 }
2628 # [ doc = "Bits 16:31 - High Capture/Compare value (on TIM2)" ]
2629 pub fn ccr3h(&mut self, value: u16) -> &mut Self {
2630 const OFFSET: u8 = 16u8;
2631 const MASK: u16 = 65535;
2632 self.bits &= !((MASK as u32) << OFFSET);
2633 self.bits |= ((value & MASK) as u32) << OFFSET;
2634 self
2635 }
2636}
2637
2638# [ repr ( C ) ]
2639pub struct Ccr4 {
2640 register: ::volatile_register::RW<u32>,
2641}
2642
2643impl Ccr4 {
2644 pub fn read_bits(&self) -> u32 {
2645 self.register.read()
2646 }
2647 pub unsafe fn modify_bits<F>(&mut self, f: F)
2648 where F: FnOnce(&mut u32)
2649 {
2650 let mut bits = self.register.read();
2651 f(&mut bits);
2652 self.register.write(bits);
2653 }
2654 pub unsafe fn write_bits(&mut self, bits: u32) {
2655 self.register.write(bits);
2656 }
2657 pub fn modify<F>(&mut self, f: F)
2658 where for<'w> F: FnOnce(&Ccr4R, &'w mut Ccr4W) -> &'w mut Ccr4W
2659 {
2660 let bits = self.register.read();
2661 let r = Ccr4R { bits: bits };
2662 let mut w = Ccr4W { bits: bits };
2663 f(&r, &mut w);
2664 self.register.write(w.bits);
2665 }
2666 pub fn read(&self) -> Ccr4R {
2667 Ccr4R { bits: self.register.read() }
2668 }
2669 pub fn write<F>(&mut self, f: F)
2670 where F: FnOnce(&mut Ccr4W) -> &mut Ccr4W
2671 {
2672 let mut w = Ccr4W::reset_value();
2673 f(&mut w);
2674 self.register.write(w.bits);
2675 }
2676}
2677
2678# [ derive ( Clone , Copy ) ]
2679# [ repr ( C ) ]
2680pub struct Ccr4R {
2681 bits: u32,
2682}
2683
2684impl Ccr4R {
2685 # [ doc = "Bits 0:15 - Low Capture/Compare value" ]
2686 pub fn ccr4l(&self) -> u16 {
2687 const MASK: u32 = 65535;
2688 const OFFSET: u8 = 0u8;
2689 ((self.bits >> OFFSET) & MASK) as u16
2690 }
2691 # [ doc = "Bits 16:31 - High Capture/Compare value (on TIM2)" ]
2692 pub fn ccr4h(&self) -> u16 {
2693 const MASK: u32 = 65535;
2694 const OFFSET: u8 = 16u8;
2695 ((self.bits >> OFFSET) & MASK) as u16
2696 }
2697}
2698
2699# [ derive ( Clone , Copy ) ]
2700# [ repr ( C ) ]
2701pub struct Ccr4W {
2702 bits: u32,
2703}
2704
2705impl Ccr4W {
2706 # [ doc = r" Reset value" ]
2707 pub fn reset_value() -> Self {
2708 Ccr4W { bits: 0 }
2709 }
2710 # [ doc = "Bits 0:15 - Low Capture/Compare value" ]
2711 pub fn ccr4l(&mut self, value: u16) -> &mut Self {
2712 const OFFSET: u8 = 0u8;
2713 const MASK: u16 = 65535;
2714 self.bits &= !((MASK as u32) << OFFSET);
2715 self.bits |= ((value & MASK) as u32) << OFFSET;
2716 self
2717 }
2718 # [ doc = "Bits 16:31 - High Capture/Compare value (on TIM2)" ]
2719 pub fn ccr4h(&mut self, value: u16) -> &mut Self {
2720 const OFFSET: u8 = 16u8;
2721 const MASK: u16 = 65535;
2722 self.bits &= !((MASK as u32) << OFFSET);
2723 self.bits |= ((value & MASK) as u32) << OFFSET;
2724 self
2725 }
2726}
2727
2728# [ repr ( C ) ]
2729pub struct Dcr {
2730 register: ::volatile_register::RW<u32>,
2731}
2732
2733impl Dcr {
2734 pub fn read_bits(&self) -> u32 {
2735 self.register.read()
2736 }
2737 pub unsafe fn modify_bits<F>(&mut self, f: F)
2738 where F: FnOnce(&mut u32)
2739 {
2740 let mut bits = self.register.read();
2741 f(&mut bits);
2742 self.register.write(bits);
2743 }
2744 pub unsafe fn write_bits(&mut self, bits: u32) {
2745 self.register.write(bits);
2746 }
2747 pub fn modify<F>(&mut self, f: F)
2748 where for<'w> F: FnOnce(&DcrR, &'w mut DcrW) -> &'w mut DcrW
2749 {
2750 let bits = self.register.read();
2751 let r = DcrR { bits: bits };
2752 let mut w = DcrW { bits: bits };
2753 f(&r, &mut w);
2754 self.register.write(w.bits);
2755 }
2756 pub fn read(&self) -> DcrR {
2757 DcrR { bits: self.register.read() }
2758 }
2759 pub fn write<F>(&mut self, f: F)
2760 where F: FnOnce(&mut DcrW) -> &mut DcrW
2761 {
2762 let mut w = DcrW::reset_value();
2763 f(&mut w);
2764 self.register.write(w.bits);
2765 }
2766}
2767
2768# [ derive ( Clone , Copy ) ]
2769# [ repr ( C ) ]
2770pub struct DcrR {
2771 bits: u32,
2772}
2773
2774impl DcrR {
2775 # [ doc = "Bits 8:12 - DMA burst length" ]
2776 pub fn dbl(&self) -> u8 {
2777 const MASK: u32 = 31;
2778 const OFFSET: u8 = 8u8;
2779 ((self.bits >> OFFSET) & MASK) as u8
2780 }
2781 # [ doc = "Bits 0:4 - DMA base address" ]
2782 pub fn dba(&self) -> u8 {
2783 const MASK: u32 = 31;
2784 const OFFSET: u8 = 0u8;
2785 ((self.bits >> OFFSET) & MASK) as u8
2786 }
2787}
2788
2789# [ derive ( Clone , Copy ) ]
2790# [ repr ( C ) ]
2791pub struct DcrW {
2792 bits: u32,
2793}
2794
2795impl DcrW {
2796 # [ doc = r" Reset value" ]
2797 pub fn reset_value() -> Self {
2798 DcrW { bits: 0 }
2799 }
2800 # [ doc = "Bits 8:12 - DMA burst length" ]
2801 pub fn dbl(&mut self, value: u8) -> &mut Self {
2802 const OFFSET: u8 = 8u8;
2803 const MASK: u8 = 31;
2804 self.bits &= !((MASK as u32) << OFFSET);
2805 self.bits |= ((value & MASK) as u32) << OFFSET;
2806 self
2807 }
2808 # [ doc = "Bits 0:4 - DMA base address" ]
2809 pub fn dba(&mut self, value: u8) -> &mut Self {
2810 const OFFSET: u8 = 0u8;
2811 const MASK: u8 = 31;
2812 self.bits &= !((MASK as u32) << OFFSET);
2813 self.bits |= ((value & MASK) as u32) << OFFSET;
2814 self
2815 }
2816}
2817
2818# [ repr ( C ) ]
2819pub struct Dmar {
2820 register: ::volatile_register::RW<u32>,
2821}
2822
2823impl Dmar {
2824 pub fn read_bits(&self) -> u32 {
2825 self.register.read()
2826 }
2827 pub unsafe fn modify_bits<F>(&mut self, f: F)
2828 where F: FnOnce(&mut u32)
2829 {
2830 let mut bits = self.register.read();
2831 f(&mut bits);
2832 self.register.write(bits);
2833 }
2834 pub unsafe fn write_bits(&mut self, bits: u32) {
2835 self.register.write(bits);
2836 }
2837 pub fn modify<F>(&mut self, f: F)
2838 where for<'w> F: FnOnce(&DmarR, &'w mut DmarW) -> &'w mut DmarW
2839 {
2840 let bits = self.register.read();
2841 let r = DmarR { bits: bits };
2842 let mut w = DmarW { bits: bits };
2843 f(&r, &mut w);
2844 self.register.write(w.bits);
2845 }
2846 pub fn read(&self) -> DmarR {
2847 DmarR { bits: self.register.read() }
2848 }
2849 pub fn write<F>(&mut self, f: F)
2850 where F: FnOnce(&mut DmarW) -> &mut DmarW
2851 {
2852 let mut w = DmarW::reset_value();
2853 f(&mut w);
2854 self.register.write(w.bits);
2855 }
2856}
2857
2858# [ derive ( Clone , Copy ) ]
2859# [ repr ( C ) ]
2860pub struct DmarR {
2861 bits: u32,
2862}
2863
2864impl DmarR {
2865 # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
2866 pub fn dmab(&self) -> u16 {
2867 const MASK: u32 = 65535;
2868 const OFFSET: u8 = 0u8;
2869 ((self.bits >> OFFSET) & MASK) as u16
2870 }
2871}
2872
2873# [ derive ( Clone , Copy ) ]
2874# [ repr ( C ) ]
2875pub struct DmarW {
2876 bits: u32,
2877}
2878
2879impl DmarW {
2880 # [ doc = r" Reset value" ]
2881 pub fn reset_value() -> Self {
2882 DmarW { bits: 0 }
2883 }
2884 # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
2885 pub fn dmab(&mut self, value: u16) -> &mut Self {
2886 const OFFSET: u8 = 0u8;
2887 const MASK: u16 = 65535;
2888 self.bits &= !((MASK as u32) << OFFSET);
2889 self.bits |= ((value & MASK) as u32) << OFFSET;
2890 self
2891 }
2892}