stm32f30x_memory_map/
usart.rs

1# [ doc = "Universal synchronous asynchronous receiver transmitter" ]
2# [ repr ( C ) ]
3pub struct Usart {
4    # [ doc = "0x00 - Control register 1" ]
5    pub cr1: Cr1,
6    # [ doc = "0x04 - Control register 2" ]
7    pub cr2: Cr2,
8    # [ doc = "0x08 - Control register 3" ]
9    pub cr3: Cr3,
10    # [ doc = "0x0c - Baud rate register" ]
11    pub brr: Brr,
12    # [ doc = "0x10 - Guard time and prescaler register" ]
13    pub gtpr: Gtpr,
14    # [ doc = "0x14 - Receiver timeout register" ]
15    pub rtor: Rtor,
16    # [ doc = "0x18 - Request register" ]
17    pub rqr: Rqr,
18    # [ doc = "0x1c - Interrupt & status register" ]
19    pub isr: Isr,
20    # [ doc = "0x20 - Interrupt flag clear register" ]
21    pub icr: Icr,
22    # [ doc = "0x24 - Receive data register" ]
23    pub rdr: Rdr,
24    # [ doc = "0x28 - Transmit data register" ]
25    pub tdr: Tdr,
26}
27
28# [ repr ( C ) ]
29pub struct Cr1 {
30    register: ::volatile_register::RW<u32>,
31}
32
33impl Cr1 {
34    pub fn read_bits(&self) -> u32 {
35        self.register.read()
36    }
37    pub unsafe fn modify_bits<F>(&mut self, f: F)
38        where F: FnOnce(&mut u32)
39    {
40        let mut bits = self.register.read();
41        f(&mut bits);
42        self.register.write(bits);
43    }
44    pub unsafe fn write_bits(&mut self, bits: u32) {
45        self.register.write(bits);
46    }
47    pub fn modify<F>(&mut self, f: F)
48        where for<'w> F: FnOnce(&Cr1R, &'w mut Cr1W) -> &'w mut Cr1W
49    {
50        let bits = self.register.read();
51        let r = Cr1R { bits: bits };
52        let mut w = Cr1W { bits: bits };
53        f(&r, &mut w);
54        self.register.write(w.bits);
55    }
56    pub fn read(&self) -> Cr1R {
57        Cr1R { bits: self.register.read() }
58    }
59    pub fn write<F>(&mut self, f: F)
60        where F: FnOnce(&mut Cr1W) -> &mut Cr1W
61    {
62        let mut w = Cr1W::reset_value();
63        f(&mut w);
64        self.register.write(w.bits);
65    }
66}
67
68# [ derive ( Clone , Copy ) ]
69# [ repr ( C ) ]
70pub struct Cr1R {
71    bits: u32,
72}
73
74impl Cr1R {
75    # [ doc = "Bit 27 - End of Block interrupt enable" ]
76    pub fn eobie(&self) -> bool {
77        const OFFSET: u8 = 27u8;
78        self.bits & (1 << OFFSET) != 0
79    }
80    # [ doc = "Bit 26 - Receiver timeout interrupt enable" ]
81    pub fn rtoie(&self) -> bool {
82        const OFFSET: u8 = 26u8;
83        self.bits & (1 << OFFSET) != 0
84    }
85    # [ doc = "Bits 21:25 - Driver Enable assertion time" ]
86    pub fn deat(&self) -> u8 {
87        const MASK: u32 = 31;
88        const OFFSET: u8 = 21u8;
89        ((self.bits >> OFFSET) & MASK) as u8
90    }
91    # [ doc = "Bits 16:20 - Driver Enable deassertion time" ]
92    pub fn dedt(&self) -> u8 {
93        const MASK: u32 = 31;
94        const OFFSET: u8 = 16u8;
95        ((self.bits >> OFFSET) & MASK) as u8
96    }
97    # [ doc = "Bit 15 - Oversampling mode" ]
98    pub fn over8(&self) -> bool {
99        const OFFSET: u8 = 15u8;
100        self.bits & (1 << OFFSET) != 0
101    }
102    # [ doc = "Bit 14 - Character match interrupt enable" ]
103    pub fn cmie(&self) -> bool {
104        const OFFSET: u8 = 14u8;
105        self.bits & (1 << OFFSET) != 0
106    }
107    # [ doc = "Bit 13 - Mute mode enable" ]
108    pub fn mme(&self) -> bool {
109        const OFFSET: u8 = 13u8;
110        self.bits & (1 << OFFSET) != 0
111    }
112    # [ doc = "Bit 12 - Word length" ]
113    pub fn m(&self) -> bool {
114        const OFFSET: u8 = 12u8;
115        self.bits & (1 << OFFSET) != 0
116    }
117    # [ doc = "Bit 11 - Receiver wakeup method" ]
118    pub fn wake(&self) -> bool {
119        const OFFSET: u8 = 11u8;
120        self.bits & (1 << OFFSET) != 0
121    }
122    # [ doc = "Bit 10 - Parity control enable" ]
123    pub fn pce(&self) -> bool {
124        const OFFSET: u8 = 10u8;
125        self.bits & (1 << OFFSET) != 0
126    }
127    # [ doc = "Bit 9 - Parity selection" ]
128    pub fn ps(&self) -> bool {
129        const OFFSET: u8 = 9u8;
130        self.bits & (1 << OFFSET) != 0
131    }
132    # [ doc = "Bit 8 - PE interrupt enable" ]
133    pub fn peie(&self) -> bool {
134        const OFFSET: u8 = 8u8;
135        self.bits & (1 << OFFSET) != 0
136    }
137    # [ doc = "Bit 7 - interrupt enable" ]
138    pub fn txeie(&self) -> bool {
139        const OFFSET: u8 = 7u8;
140        self.bits & (1 << OFFSET) != 0
141    }
142    # [ doc = "Bit 6 - Transmission complete interrupt enable" ]
143    pub fn tcie(&self) -> bool {
144        const OFFSET: u8 = 6u8;
145        self.bits & (1 << OFFSET) != 0
146    }
147    # [ doc = "Bit 5 - RXNE interrupt enable" ]
148    pub fn rxneie(&self) -> bool {
149        const OFFSET: u8 = 5u8;
150        self.bits & (1 << OFFSET) != 0
151    }
152    # [ doc = "Bit 4 - IDLE interrupt enable" ]
153    pub fn idleie(&self) -> bool {
154        const OFFSET: u8 = 4u8;
155        self.bits & (1 << OFFSET) != 0
156    }
157    # [ doc = "Bit 3 - Transmitter enable" ]
158    pub fn te(&self) -> bool {
159        const OFFSET: u8 = 3u8;
160        self.bits & (1 << OFFSET) != 0
161    }
162    # [ doc = "Bit 2 - Receiver enable" ]
163    pub fn re(&self) -> bool {
164        const OFFSET: u8 = 2u8;
165        self.bits & (1 << OFFSET) != 0
166    }
167    # [ doc = "Bit 1 - USART enable in Stop mode" ]
168    pub fn uesm(&self) -> bool {
169        const OFFSET: u8 = 1u8;
170        self.bits & (1 << OFFSET) != 0
171    }
172    # [ doc = "Bit 0 - USART enable" ]
173    pub fn ue(&self) -> bool {
174        const OFFSET: u8 = 0u8;
175        self.bits & (1 << OFFSET) != 0
176    }
177}
178
179# [ derive ( Clone , Copy ) ]
180# [ repr ( C ) ]
181pub struct Cr1W {
182    bits: u32,
183}
184
185impl Cr1W {
186    # [ doc = r" Reset value" ]
187    pub fn reset_value() -> Self {
188        Cr1W { bits: 0 }
189    }
190    # [ doc = "Bit 27 - End of Block interrupt enable" ]
191    pub fn eobie(&mut self, value: bool) -> &mut Self {
192        const OFFSET: u8 = 27u8;
193        if value {
194            self.bits |= 1 << OFFSET;
195        } else {
196            self.bits &= !(1 << OFFSET);
197        }
198        self
199    }
200    # [ doc = "Bit 26 - Receiver timeout interrupt enable" ]
201    pub fn rtoie(&mut self, value: bool) -> &mut Self {
202        const OFFSET: u8 = 26u8;
203        if value {
204            self.bits |= 1 << OFFSET;
205        } else {
206            self.bits &= !(1 << OFFSET);
207        }
208        self
209    }
210    # [ doc = "Bits 21:25 - Driver Enable assertion time" ]
211    pub fn deat(&mut self, value: u8) -> &mut Self {
212        const OFFSET: u8 = 21u8;
213        const MASK: u8 = 31;
214        self.bits &= !((MASK as u32) << OFFSET);
215        self.bits |= ((value & MASK) as u32) << OFFSET;
216        self
217    }
218    # [ doc = "Bits 16:20 - Driver Enable deassertion time" ]
219    pub fn dedt(&mut self, value: u8) -> &mut Self {
220        const OFFSET: u8 = 16u8;
221        const MASK: u8 = 31;
222        self.bits &= !((MASK as u32) << OFFSET);
223        self.bits |= ((value & MASK) as u32) << OFFSET;
224        self
225    }
226    # [ doc = "Bit 15 - Oversampling mode" ]
227    pub fn over8(&mut self, value: bool) -> &mut Self {
228        const OFFSET: u8 = 15u8;
229        if value {
230            self.bits |= 1 << OFFSET;
231        } else {
232            self.bits &= !(1 << OFFSET);
233        }
234        self
235    }
236    # [ doc = "Bit 14 - Character match interrupt enable" ]
237    pub fn cmie(&mut self, value: bool) -> &mut Self {
238        const OFFSET: u8 = 14u8;
239        if value {
240            self.bits |= 1 << OFFSET;
241        } else {
242            self.bits &= !(1 << OFFSET);
243        }
244        self
245    }
246    # [ doc = "Bit 13 - Mute mode enable" ]
247    pub fn mme(&mut self, value: bool) -> &mut Self {
248        const OFFSET: u8 = 13u8;
249        if value {
250            self.bits |= 1 << OFFSET;
251        } else {
252            self.bits &= !(1 << OFFSET);
253        }
254        self
255    }
256    # [ doc = "Bit 12 - Word length" ]
257    pub fn m(&mut self, value: bool) -> &mut Self {
258        const OFFSET: u8 = 12u8;
259        if value {
260            self.bits |= 1 << OFFSET;
261        } else {
262            self.bits &= !(1 << OFFSET);
263        }
264        self
265    }
266    # [ doc = "Bit 11 - Receiver wakeup method" ]
267    pub fn wake(&mut self, value: bool) -> &mut Self {
268        const OFFSET: u8 = 11u8;
269        if value {
270            self.bits |= 1 << OFFSET;
271        } else {
272            self.bits &= !(1 << OFFSET);
273        }
274        self
275    }
276    # [ doc = "Bit 10 - Parity control enable" ]
277    pub fn pce(&mut self, value: bool) -> &mut Self {
278        const OFFSET: u8 = 10u8;
279        if value {
280            self.bits |= 1 << OFFSET;
281        } else {
282            self.bits &= !(1 << OFFSET);
283        }
284        self
285    }
286    # [ doc = "Bit 9 - Parity selection" ]
287    pub fn ps(&mut self, value: bool) -> &mut Self {
288        const OFFSET: u8 = 9u8;
289        if value {
290            self.bits |= 1 << OFFSET;
291        } else {
292            self.bits &= !(1 << OFFSET);
293        }
294        self
295    }
296    # [ doc = "Bit 8 - PE interrupt enable" ]
297    pub fn peie(&mut self, value: bool) -> &mut Self {
298        const OFFSET: u8 = 8u8;
299        if value {
300            self.bits |= 1 << OFFSET;
301        } else {
302            self.bits &= !(1 << OFFSET);
303        }
304        self
305    }
306    # [ doc = "Bit 7 - interrupt enable" ]
307    pub fn txeie(&mut self, value: bool) -> &mut Self {
308        const OFFSET: u8 = 7u8;
309        if value {
310            self.bits |= 1 << OFFSET;
311        } else {
312            self.bits &= !(1 << OFFSET);
313        }
314        self
315    }
316    # [ doc = "Bit 6 - Transmission complete interrupt enable" ]
317    pub fn tcie(&mut self, value: bool) -> &mut Self {
318        const OFFSET: u8 = 6u8;
319        if value {
320            self.bits |= 1 << OFFSET;
321        } else {
322            self.bits &= !(1 << OFFSET);
323        }
324        self
325    }
326    # [ doc = "Bit 5 - RXNE interrupt enable" ]
327    pub fn rxneie(&mut self, value: bool) -> &mut Self {
328        const OFFSET: u8 = 5u8;
329        if value {
330            self.bits |= 1 << OFFSET;
331        } else {
332            self.bits &= !(1 << OFFSET);
333        }
334        self
335    }
336    # [ doc = "Bit 4 - IDLE interrupt enable" ]
337    pub fn idleie(&mut self, value: bool) -> &mut Self {
338        const OFFSET: u8 = 4u8;
339        if value {
340            self.bits |= 1 << OFFSET;
341        } else {
342            self.bits &= !(1 << OFFSET);
343        }
344        self
345    }
346    # [ doc = "Bit 3 - Transmitter enable" ]
347    pub fn te(&mut self, value: bool) -> &mut Self {
348        const OFFSET: u8 = 3u8;
349        if value {
350            self.bits |= 1 << OFFSET;
351        } else {
352            self.bits &= !(1 << OFFSET);
353        }
354        self
355    }
356    # [ doc = "Bit 2 - Receiver enable" ]
357    pub fn re(&mut self, value: bool) -> &mut Self {
358        const OFFSET: u8 = 2u8;
359        if value {
360            self.bits |= 1 << OFFSET;
361        } else {
362            self.bits &= !(1 << OFFSET);
363        }
364        self
365    }
366    # [ doc = "Bit 1 - USART enable in Stop mode" ]
367    pub fn uesm(&mut self, value: bool) -> &mut Self {
368        const OFFSET: u8 = 1u8;
369        if value {
370            self.bits |= 1 << OFFSET;
371        } else {
372            self.bits &= !(1 << OFFSET);
373        }
374        self
375    }
376    # [ doc = "Bit 0 - USART enable" ]
377    pub fn ue(&mut self, value: bool) -> &mut Self {
378        const OFFSET: u8 = 0u8;
379        if value {
380            self.bits |= 1 << OFFSET;
381        } else {
382            self.bits &= !(1 << OFFSET);
383        }
384        self
385    }
386}
387
388# [ repr ( C ) ]
389pub struct Cr2 {
390    register: ::volatile_register::RW<u32>,
391}
392
393impl Cr2 {
394    pub fn read_bits(&self) -> u32 {
395        self.register.read()
396    }
397    pub unsafe fn modify_bits<F>(&mut self, f: F)
398        where F: FnOnce(&mut u32)
399    {
400        let mut bits = self.register.read();
401        f(&mut bits);
402        self.register.write(bits);
403    }
404    pub unsafe fn write_bits(&mut self, bits: u32) {
405        self.register.write(bits);
406    }
407    pub fn modify<F>(&mut self, f: F)
408        where for<'w> F: FnOnce(&Cr2R, &'w mut Cr2W) -> &'w mut Cr2W
409    {
410        let bits = self.register.read();
411        let r = Cr2R { bits: bits };
412        let mut w = Cr2W { bits: bits };
413        f(&r, &mut w);
414        self.register.write(w.bits);
415    }
416    pub fn read(&self) -> Cr2R {
417        Cr2R { bits: self.register.read() }
418    }
419    pub fn write<F>(&mut self, f: F)
420        where F: FnOnce(&mut Cr2W) -> &mut Cr2W
421    {
422        let mut w = Cr2W::reset_value();
423        f(&mut w);
424        self.register.write(w.bits);
425    }
426}
427
428# [ derive ( Clone , Copy ) ]
429# [ repr ( C ) ]
430pub struct Cr2R {
431    bits: u32,
432}
433
434impl Cr2R {
435    # [ doc = "Bits 28:31 - Address of the USART node" ]
436    pub fn add4(&self) -> u8 {
437        const MASK: u32 = 15;
438        const OFFSET: u8 = 28u8;
439        ((self.bits >> OFFSET) & MASK) as u8
440    }
441    # [ doc = "Bits 24:27 - Address of the USART node" ]
442    pub fn add0(&self) -> u8 {
443        const MASK: u32 = 15;
444        const OFFSET: u8 = 24u8;
445        ((self.bits >> OFFSET) & MASK) as u8
446    }
447    # [ doc = "Bit 23 - Receiver timeout enable" ]
448    pub fn rtoen(&self) -> bool {
449        const OFFSET: u8 = 23u8;
450        self.bits & (1 << OFFSET) != 0
451    }
452    # [ doc = "Bits 21:22 - Auto baud rate mode" ]
453    pub fn abrmod(&self) -> u8 {
454        const MASK: u32 = 3;
455        const OFFSET: u8 = 21u8;
456        ((self.bits >> OFFSET) & MASK) as u8
457    }
458    # [ doc = "Bit 20 - Auto baud rate enable" ]
459    pub fn abren(&self) -> bool {
460        const OFFSET: u8 = 20u8;
461        self.bits & (1 << OFFSET) != 0
462    }
463    # [ doc = "Bit 19 - Most significant bit first" ]
464    pub fn msbfirst(&self) -> bool {
465        const OFFSET: u8 = 19u8;
466        self.bits & (1 << OFFSET) != 0
467    }
468    # [ doc = "Bit 18 - Binary data inversion" ]
469    pub fn datainv(&self) -> bool {
470        const OFFSET: u8 = 18u8;
471        self.bits & (1 << OFFSET) != 0
472    }
473    # [ doc = "Bit 17 - TX pin active level inversion" ]
474    pub fn txinv(&self) -> bool {
475        const OFFSET: u8 = 17u8;
476        self.bits & (1 << OFFSET) != 0
477    }
478    # [ doc = "Bit 16 - RX pin active level inversion" ]
479    pub fn rxinv(&self) -> bool {
480        const OFFSET: u8 = 16u8;
481        self.bits & (1 << OFFSET) != 0
482    }
483    # [ doc = "Bit 15 - Swap TX/RX pins" ]
484    pub fn swap(&self) -> bool {
485        const OFFSET: u8 = 15u8;
486        self.bits & (1 << OFFSET) != 0
487    }
488    # [ doc = "Bit 14 - LIN mode enable" ]
489    pub fn linen(&self) -> bool {
490        const OFFSET: u8 = 14u8;
491        self.bits & (1 << OFFSET) != 0
492    }
493    # [ doc = "Bits 12:13 - STOP bits" ]
494    pub fn stop(&self) -> u8 {
495        const MASK: u32 = 3;
496        const OFFSET: u8 = 12u8;
497        ((self.bits >> OFFSET) & MASK) as u8
498    }
499    # [ doc = "Bit 11 - Clock enable" ]
500    pub fn clken(&self) -> bool {
501        const OFFSET: u8 = 11u8;
502        self.bits & (1 << OFFSET) != 0
503    }
504    # [ doc = "Bit 10 - Clock polarity" ]
505    pub fn cpol(&self) -> bool {
506        const OFFSET: u8 = 10u8;
507        self.bits & (1 << OFFSET) != 0
508    }
509    # [ doc = "Bit 9 - Clock phase" ]
510    pub fn cpha(&self) -> bool {
511        const OFFSET: u8 = 9u8;
512        self.bits & (1 << OFFSET) != 0
513    }
514    # [ doc = "Bit 8 - Last bit clock pulse" ]
515    pub fn lbcl(&self) -> bool {
516        const OFFSET: u8 = 8u8;
517        self.bits & (1 << OFFSET) != 0
518    }
519    # [ doc = "Bit 6 - LIN break detection interrupt enable" ]
520    pub fn lbdie(&self) -> bool {
521        const OFFSET: u8 = 6u8;
522        self.bits & (1 << OFFSET) != 0
523    }
524    # [ doc = "Bit 5 - LIN break detection length" ]
525    pub fn lbdl(&self) -> bool {
526        const OFFSET: u8 = 5u8;
527        self.bits & (1 << OFFSET) != 0
528    }
529    # [ doc = "Bit 4 - 7-bit Address Detection/4-bit Address Detection" ]
530    pub fn addm7(&self) -> bool {
531        const OFFSET: u8 = 4u8;
532        self.bits & (1 << OFFSET) != 0
533    }
534}
535
536# [ derive ( Clone , Copy ) ]
537# [ repr ( C ) ]
538pub struct Cr2W {
539    bits: u32,
540}
541
542impl Cr2W {
543    # [ doc = r" Reset value" ]
544    pub fn reset_value() -> Self {
545        Cr2W { bits: 0 }
546    }
547    # [ doc = "Bits 28:31 - Address of the USART node" ]
548    pub fn add4(&mut self, value: u8) -> &mut Self {
549        const OFFSET: u8 = 28u8;
550        const MASK: u8 = 15;
551        self.bits &= !((MASK as u32) << OFFSET);
552        self.bits |= ((value & MASK) as u32) << OFFSET;
553        self
554    }
555    # [ doc = "Bits 24:27 - Address of the USART node" ]
556    pub fn add0(&mut self, value: u8) -> &mut Self {
557        const OFFSET: u8 = 24u8;
558        const MASK: u8 = 15;
559        self.bits &= !((MASK as u32) << OFFSET);
560        self.bits |= ((value & MASK) as u32) << OFFSET;
561        self
562    }
563    # [ doc = "Bit 23 - Receiver timeout enable" ]
564    pub fn rtoen(&mut self, value: bool) -> &mut Self {
565        const OFFSET: u8 = 23u8;
566        if value {
567            self.bits |= 1 << OFFSET;
568        } else {
569            self.bits &= !(1 << OFFSET);
570        }
571        self
572    }
573    # [ doc = "Bits 21:22 - Auto baud rate mode" ]
574    pub fn abrmod(&mut self, value: u8) -> &mut Self {
575        const OFFSET: u8 = 21u8;
576        const MASK: u8 = 3;
577        self.bits &= !((MASK as u32) << OFFSET);
578        self.bits |= ((value & MASK) as u32) << OFFSET;
579        self
580    }
581    # [ doc = "Bit 20 - Auto baud rate enable" ]
582    pub fn abren(&mut self, value: bool) -> &mut Self {
583        const OFFSET: u8 = 20u8;
584        if value {
585            self.bits |= 1 << OFFSET;
586        } else {
587            self.bits &= !(1 << OFFSET);
588        }
589        self
590    }
591    # [ doc = "Bit 19 - Most significant bit first" ]
592    pub fn msbfirst(&mut self, value: bool) -> &mut Self {
593        const OFFSET: u8 = 19u8;
594        if value {
595            self.bits |= 1 << OFFSET;
596        } else {
597            self.bits &= !(1 << OFFSET);
598        }
599        self
600    }
601    # [ doc = "Bit 18 - Binary data inversion" ]
602    pub fn datainv(&mut self, value: bool) -> &mut Self {
603        const OFFSET: u8 = 18u8;
604        if value {
605            self.bits |= 1 << OFFSET;
606        } else {
607            self.bits &= !(1 << OFFSET);
608        }
609        self
610    }
611    # [ doc = "Bit 17 - TX pin active level inversion" ]
612    pub fn txinv(&mut self, value: bool) -> &mut Self {
613        const OFFSET: u8 = 17u8;
614        if value {
615            self.bits |= 1 << OFFSET;
616        } else {
617            self.bits &= !(1 << OFFSET);
618        }
619        self
620    }
621    # [ doc = "Bit 16 - RX pin active level inversion" ]
622    pub fn rxinv(&mut self, value: bool) -> &mut Self {
623        const OFFSET: u8 = 16u8;
624        if value {
625            self.bits |= 1 << OFFSET;
626        } else {
627            self.bits &= !(1 << OFFSET);
628        }
629        self
630    }
631    # [ doc = "Bit 15 - Swap TX/RX pins" ]
632    pub fn swap(&mut self, value: bool) -> &mut Self {
633        const OFFSET: u8 = 15u8;
634        if value {
635            self.bits |= 1 << OFFSET;
636        } else {
637            self.bits &= !(1 << OFFSET);
638        }
639        self
640    }
641    # [ doc = "Bit 14 - LIN mode enable" ]
642    pub fn linen(&mut self, value: bool) -> &mut Self {
643        const OFFSET: u8 = 14u8;
644        if value {
645            self.bits |= 1 << OFFSET;
646        } else {
647            self.bits &= !(1 << OFFSET);
648        }
649        self
650    }
651    # [ doc = "Bits 12:13 - STOP bits" ]
652    pub fn stop(&mut self, value: u8) -> &mut Self {
653        const OFFSET: u8 = 12u8;
654        const MASK: u8 = 3;
655        self.bits &= !((MASK as u32) << OFFSET);
656        self.bits |= ((value & MASK) as u32) << OFFSET;
657        self
658    }
659    # [ doc = "Bit 11 - Clock enable" ]
660    pub fn clken(&mut self, value: bool) -> &mut Self {
661        const OFFSET: u8 = 11u8;
662        if value {
663            self.bits |= 1 << OFFSET;
664        } else {
665            self.bits &= !(1 << OFFSET);
666        }
667        self
668    }
669    # [ doc = "Bit 10 - Clock polarity" ]
670    pub fn cpol(&mut self, value: bool) -> &mut Self {
671        const OFFSET: u8 = 10u8;
672        if value {
673            self.bits |= 1 << OFFSET;
674        } else {
675            self.bits &= !(1 << OFFSET);
676        }
677        self
678    }
679    # [ doc = "Bit 9 - Clock phase" ]
680    pub fn cpha(&mut self, value: bool) -> &mut Self {
681        const OFFSET: u8 = 9u8;
682        if value {
683            self.bits |= 1 << OFFSET;
684        } else {
685            self.bits &= !(1 << OFFSET);
686        }
687        self
688    }
689    # [ doc = "Bit 8 - Last bit clock pulse" ]
690    pub fn lbcl(&mut self, value: bool) -> &mut Self {
691        const OFFSET: u8 = 8u8;
692        if value {
693            self.bits |= 1 << OFFSET;
694        } else {
695            self.bits &= !(1 << OFFSET);
696        }
697        self
698    }
699    # [ doc = "Bit 6 - LIN break detection interrupt enable" ]
700    pub fn lbdie(&mut self, value: bool) -> &mut Self {
701        const OFFSET: u8 = 6u8;
702        if value {
703            self.bits |= 1 << OFFSET;
704        } else {
705            self.bits &= !(1 << OFFSET);
706        }
707        self
708    }
709    # [ doc = "Bit 5 - LIN break detection length" ]
710    pub fn lbdl(&mut self, value: bool) -> &mut Self {
711        const OFFSET: u8 = 5u8;
712        if value {
713            self.bits |= 1 << OFFSET;
714        } else {
715            self.bits &= !(1 << OFFSET);
716        }
717        self
718    }
719    # [ doc = "Bit 4 - 7-bit Address Detection/4-bit Address Detection" ]
720    pub fn addm7(&mut self, value: bool) -> &mut Self {
721        const OFFSET: u8 = 4u8;
722        if value {
723            self.bits |= 1 << OFFSET;
724        } else {
725            self.bits &= !(1 << OFFSET);
726        }
727        self
728    }
729}
730
731# [ repr ( C ) ]
732pub struct Cr3 {
733    register: ::volatile_register::RW<u32>,
734}
735
736impl Cr3 {
737    pub fn read_bits(&self) -> u32 {
738        self.register.read()
739    }
740    pub unsafe fn modify_bits<F>(&mut self, f: F)
741        where F: FnOnce(&mut u32)
742    {
743        let mut bits = self.register.read();
744        f(&mut bits);
745        self.register.write(bits);
746    }
747    pub unsafe fn write_bits(&mut self, bits: u32) {
748        self.register.write(bits);
749    }
750    pub fn modify<F>(&mut self, f: F)
751        where for<'w> F: FnOnce(&Cr3R, &'w mut Cr3W) -> &'w mut Cr3W
752    {
753        let bits = self.register.read();
754        let r = Cr3R { bits: bits };
755        let mut w = Cr3W { bits: bits };
756        f(&r, &mut w);
757        self.register.write(w.bits);
758    }
759    pub fn read(&self) -> Cr3R {
760        Cr3R { bits: self.register.read() }
761    }
762    pub fn write<F>(&mut self, f: F)
763        where F: FnOnce(&mut Cr3W) -> &mut Cr3W
764    {
765        let mut w = Cr3W::reset_value();
766        f(&mut w);
767        self.register.write(w.bits);
768    }
769}
770
771# [ derive ( Clone , Copy ) ]
772# [ repr ( C ) ]
773pub struct Cr3R {
774    bits: u32,
775}
776
777impl Cr3R {
778    # [ doc = "Bit 22 - Wakeup from Stop mode interrupt enable" ]
779    pub fn wufie(&self) -> bool {
780        const OFFSET: u8 = 22u8;
781        self.bits & (1 << OFFSET) != 0
782    }
783    # [ doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection" ]
784    pub fn wus(&self) -> u8 {
785        const MASK: u32 = 3;
786        const OFFSET: u8 = 20u8;
787        ((self.bits >> OFFSET) & MASK) as u8
788    }
789    # [ doc = "Bits 17:19 - Smartcard auto-retry count" ]
790    pub fn scarcnt(&self) -> u8 {
791        const MASK: u32 = 7;
792        const OFFSET: u8 = 17u8;
793        ((self.bits >> OFFSET) & MASK) as u8
794    }
795    # [ doc = "Bit 15 - Driver enable polarity selection" ]
796    pub fn dep(&self) -> bool {
797        const OFFSET: u8 = 15u8;
798        self.bits & (1 << OFFSET) != 0
799    }
800    # [ doc = "Bit 14 - Driver enable mode" ]
801    pub fn dem(&self) -> bool {
802        const OFFSET: u8 = 14u8;
803        self.bits & (1 << OFFSET) != 0
804    }
805    # [ doc = "Bit 13 - DMA Disable on Reception Error" ]
806    pub fn ddre(&self) -> bool {
807        const OFFSET: u8 = 13u8;
808        self.bits & (1 << OFFSET) != 0
809    }
810    # [ doc = "Bit 12 - Overrun Disable" ]
811    pub fn ovrdis(&self) -> bool {
812        const OFFSET: u8 = 12u8;
813        self.bits & (1 << OFFSET) != 0
814    }
815    # [ doc = "Bit 11 - One sample bit method enable" ]
816    pub fn onebit(&self) -> bool {
817        const OFFSET: u8 = 11u8;
818        self.bits & (1 << OFFSET) != 0
819    }
820    # [ doc = "Bit 10 - CTS interrupt enable" ]
821    pub fn ctsie(&self) -> bool {
822        const OFFSET: u8 = 10u8;
823        self.bits & (1 << OFFSET) != 0
824    }
825    # [ doc = "Bit 9 - CTS enable" ]
826    pub fn ctse(&self) -> bool {
827        const OFFSET: u8 = 9u8;
828        self.bits & (1 << OFFSET) != 0
829    }
830    # [ doc = "Bit 8 - RTS enable" ]
831    pub fn rtse(&self) -> bool {
832        const OFFSET: u8 = 8u8;
833        self.bits & (1 << OFFSET) != 0
834    }
835    # [ doc = "Bit 7 - DMA enable transmitter" ]
836    pub fn dmat(&self) -> bool {
837        const OFFSET: u8 = 7u8;
838        self.bits & (1 << OFFSET) != 0
839    }
840    # [ doc = "Bit 6 - DMA enable receiver" ]
841    pub fn dmar(&self) -> bool {
842        const OFFSET: u8 = 6u8;
843        self.bits & (1 << OFFSET) != 0
844    }
845    # [ doc = "Bit 5 - Smartcard mode enable" ]
846    pub fn scen(&self) -> bool {
847        const OFFSET: u8 = 5u8;
848        self.bits & (1 << OFFSET) != 0
849    }
850    # [ doc = "Bit 4 - Smartcard NACK enable" ]
851    pub fn nack(&self) -> bool {
852        const OFFSET: u8 = 4u8;
853        self.bits & (1 << OFFSET) != 0
854    }
855    # [ doc = "Bit 3 - Half-duplex selection" ]
856    pub fn hdsel(&self) -> bool {
857        const OFFSET: u8 = 3u8;
858        self.bits & (1 << OFFSET) != 0
859    }
860    # [ doc = "Bit 2 - IrDA low-power" ]
861    pub fn irlp(&self) -> bool {
862        const OFFSET: u8 = 2u8;
863        self.bits & (1 << OFFSET) != 0
864    }
865    # [ doc = "Bit 1 - IrDA mode enable" ]
866    pub fn iren(&self) -> bool {
867        const OFFSET: u8 = 1u8;
868        self.bits & (1 << OFFSET) != 0
869    }
870    # [ doc = "Bit 0 - Error interrupt enable" ]
871    pub fn eie(&self) -> bool {
872        const OFFSET: u8 = 0u8;
873        self.bits & (1 << OFFSET) != 0
874    }
875}
876
877# [ derive ( Clone , Copy ) ]
878# [ repr ( C ) ]
879pub struct Cr3W {
880    bits: u32,
881}
882
883impl Cr3W {
884    # [ doc = r" Reset value" ]
885    pub fn reset_value() -> Self {
886        Cr3W { bits: 0 }
887    }
888    # [ doc = "Bit 22 - Wakeup from Stop mode interrupt enable" ]
889    pub fn wufie(&mut self, value: bool) -> &mut Self {
890        const OFFSET: u8 = 22u8;
891        if value {
892            self.bits |= 1 << OFFSET;
893        } else {
894            self.bits &= !(1 << OFFSET);
895        }
896        self
897    }
898    # [ doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection" ]
899    pub fn wus(&mut self, value: u8) -> &mut Self {
900        const OFFSET: u8 = 20u8;
901        const MASK: u8 = 3;
902        self.bits &= !((MASK as u32) << OFFSET);
903        self.bits |= ((value & MASK) as u32) << OFFSET;
904        self
905    }
906    # [ doc = "Bits 17:19 - Smartcard auto-retry count" ]
907    pub fn scarcnt(&mut self, value: u8) -> &mut Self {
908        const OFFSET: u8 = 17u8;
909        const MASK: u8 = 7;
910        self.bits &= !((MASK as u32) << OFFSET);
911        self.bits |= ((value & MASK) as u32) << OFFSET;
912        self
913    }
914    # [ doc = "Bit 15 - Driver enable polarity selection" ]
915    pub fn dep(&mut self, value: bool) -> &mut Self {
916        const OFFSET: u8 = 15u8;
917        if value {
918            self.bits |= 1 << OFFSET;
919        } else {
920            self.bits &= !(1 << OFFSET);
921        }
922        self
923    }
924    # [ doc = "Bit 14 - Driver enable mode" ]
925    pub fn dem(&mut self, value: bool) -> &mut Self {
926        const OFFSET: u8 = 14u8;
927        if value {
928            self.bits |= 1 << OFFSET;
929        } else {
930            self.bits &= !(1 << OFFSET);
931        }
932        self
933    }
934    # [ doc = "Bit 13 - DMA Disable on Reception Error" ]
935    pub fn ddre(&mut self, value: bool) -> &mut Self {
936        const OFFSET: u8 = 13u8;
937        if value {
938            self.bits |= 1 << OFFSET;
939        } else {
940            self.bits &= !(1 << OFFSET);
941        }
942        self
943    }
944    # [ doc = "Bit 12 - Overrun Disable" ]
945    pub fn ovrdis(&mut self, value: bool) -> &mut Self {
946        const OFFSET: u8 = 12u8;
947        if value {
948            self.bits |= 1 << OFFSET;
949        } else {
950            self.bits &= !(1 << OFFSET);
951        }
952        self
953    }
954    # [ doc = "Bit 11 - One sample bit method enable" ]
955    pub fn onebit(&mut self, value: bool) -> &mut Self {
956        const OFFSET: u8 = 11u8;
957        if value {
958            self.bits |= 1 << OFFSET;
959        } else {
960            self.bits &= !(1 << OFFSET);
961        }
962        self
963    }
964    # [ doc = "Bit 10 - CTS interrupt enable" ]
965    pub fn ctsie(&mut self, value: bool) -> &mut Self {
966        const OFFSET: u8 = 10u8;
967        if value {
968            self.bits |= 1 << OFFSET;
969        } else {
970            self.bits &= !(1 << OFFSET);
971        }
972        self
973    }
974    # [ doc = "Bit 9 - CTS enable" ]
975    pub fn ctse(&mut self, value: bool) -> &mut Self {
976        const OFFSET: u8 = 9u8;
977        if value {
978            self.bits |= 1 << OFFSET;
979        } else {
980            self.bits &= !(1 << OFFSET);
981        }
982        self
983    }
984    # [ doc = "Bit 8 - RTS enable" ]
985    pub fn rtse(&mut self, value: bool) -> &mut Self {
986        const OFFSET: u8 = 8u8;
987        if value {
988            self.bits |= 1 << OFFSET;
989        } else {
990            self.bits &= !(1 << OFFSET);
991        }
992        self
993    }
994    # [ doc = "Bit 7 - DMA enable transmitter" ]
995    pub fn dmat(&mut self, value: bool) -> &mut Self {
996        const OFFSET: u8 = 7u8;
997        if value {
998            self.bits |= 1 << OFFSET;
999        } else {
1000            self.bits &= !(1 << OFFSET);
1001        }
1002        self
1003    }
1004    # [ doc = "Bit 6 - DMA enable receiver" ]
1005    pub fn dmar(&mut self, value: bool) -> &mut Self {
1006        const OFFSET: u8 = 6u8;
1007        if value {
1008            self.bits |= 1 << OFFSET;
1009        } else {
1010            self.bits &= !(1 << OFFSET);
1011        }
1012        self
1013    }
1014    # [ doc = "Bit 5 - Smartcard mode enable" ]
1015    pub fn scen(&mut self, value: bool) -> &mut Self {
1016        const OFFSET: u8 = 5u8;
1017        if value {
1018            self.bits |= 1 << OFFSET;
1019        } else {
1020            self.bits &= !(1 << OFFSET);
1021        }
1022        self
1023    }
1024    # [ doc = "Bit 4 - Smartcard NACK enable" ]
1025    pub fn nack(&mut self, value: bool) -> &mut Self {
1026        const OFFSET: u8 = 4u8;
1027        if value {
1028            self.bits |= 1 << OFFSET;
1029        } else {
1030            self.bits &= !(1 << OFFSET);
1031        }
1032        self
1033    }
1034    # [ doc = "Bit 3 - Half-duplex selection" ]
1035    pub fn hdsel(&mut self, value: bool) -> &mut Self {
1036        const OFFSET: u8 = 3u8;
1037        if value {
1038            self.bits |= 1 << OFFSET;
1039        } else {
1040            self.bits &= !(1 << OFFSET);
1041        }
1042        self
1043    }
1044    # [ doc = "Bit 2 - IrDA low-power" ]
1045    pub fn irlp(&mut self, value: bool) -> &mut Self {
1046        const OFFSET: u8 = 2u8;
1047        if value {
1048            self.bits |= 1 << OFFSET;
1049        } else {
1050            self.bits &= !(1 << OFFSET);
1051        }
1052        self
1053    }
1054    # [ doc = "Bit 1 - IrDA mode enable" ]
1055    pub fn iren(&mut self, value: bool) -> &mut Self {
1056        const OFFSET: u8 = 1u8;
1057        if value {
1058            self.bits |= 1 << OFFSET;
1059        } else {
1060            self.bits &= !(1 << OFFSET);
1061        }
1062        self
1063    }
1064    # [ doc = "Bit 0 - Error interrupt enable" ]
1065    pub fn eie(&mut self, value: bool) -> &mut Self {
1066        const OFFSET: u8 = 0u8;
1067        if value {
1068            self.bits |= 1 << OFFSET;
1069        } else {
1070            self.bits &= !(1 << OFFSET);
1071        }
1072        self
1073    }
1074}
1075
1076# [ repr ( C ) ]
1077pub struct Brr {
1078    register: ::volatile_register::RW<u32>,
1079}
1080
1081impl Brr {
1082    pub fn read_bits(&self) -> u32 {
1083        self.register.read()
1084    }
1085    pub unsafe fn modify_bits<F>(&mut self, f: F)
1086        where F: FnOnce(&mut u32)
1087    {
1088        let mut bits = self.register.read();
1089        f(&mut bits);
1090        self.register.write(bits);
1091    }
1092    pub unsafe fn write_bits(&mut self, bits: u32) {
1093        self.register.write(bits);
1094    }
1095    pub fn modify<F>(&mut self, f: F)
1096        where for<'w> F: FnOnce(&BrrR, &'w mut BrrW) -> &'w mut BrrW
1097    {
1098        let bits = self.register.read();
1099        let r = BrrR { bits: bits };
1100        let mut w = BrrW { bits: bits };
1101        f(&r, &mut w);
1102        self.register.write(w.bits);
1103    }
1104    pub fn read(&self) -> BrrR {
1105        BrrR { bits: self.register.read() }
1106    }
1107    pub fn write<F>(&mut self, f: F)
1108        where F: FnOnce(&mut BrrW) -> &mut BrrW
1109    {
1110        let mut w = BrrW::reset_value();
1111        f(&mut w);
1112        self.register.write(w.bits);
1113    }
1114}
1115
1116# [ derive ( Clone , Copy ) ]
1117# [ repr ( C ) ]
1118pub struct BrrR {
1119    bits: u32,
1120}
1121
1122impl BrrR {
1123    # [ doc = "Bits 4:15 - mantissa of USARTDIV" ]
1124    pub fn div_mantissa(&self) -> u16 {
1125        const MASK: u32 = 4095;
1126        const OFFSET: u8 = 4u8;
1127        ((self.bits >> OFFSET) & MASK) as u16
1128    }
1129    # [ doc = "Bits 0:3 - fraction of USARTDIV" ]
1130    pub fn div_fraction(&self) -> u8 {
1131        const MASK: u32 = 15;
1132        const OFFSET: u8 = 0u8;
1133        ((self.bits >> OFFSET) & MASK) as u8
1134    }
1135}
1136
1137# [ derive ( Clone , Copy ) ]
1138# [ repr ( C ) ]
1139pub struct BrrW {
1140    bits: u32,
1141}
1142
1143impl BrrW {
1144    # [ doc = r" Reset value" ]
1145    pub fn reset_value() -> Self {
1146        BrrW { bits: 0 }
1147    }
1148    # [ doc = "Bits 4:15 - mantissa of USARTDIV" ]
1149    pub fn div_mantissa(&mut self, value: u16) -> &mut Self {
1150        const OFFSET: u8 = 4u8;
1151        const MASK: u16 = 4095;
1152        self.bits &= !((MASK as u32) << OFFSET);
1153        self.bits |= ((value & MASK) as u32) << OFFSET;
1154        self
1155    }
1156    # [ doc = "Bits 0:3 - fraction of USARTDIV" ]
1157    pub fn div_fraction(&mut self, value: u8) -> &mut Self {
1158        const OFFSET: u8 = 0u8;
1159        const MASK: u8 = 15;
1160        self.bits &= !((MASK as u32) << OFFSET);
1161        self.bits |= ((value & MASK) as u32) << OFFSET;
1162        self
1163    }
1164}
1165
1166# [ repr ( C ) ]
1167pub struct Gtpr {
1168    register: ::volatile_register::RW<u32>,
1169}
1170
1171impl Gtpr {
1172    pub fn read_bits(&self) -> u32 {
1173        self.register.read()
1174    }
1175    pub unsafe fn modify_bits<F>(&mut self, f: F)
1176        where F: FnOnce(&mut u32)
1177    {
1178        let mut bits = self.register.read();
1179        f(&mut bits);
1180        self.register.write(bits);
1181    }
1182    pub unsafe fn write_bits(&mut self, bits: u32) {
1183        self.register.write(bits);
1184    }
1185    pub fn modify<F>(&mut self, f: F)
1186        where for<'w> F: FnOnce(&GtprR, &'w mut GtprW) -> &'w mut GtprW
1187    {
1188        let bits = self.register.read();
1189        let r = GtprR { bits: bits };
1190        let mut w = GtprW { bits: bits };
1191        f(&r, &mut w);
1192        self.register.write(w.bits);
1193    }
1194    pub fn read(&self) -> GtprR {
1195        GtprR { bits: self.register.read() }
1196    }
1197    pub fn write<F>(&mut self, f: F)
1198        where F: FnOnce(&mut GtprW) -> &mut GtprW
1199    {
1200        let mut w = GtprW::reset_value();
1201        f(&mut w);
1202        self.register.write(w.bits);
1203    }
1204}
1205
1206# [ derive ( Clone , Copy ) ]
1207# [ repr ( C ) ]
1208pub struct GtprR {
1209    bits: u32,
1210}
1211
1212impl GtprR {
1213    # [ doc = "Bits 8:15 - Guard time value" ]
1214    pub fn gt(&self) -> u8 {
1215        const MASK: u32 = 255;
1216        const OFFSET: u8 = 8u8;
1217        ((self.bits >> OFFSET) & MASK) as u8
1218    }
1219    # [ doc = "Bits 0:7 - Prescaler value" ]
1220    pub fn psc(&self) -> u8 {
1221        const MASK: u32 = 255;
1222        const OFFSET: u8 = 0u8;
1223        ((self.bits >> OFFSET) & MASK) as u8
1224    }
1225}
1226
1227# [ derive ( Clone , Copy ) ]
1228# [ repr ( C ) ]
1229pub struct GtprW {
1230    bits: u32,
1231}
1232
1233impl GtprW {
1234    # [ doc = r" Reset value" ]
1235    pub fn reset_value() -> Self {
1236        GtprW { bits: 0 }
1237    }
1238    # [ doc = "Bits 8:15 - Guard time value" ]
1239    pub fn gt(&mut self, value: u8) -> &mut Self {
1240        const OFFSET: u8 = 8u8;
1241        const MASK: u8 = 255;
1242        self.bits &= !((MASK as u32) << OFFSET);
1243        self.bits |= ((value & MASK) as u32) << OFFSET;
1244        self
1245    }
1246    # [ doc = "Bits 0:7 - Prescaler value" ]
1247    pub fn psc(&mut self, value: u8) -> &mut Self {
1248        const OFFSET: u8 = 0u8;
1249        const MASK: u8 = 255;
1250        self.bits &= !((MASK as u32) << OFFSET);
1251        self.bits |= ((value & MASK) as u32) << OFFSET;
1252        self
1253    }
1254}
1255
1256# [ repr ( C ) ]
1257pub struct Rtor {
1258    register: ::volatile_register::RW<u32>,
1259}
1260
1261impl Rtor {
1262    pub fn read_bits(&self) -> u32 {
1263        self.register.read()
1264    }
1265    pub unsafe fn modify_bits<F>(&mut self, f: F)
1266        where F: FnOnce(&mut u32)
1267    {
1268        let mut bits = self.register.read();
1269        f(&mut bits);
1270        self.register.write(bits);
1271    }
1272    pub unsafe fn write_bits(&mut self, bits: u32) {
1273        self.register.write(bits);
1274    }
1275    pub fn modify<F>(&mut self, f: F)
1276        where for<'w> F: FnOnce(&RtorR, &'w mut RtorW) -> &'w mut RtorW
1277    {
1278        let bits = self.register.read();
1279        let r = RtorR { bits: bits };
1280        let mut w = RtorW { bits: bits };
1281        f(&r, &mut w);
1282        self.register.write(w.bits);
1283    }
1284    pub fn read(&self) -> RtorR {
1285        RtorR { bits: self.register.read() }
1286    }
1287    pub fn write<F>(&mut self, f: F)
1288        where F: FnOnce(&mut RtorW) -> &mut RtorW
1289    {
1290        let mut w = RtorW::reset_value();
1291        f(&mut w);
1292        self.register.write(w.bits);
1293    }
1294}
1295
1296# [ derive ( Clone , Copy ) ]
1297# [ repr ( C ) ]
1298pub struct RtorR {
1299    bits: u32,
1300}
1301
1302impl RtorR {
1303    # [ doc = "Bits 24:31 - Block Length" ]
1304    pub fn blen(&self) -> u8 {
1305        const MASK: u32 = 255;
1306        const OFFSET: u8 = 24u8;
1307        ((self.bits >> OFFSET) & MASK) as u8
1308    }
1309    # [ doc = "Bits 0:23 - Receiver timeout value" ]
1310    pub fn rto(&self) -> u32 {
1311        const MASK: u32 = 16777215;
1312        const OFFSET: u8 = 0u8;
1313        ((self.bits >> OFFSET) & MASK) as u32
1314    }
1315}
1316
1317# [ derive ( Clone , Copy ) ]
1318# [ repr ( C ) ]
1319pub struct RtorW {
1320    bits: u32,
1321}
1322
1323impl RtorW {
1324    # [ doc = r" Reset value" ]
1325    pub fn reset_value() -> Self {
1326        RtorW { bits: 0 }
1327    }
1328    # [ doc = "Bits 24:31 - Block Length" ]
1329    pub fn blen(&mut self, value: u8) -> &mut Self {
1330        const OFFSET: u8 = 24u8;
1331        const MASK: u8 = 255;
1332        self.bits &= !((MASK as u32) << OFFSET);
1333        self.bits |= ((value & MASK) as u32) << OFFSET;
1334        self
1335    }
1336    # [ doc = "Bits 0:23 - Receiver timeout value" ]
1337    pub fn rto(&mut self, value: u32) -> &mut Self {
1338        const OFFSET: u8 = 0u8;
1339        const MASK: u32 = 16777215;
1340        self.bits &= !((MASK as u32) << OFFSET);
1341        self.bits |= ((value & MASK) as u32) << OFFSET;
1342        self
1343    }
1344}
1345
1346# [ repr ( C ) ]
1347pub struct Rqr {
1348    register: ::volatile_register::RW<u32>,
1349}
1350
1351impl Rqr {
1352    pub fn read_bits(&self) -> u32 {
1353        self.register.read()
1354    }
1355    pub unsafe fn modify_bits<F>(&mut self, f: F)
1356        where F: FnOnce(&mut u32)
1357    {
1358        let mut bits = self.register.read();
1359        f(&mut bits);
1360        self.register.write(bits);
1361    }
1362    pub unsafe fn write_bits(&mut self, bits: u32) {
1363        self.register.write(bits);
1364    }
1365    pub fn modify<F>(&mut self, f: F)
1366        where for<'w> F: FnOnce(&RqrR, &'w mut RqrW) -> &'w mut RqrW
1367    {
1368        let bits = self.register.read();
1369        let r = RqrR { bits: bits };
1370        let mut w = RqrW { bits: bits };
1371        f(&r, &mut w);
1372        self.register.write(w.bits);
1373    }
1374    pub fn read(&self) -> RqrR {
1375        RqrR { bits: self.register.read() }
1376    }
1377    pub fn write<F>(&mut self, f: F)
1378        where F: FnOnce(&mut RqrW) -> &mut RqrW
1379    {
1380        let mut w = RqrW::reset_value();
1381        f(&mut w);
1382        self.register.write(w.bits);
1383    }
1384}
1385
1386# [ derive ( Clone , Copy ) ]
1387# [ repr ( C ) ]
1388pub struct RqrR {
1389    bits: u32,
1390}
1391
1392impl RqrR {
1393    # [ doc = "Bit 4 - Transmit data flush request" ]
1394    pub fn txfrq(&self) -> bool {
1395        const OFFSET: u8 = 4u8;
1396        self.bits & (1 << OFFSET) != 0
1397    }
1398    # [ doc = "Bit 3 - Receive data flush request" ]
1399    pub fn rxfrq(&self) -> bool {
1400        const OFFSET: u8 = 3u8;
1401        self.bits & (1 << OFFSET) != 0
1402    }
1403    # [ doc = "Bit 2 - Mute mode request" ]
1404    pub fn mmrq(&self) -> bool {
1405        const OFFSET: u8 = 2u8;
1406        self.bits & (1 << OFFSET) != 0
1407    }
1408    # [ doc = "Bit 1 - Send break request" ]
1409    pub fn sbkrq(&self) -> bool {
1410        const OFFSET: u8 = 1u8;
1411        self.bits & (1 << OFFSET) != 0
1412    }
1413    # [ doc = "Bit 0 - Auto baud rate request" ]
1414    pub fn abrrq(&self) -> bool {
1415        const OFFSET: u8 = 0u8;
1416        self.bits & (1 << OFFSET) != 0
1417    }
1418}
1419
1420# [ derive ( Clone , Copy ) ]
1421# [ repr ( C ) ]
1422pub struct RqrW {
1423    bits: u32,
1424}
1425
1426impl RqrW {
1427    # [ doc = r" Reset value" ]
1428    pub fn reset_value() -> Self {
1429        RqrW { bits: 0 }
1430    }
1431    # [ doc = "Bit 4 - Transmit data flush request" ]
1432    pub fn txfrq(&mut self, value: bool) -> &mut Self {
1433        const OFFSET: u8 = 4u8;
1434        if value {
1435            self.bits |= 1 << OFFSET;
1436        } else {
1437            self.bits &= !(1 << OFFSET);
1438        }
1439        self
1440    }
1441    # [ doc = "Bit 3 - Receive data flush request" ]
1442    pub fn rxfrq(&mut self, value: bool) -> &mut Self {
1443        const OFFSET: u8 = 3u8;
1444        if value {
1445            self.bits |= 1 << OFFSET;
1446        } else {
1447            self.bits &= !(1 << OFFSET);
1448        }
1449        self
1450    }
1451    # [ doc = "Bit 2 - Mute mode request" ]
1452    pub fn mmrq(&mut self, value: bool) -> &mut Self {
1453        const OFFSET: u8 = 2u8;
1454        if value {
1455            self.bits |= 1 << OFFSET;
1456        } else {
1457            self.bits &= !(1 << OFFSET);
1458        }
1459        self
1460    }
1461    # [ doc = "Bit 1 - Send break request" ]
1462    pub fn sbkrq(&mut self, value: bool) -> &mut Self {
1463        const OFFSET: u8 = 1u8;
1464        if value {
1465            self.bits |= 1 << OFFSET;
1466        } else {
1467            self.bits &= !(1 << OFFSET);
1468        }
1469        self
1470    }
1471    # [ doc = "Bit 0 - Auto baud rate request" ]
1472    pub fn abrrq(&mut self, value: bool) -> &mut Self {
1473        const OFFSET: u8 = 0u8;
1474        if value {
1475            self.bits |= 1 << OFFSET;
1476        } else {
1477            self.bits &= !(1 << OFFSET);
1478        }
1479        self
1480    }
1481}
1482
1483# [ repr ( C ) ]
1484pub struct Isr {
1485    register: ::volatile_register::RO<u32>,
1486}
1487
1488impl Isr {
1489    pub fn read_bits(&self) -> u32 {
1490        self.register.read()
1491    }
1492    pub fn read(&self) -> IsrR {
1493        IsrR { bits: self.register.read() }
1494    }
1495}
1496
1497# [ derive ( Clone , Copy ) ]
1498# [ repr ( C ) ]
1499pub struct IsrR {
1500    bits: u32,
1501}
1502
1503impl IsrR {
1504    # [ doc = "Bit 22 - Receive enable acknowledge flag" ]
1505    pub fn reack(&self) -> bool {
1506        const OFFSET: u8 = 22u8;
1507        self.bits & (1 << OFFSET) != 0
1508    }
1509    # [ doc = "Bit 21 - Transmit enable acknowledge flag" ]
1510    pub fn teack(&self) -> bool {
1511        const OFFSET: u8 = 21u8;
1512        self.bits & (1 << OFFSET) != 0
1513    }
1514    # [ doc = "Bit 20 - Wakeup from Stop mode flag" ]
1515    pub fn wuf(&self) -> bool {
1516        const OFFSET: u8 = 20u8;
1517        self.bits & (1 << OFFSET) != 0
1518    }
1519    # [ doc = "Bit 19 - Receiver wakeup from Mute mode" ]
1520    pub fn rwu(&self) -> bool {
1521        const OFFSET: u8 = 19u8;
1522        self.bits & (1 << OFFSET) != 0
1523    }
1524    # [ doc = "Bit 18 - Send break flag" ]
1525    pub fn sbkf(&self) -> bool {
1526        const OFFSET: u8 = 18u8;
1527        self.bits & (1 << OFFSET) != 0
1528    }
1529    # [ doc = "Bit 17 - character match flag" ]
1530    pub fn cmf(&self) -> bool {
1531        const OFFSET: u8 = 17u8;
1532        self.bits & (1 << OFFSET) != 0
1533    }
1534    # [ doc = "Bit 16 - Busy flag" ]
1535    pub fn busy(&self) -> bool {
1536        const OFFSET: u8 = 16u8;
1537        self.bits & (1 << OFFSET) != 0
1538    }
1539    # [ doc = "Bit 15 - Auto baud rate flag" ]
1540    pub fn abrf(&self) -> bool {
1541        const OFFSET: u8 = 15u8;
1542        self.bits & (1 << OFFSET) != 0
1543    }
1544    # [ doc = "Bit 14 - Auto baud rate error" ]
1545    pub fn abre(&self) -> bool {
1546        const OFFSET: u8 = 14u8;
1547        self.bits & (1 << OFFSET) != 0
1548    }
1549    # [ doc = "Bit 12 - End of block flag" ]
1550    pub fn eobf(&self) -> bool {
1551        const OFFSET: u8 = 12u8;
1552        self.bits & (1 << OFFSET) != 0
1553    }
1554    # [ doc = "Bit 11 - Receiver timeout" ]
1555    pub fn rtof(&self) -> bool {
1556        const OFFSET: u8 = 11u8;
1557        self.bits & (1 << OFFSET) != 0
1558    }
1559    # [ doc = "Bit 10 - CTS flag" ]
1560    pub fn cts(&self) -> bool {
1561        const OFFSET: u8 = 10u8;
1562        self.bits & (1 << OFFSET) != 0
1563    }
1564    # [ doc = "Bit 9 - CTS interrupt flag" ]
1565    pub fn ctsif(&self) -> bool {
1566        const OFFSET: u8 = 9u8;
1567        self.bits & (1 << OFFSET) != 0
1568    }
1569    # [ doc = "Bit 8 - LIN break detection flag" ]
1570    pub fn lbdf(&self) -> bool {
1571        const OFFSET: u8 = 8u8;
1572        self.bits & (1 << OFFSET) != 0
1573    }
1574    # [ doc = "Bit 7 - Transmit data register empty" ]
1575    pub fn txe(&self) -> bool {
1576        const OFFSET: u8 = 7u8;
1577        self.bits & (1 << OFFSET) != 0
1578    }
1579    # [ doc = "Bit 6 - Transmission complete" ]
1580    pub fn tc(&self) -> bool {
1581        const OFFSET: u8 = 6u8;
1582        self.bits & (1 << OFFSET) != 0
1583    }
1584    # [ doc = "Bit 5 - Read data register not empty" ]
1585    pub fn rxne(&self) -> bool {
1586        const OFFSET: u8 = 5u8;
1587        self.bits & (1 << OFFSET) != 0
1588    }
1589    # [ doc = "Bit 4 - Idle line detected" ]
1590    pub fn idle(&self) -> bool {
1591        const OFFSET: u8 = 4u8;
1592        self.bits & (1 << OFFSET) != 0
1593    }
1594    # [ doc = "Bit 3 - Overrun error" ]
1595    pub fn ore(&self) -> bool {
1596        const OFFSET: u8 = 3u8;
1597        self.bits & (1 << OFFSET) != 0
1598    }
1599    # [ doc = "Bit 2 - Noise detected flag" ]
1600    pub fn nf(&self) -> bool {
1601        const OFFSET: u8 = 2u8;
1602        self.bits & (1 << OFFSET) != 0
1603    }
1604    # [ doc = "Bit 1 - Framing error" ]
1605    pub fn fe(&self) -> bool {
1606        const OFFSET: u8 = 1u8;
1607        self.bits & (1 << OFFSET) != 0
1608    }
1609    # [ doc = "Bit 0 - Parity error" ]
1610    pub fn pe(&self) -> bool {
1611        const OFFSET: u8 = 0u8;
1612        self.bits & (1 << OFFSET) != 0
1613    }
1614}
1615
1616# [ repr ( C ) ]
1617pub struct Icr {
1618    register: ::volatile_register::RW<u32>,
1619}
1620
1621impl Icr {
1622    pub fn read_bits(&self) -> u32 {
1623        self.register.read()
1624    }
1625    pub unsafe fn modify_bits<F>(&mut self, f: F)
1626        where F: FnOnce(&mut u32)
1627    {
1628        let mut bits = self.register.read();
1629        f(&mut bits);
1630        self.register.write(bits);
1631    }
1632    pub unsafe fn write_bits(&mut self, bits: u32) {
1633        self.register.write(bits);
1634    }
1635    pub fn modify<F>(&mut self, f: F)
1636        where for<'w> F: FnOnce(&IcrR, &'w mut IcrW) -> &'w mut IcrW
1637    {
1638        let bits = self.register.read();
1639        let r = IcrR { bits: bits };
1640        let mut w = IcrW { bits: bits };
1641        f(&r, &mut w);
1642        self.register.write(w.bits);
1643    }
1644    pub fn read(&self) -> IcrR {
1645        IcrR { bits: self.register.read() }
1646    }
1647    pub fn write<F>(&mut self, f: F)
1648        where F: FnOnce(&mut IcrW) -> &mut IcrW
1649    {
1650        let mut w = IcrW::reset_value();
1651        f(&mut w);
1652        self.register.write(w.bits);
1653    }
1654}
1655
1656# [ derive ( Clone , Copy ) ]
1657# [ repr ( C ) ]
1658pub struct IcrR {
1659    bits: u32,
1660}
1661
1662impl IcrR {
1663    # [ doc = "Bit 20 - Wakeup from Stop mode clear flag" ]
1664    pub fn wucf(&self) -> bool {
1665        const OFFSET: u8 = 20u8;
1666        self.bits & (1 << OFFSET) != 0
1667    }
1668    # [ doc = "Bit 17 - Character match clear flag" ]
1669    pub fn cmcf(&self) -> bool {
1670        const OFFSET: u8 = 17u8;
1671        self.bits & (1 << OFFSET) != 0
1672    }
1673    # [ doc = "Bit 12 - End of timeout clear flag" ]
1674    pub fn eobcf(&self) -> bool {
1675        const OFFSET: u8 = 12u8;
1676        self.bits & (1 << OFFSET) != 0
1677    }
1678    # [ doc = "Bit 11 - Receiver timeout clear flag" ]
1679    pub fn rtocf(&self) -> bool {
1680        const OFFSET: u8 = 11u8;
1681        self.bits & (1 << OFFSET) != 0
1682    }
1683    # [ doc = "Bit 9 - CTS clear flag" ]
1684    pub fn ctscf(&self) -> bool {
1685        const OFFSET: u8 = 9u8;
1686        self.bits & (1 << OFFSET) != 0
1687    }
1688    # [ doc = "Bit 8 - LIN break detection clear flag" ]
1689    pub fn lbdcf(&self) -> bool {
1690        const OFFSET: u8 = 8u8;
1691        self.bits & (1 << OFFSET) != 0
1692    }
1693    # [ doc = "Bit 6 - Transmission complete clear flag" ]
1694    pub fn tccf(&self) -> bool {
1695        const OFFSET: u8 = 6u8;
1696        self.bits & (1 << OFFSET) != 0
1697    }
1698    # [ doc = "Bit 4 - Idle line detected clear flag" ]
1699    pub fn idlecf(&self) -> bool {
1700        const OFFSET: u8 = 4u8;
1701        self.bits & (1 << OFFSET) != 0
1702    }
1703    # [ doc = "Bit 3 - Overrun error clear flag" ]
1704    pub fn orecf(&self) -> bool {
1705        const OFFSET: u8 = 3u8;
1706        self.bits & (1 << OFFSET) != 0
1707    }
1708    # [ doc = "Bit 2 - Noise detected clear flag" ]
1709    pub fn ncf(&self) -> bool {
1710        const OFFSET: u8 = 2u8;
1711        self.bits & (1 << OFFSET) != 0
1712    }
1713    # [ doc = "Bit 1 - Framing error clear flag" ]
1714    pub fn fecf(&self) -> bool {
1715        const OFFSET: u8 = 1u8;
1716        self.bits & (1 << OFFSET) != 0
1717    }
1718    # [ doc = "Bit 0 - Parity error clear flag" ]
1719    pub fn pecf(&self) -> bool {
1720        const OFFSET: u8 = 0u8;
1721        self.bits & (1 << OFFSET) != 0
1722    }
1723}
1724
1725# [ derive ( Clone , Copy ) ]
1726# [ repr ( C ) ]
1727pub struct IcrW {
1728    bits: u32,
1729}
1730
1731impl IcrW {
1732    # [ doc = r" Reset value" ]
1733    pub fn reset_value() -> Self {
1734        IcrW { bits: 0 }
1735    }
1736    # [ doc = "Bit 20 - Wakeup from Stop mode clear flag" ]
1737    pub fn wucf(&mut self, value: bool) -> &mut Self {
1738        const OFFSET: u8 = 20u8;
1739        if value {
1740            self.bits |= 1 << OFFSET;
1741        } else {
1742            self.bits &= !(1 << OFFSET);
1743        }
1744        self
1745    }
1746    # [ doc = "Bit 17 - Character match clear flag" ]
1747    pub fn cmcf(&mut self, value: bool) -> &mut Self {
1748        const OFFSET: u8 = 17u8;
1749        if value {
1750            self.bits |= 1 << OFFSET;
1751        } else {
1752            self.bits &= !(1 << OFFSET);
1753        }
1754        self
1755    }
1756    # [ doc = "Bit 12 - End of timeout clear flag" ]
1757    pub fn eobcf(&mut self, value: bool) -> &mut Self {
1758        const OFFSET: u8 = 12u8;
1759        if value {
1760            self.bits |= 1 << OFFSET;
1761        } else {
1762            self.bits &= !(1 << OFFSET);
1763        }
1764        self
1765    }
1766    # [ doc = "Bit 11 - Receiver timeout clear flag" ]
1767    pub fn rtocf(&mut self, value: bool) -> &mut Self {
1768        const OFFSET: u8 = 11u8;
1769        if value {
1770            self.bits |= 1 << OFFSET;
1771        } else {
1772            self.bits &= !(1 << OFFSET);
1773        }
1774        self
1775    }
1776    # [ doc = "Bit 9 - CTS clear flag" ]
1777    pub fn ctscf(&mut self, value: bool) -> &mut Self {
1778        const OFFSET: u8 = 9u8;
1779        if value {
1780            self.bits |= 1 << OFFSET;
1781        } else {
1782            self.bits &= !(1 << OFFSET);
1783        }
1784        self
1785    }
1786    # [ doc = "Bit 8 - LIN break detection clear flag" ]
1787    pub fn lbdcf(&mut self, value: bool) -> &mut Self {
1788        const OFFSET: u8 = 8u8;
1789        if value {
1790            self.bits |= 1 << OFFSET;
1791        } else {
1792            self.bits &= !(1 << OFFSET);
1793        }
1794        self
1795    }
1796    # [ doc = "Bit 6 - Transmission complete clear flag" ]
1797    pub fn tccf(&mut self, value: bool) -> &mut Self {
1798        const OFFSET: u8 = 6u8;
1799        if value {
1800            self.bits |= 1 << OFFSET;
1801        } else {
1802            self.bits &= !(1 << OFFSET);
1803        }
1804        self
1805    }
1806    # [ doc = "Bit 4 - Idle line detected clear flag" ]
1807    pub fn idlecf(&mut self, value: bool) -> &mut Self {
1808        const OFFSET: u8 = 4u8;
1809        if value {
1810            self.bits |= 1 << OFFSET;
1811        } else {
1812            self.bits &= !(1 << OFFSET);
1813        }
1814        self
1815    }
1816    # [ doc = "Bit 3 - Overrun error clear flag" ]
1817    pub fn orecf(&mut self, value: bool) -> &mut Self {
1818        const OFFSET: u8 = 3u8;
1819        if value {
1820            self.bits |= 1 << OFFSET;
1821        } else {
1822            self.bits &= !(1 << OFFSET);
1823        }
1824        self
1825    }
1826    # [ doc = "Bit 2 - Noise detected clear flag" ]
1827    pub fn ncf(&mut self, value: bool) -> &mut Self {
1828        const OFFSET: u8 = 2u8;
1829        if value {
1830            self.bits |= 1 << OFFSET;
1831        } else {
1832            self.bits &= !(1 << OFFSET);
1833        }
1834        self
1835    }
1836    # [ doc = "Bit 1 - Framing error clear flag" ]
1837    pub fn fecf(&mut self, value: bool) -> &mut Self {
1838        const OFFSET: u8 = 1u8;
1839        if value {
1840            self.bits |= 1 << OFFSET;
1841        } else {
1842            self.bits &= !(1 << OFFSET);
1843        }
1844        self
1845    }
1846    # [ doc = "Bit 0 - Parity error clear flag" ]
1847    pub fn pecf(&mut self, value: bool) -> &mut Self {
1848        const OFFSET: u8 = 0u8;
1849        if value {
1850            self.bits |= 1 << OFFSET;
1851        } else {
1852            self.bits &= !(1 << OFFSET);
1853        }
1854        self
1855    }
1856}
1857
1858# [ repr ( C ) ]
1859pub struct Rdr {
1860    register: ::volatile_register::RO<u32>,
1861}
1862
1863impl Rdr {
1864    pub fn read_bits(&self) -> u32 {
1865        self.register.read()
1866    }
1867    pub fn read(&self) -> RdrR {
1868        RdrR { bits: self.register.read() }
1869    }
1870}
1871
1872# [ derive ( Clone , Copy ) ]
1873# [ repr ( C ) ]
1874pub struct RdrR {
1875    bits: u32,
1876}
1877
1878impl RdrR {
1879    # [ doc = "Bits 0:8 - Receive data value" ]
1880    pub fn rdr(&self) -> u16 {
1881        const MASK: u32 = 511;
1882        const OFFSET: u8 = 0u8;
1883        ((self.bits >> OFFSET) & MASK) as u16
1884    }
1885}
1886
1887# [ repr ( C ) ]
1888pub struct Tdr {
1889    register: ::volatile_register::RW<u32>,
1890}
1891
1892impl Tdr {
1893    pub fn read_bits(&self) -> u32 {
1894        self.register.read()
1895    }
1896    pub unsafe fn modify_bits<F>(&mut self, f: F)
1897        where F: FnOnce(&mut u32)
1898    {
1899        let mut bits = self.register.read();
1900        f(&mut bits);
1901        self.register.write(bits);
1902    }
1903    pub unsafe fn write_bits(&mut self, bits: u32) {
1904        self.register.write(bits);
1905    }
1906    pub fn modify<F>(&mut self, f: F)
1907        where for<'w> F: FnOnce(&TdrR, &'w mut TdrW) -> &'w mut TdrW
1908    {
1909        let bits = self.register.read();
1910        let r = TdrR { bits: bits };
1911        let mut w = TdrW { bits: bits };
1912        f(&r, &mut w);
1913        self.register.write(w.bits);
1914    }
1915    pub fn read(&self) -> TdrR {
1916        TdrR { bits: self.register.read() }
1917    }
1918    pub fn write<F>(&mut self, f: F)
1919        where F: FnOnce(&mut TdrW) -> &mut TdrW
1920    {
1921        let mut w = TdrW::reset_value();
1922        f(&mut w);
1923        self.register.write(w.bits);
1924    }
1925}
1926
1927# [ derive ( Clone , Copy ) ]
1928# [ repr ( C ) ]
1929pub struct TdrR {
1930    bits: u32,
1931}
1932
1933impl TdrR {
1934    # [ doc = "Bits 0:8 - Transmit data value" ]
1935    pub fn tdr(&self) -> u16 {
1936        const MASK: u32 = 511;
1937        const OFFSET: u8 = 0u8;
1938        ((self.bits >> OFFSET) & MASK) as u16
1939    }
1940}
1941
1942# [ derive ( Clone , Copy ) ]
1943# [ repr ( C ) ]
1944pub struct TdrW {
1945    bits: u32,
1946}
1947
1948impl TdrW {
1949    # [ doc = r" Reset value" ]
1950    pub fn reset_value() -> Self {
1951        TdrW { bits: 0 }
1952    }
1953    # [ doc = "Bits 0:8 - Transmit data value" ]
1954    pub fn tdr(&mut self, value: u16) -> &mut Self {
1955        const OFFSET: u8 = 0u8;
1956        const MASK: u16 = 511;
1957        self.bits &= !((MASK as u32) << OFFSET);
1958        self.bits |= ((value & MASK) as u32) << OFFSET;
1959        self
1960    }
1961}
stm32f30x_memory_map/usart.rs

stm32f30x_memory_map/
usart.rs
