1# [ doc = "Basic timers" ]
2# [ repr ( C ) ]
3pub struct BTim {
4 # [ doc = "0x00 - control register 1" ]
5 pub cr1: Cr1,
6 # [ doc = "0x04 - control register 2" ]
7 pub cr2: Cr2,
8 _reserved0: [u8; 4usize],
9 # [ doc = "0x0c - DMA/Interrupt enable register" ]
10 pub dier: Dier,
11 # [ doc = "0x10 - status register" ]
12 pub sr: Sr,
13 # [ doc = "0x14 - event generation register" ]
14 pub egr: Egr,
15 _reserved1: [u8; 12usize],
16 # [ doc = "0x24 - counter" ]
17 pub cnt: Cnt,
18 # [ doc = "0x28 - prescaler" ]
19 pub psc: Psc,
20 # [ doc = "0x2c - auto-reload register" ]
21 pub arr: Arr,
22}
23
24# [ repr ( C ) ]
25pub struct Cr1 {
26 register: ::volatile_register::RW<u32>,
27}
28
29impl Cr1 {
30 pub fn read_bits(&self) -> u32 {
31 self.register.read()
32 }
33 pub unsafe fn modify_bits<F>(&mut self, f: F)
34 where F: FnOnce(&mut u32)
35 {
36 let mut bits = self.register.read();
37 f(&mut bits);
38 self.register.write(bits);
39 }
40 pub unsafe fn write_bits(&mut self, bits: u32) {
41 self.register.write(bits);
42 }
43 pub fn modify<F>(&mut self, f: F)
44 where for<'w> F: FnOnce(&Cr1R, &'w mut Cr1W) -> &'w mut Cr1W
45 {
46 let bits = self.register.read();
47 let r = Cr1R { bits: bits };
48 let mut w = Cr1W { bits: bits };
49 f(&r, &mut w);
50 self.register.write(w.bits);
51 }
52 pub fn read(&self) -> Cr1R {
53 Cr1R { bits: self.register.read() }
54 }
55 pub fn write<F>(&mut self, f: F)
56 where F: FnOnce(&mut Cr1W) -> &mut Cr1W
57 {
58 let mut w = Cr1W::reset_value();
59 f(&mut w);
60 self.register.write(w.bits);
61 }
62}
63
64# [ derive ( Clone , Copy ) ]
65# [ repr ( C ) ]
66pub struct Cr1R {
67 bits: u32,
68}
69
70impl Cr1R {
71 # [ doc = "Bit 0 - Counter enable" ]
72 pub fn cen(&self) -> bool {
73 const OFFSET: u8 = 0u8;
74 self.bits & (1 << OFFSET) != 0
75 }
76 # [ doc = "Bit 1 - Update disable" ]
77 pub fn udis(&self) -> bool {
78 const OFFSET: u8 = 1u8;
79 self.bits & (1 << OFFSET) != 0
80 }
81 # [ doc = "Bit 2 - Update request source" ]
82 pub fn urs(&self) -> bool {
83 const OFFSET: u8 = 2u8;
84 self.bits & (1 << OFFSET) != 0
85 }
86 # [ doc = "Bit 3 - One-pulse mode" ]
87 pub fn opm(&self) -> bool {
88 const OFFSET: u8 = 3u8;
89 self.bits & (1 << OFFSET) != 0
90 }
91 # [ doc = "Bit 7 - Auto-reload preload enable" ]
92 pub fn arpe(&self) -> bool {
93 const OFFSET: u8 = 7u8;
94 self.bits & (1 << OFFSET) != 0
95 }
96 # [ doc = "Bit 11 - UIF status bit remapping" ]
97 pub fn uifremap(&self) -> bool {
98 const OFFSET: u8 = 11u8;
99 self.bits & (1 << OFFSET) != 0
100 }
101}
102
103# [ derive ( Clone , Copy ) ]
104# [ repr ( C ) ]
105pub struct Cr1W {
106 bits: u32,
107}
108
109impl Cr1W {
110 # [ doc = r" Reset value" ]
111 pub fn reset_value() -> Self {
112 Cr1W { bits: 0 }
113 }
114 # [ doc = "Bit 0 - Counter enable" ]
115 pub fn cen(&mut self, value: bool) -> &mut Self {
116 const OFFSET: u8 = 0u8;
117 if value {
118 self.bits |= 1 << OFFSET;
119 } else {
120 self.bits &= !(1 << OFFSET);
121 }
122 self
123 }
124 # [ doc = "Bit 1 - Update disable" ]
125 pub fn udis(&mut self, value: bool) -> &mut Self {
126 const OFFSET: u8 = 1u8;
127 if value {
128 self.bits |= 1 << OFFSET;
129 } else {
130 self.bits &= !(1 << OFFSET);
131 }
132 self
133 }
134 # [ doc = "Bit 2 - Update request source" ]
135 pub fn urs(&mut self, value: bool) -> &mut Self {
136 const OFFSET: u8 = 2u8;
137 if value {
138 self.bits |= 1 << OFFSET;
139 } else {
140 self.bits &= !(1 << OFFSET);
141 }
142 self
143 }
144 # [ doc = "Bit 3 - One-pulse mode" ]
145 pub fn opm(&mut self, value: bool) -> &mut Self {
146 const OFFSET: u8 = 3u8;
147 if value {
148 self.bits |= 1 << OFFSET;
149 } else {
150 self.bits &= !(1 << OFFSET);
151 }
152 self
153 }
154 # [ doc = "Bit 7 - Auto-reload preload enable" ]
155 pub fn arpe(&mut self, value: bool) -> &mut Self {
156 const OFFSET: u8 = 7u8;
157 if value {
158 self.bits |= 1 << OFFSET;
159 } else {
160 self.bits &= !(1 << OFFSET);
161 }
162 self
163 }
164 # [ doc = "Bit 11 - UIF status bit remapping" ]
165 pub fn uifremap(&mut self, value: bool) -> &mut Self {
166 const OFFSET: u8 = 11u8;
167 if value {
168 self.bits |= 1 << OFFSET;
169 } else {
170 self.bits &= !(1 << OFFSET);
171 }
172 self
173 }
174}
175
176# [ repr ( C ) ]
177pub struct Cr2 {
178 register: ::volatile_register::RW<u32>,
179}
180
181impl Cr2 {
182 pub fn read_bits(&self) -> u32 {
183 self.register.read()
184 }
185 pub unsafe fn modify_bits<F>(&mut self, f: F)
186 where F: FnOnce(&mut u32)
187 {
188 let mut bits = self.register.read();
189 f(&mut bits);
190 self.register.write(bits);
191 }
192 pub unsafe fn write_bits(&mut self, bits: u32) {
193 self.register.write(bits);
194 }
195 pub fn modify<F>(&mut self, f: F)
196 where for<'w> F: FnOnce(&Cr2R, &'w mut Cr2W) -> &'w mut Cr2W
197 {
198 let bits = self.register.read();
199 let r = Cr2R { bits: bits };
200 let mut w = Cr2W { bits: bits };
201 f(&r, &mut w);
202 self.register.write(w.bits);
203 }
204 pub fn read(&self) -> Cr2R {
205 Cr2R { bits: self.register.read() }
206 }
207 pub fn write<F>(&mut self, f: F)
208 where F: FnOnce(&mut Cr2W) -> &mut Cr2W
209 {
210 let mut w = Cr2W::reset_value();
211 f(&mut w);
212 self.register.write(w.bits);
213 }
214}
215
216# [ derive ( Clone , Copy ) ]
217# [ repr ( C ) ]
218pub struct Cr2R {
219 bits: u32,
220}
221
222impl Cr2R {
223 # [ doc = "Bits 4:6 - Master mode selection" ]
224 pub fn mms(&self) -> u8 {
225 const MASK: u32 = 7;
226 const OFFSET: u8 = 4u8;
227 ((self.bits >> OFFSET) & MASK) as u8
228 }
229}
230
231# [ derive ( Clone , Copy ) ]
232# [ repr ( C ) ]
233pub struct Cr2W {
234 bits: u32,
235}
236
237impl Cr2W {
238 # [ doc = r" Reset value" ]
239 pub fn reset_value() -> Self {
240 Cr2W { bits: 0 }
241 }
242 # [ doc = "Bits 4:6 - Master mode selection" ]
243 pub fn mms(&mut self, value: u8) -> &mut Self {
244 const OFFSET: u8 = 4u8;
245 const MASK: u8 = 7;
246 self.bits &= !((MASK as u32) << OFFSET);
247 self.bits |= ((value & MASK) as u32) << OFFSET;
248 self
249 }
250}
251
252# [ repr ( C ) ]
253pub struct Dier {
254 register: ::volatile_register::RW<u32>,
255}
256
257impl Dier {
258 pub fn read_bits(&self) -> u32 {
259 self.register.read()
260 }
261 pub unsafe fn modify_bits<F>(&mut self, f: F)
262 where F: FnOnce(&mut u32)
263 {
264 let mut bits = self.register.read();
265 f(&mut bits);
266 self.register.write(bits);
267 }
268 pub unsafe fn write_bits(&mut self, bits: u32) {
269 self.register.write(bits);
270 }
271 pub fn modify<F>(&mut self, f: F)
272 where for<'w> F: FnOnce(&DierR, &'w mut DierW) -> &'w mut DierW
273 {
274 let bits = self.register.read();
275 let r = DierR { bits: bits };
276 let mut w = DierW { bits: bits };
277 f(&r, &mut w);
278 self.register.write(w.bits);
279 }
280 pub fn read(&self) -> DierR {
281 DierR { bits: self.register.read() }
282 }
283 pub fn write<F>(&mut self, f: F)
284 where F: FnOnce(&mut DierW) -> &mut DierW
285 {
286 let mut w = DierW::reset_value();
287 f(&mut w);
288 self.register.write(w.bits);
289 }
290}
291
292# [ derive ( Clone , Copy ) ]
293# [ repr ( C ) ]
294pub struct DierR {
295 bits: u32,
296}
297
298impl DierR {
299 # [ doc = "Bit 8 - Update DMA request enable" ]
300 pub fn ude(&self) -> bool {
301 const OFFSET: u8 = 8u8;
302 self.bits & (1 << OFFSET) != 0
303 }
304 # [ doc = "Bit 0 - Update interrupt enable" ]
305 pub fn uie(&self) -> bool {
306 const OFFSET: u8 = 0u8;
307 self.bits & (1 << OFFSET) != 0
308 }
309}
310
311# [ derive ( Clone , Copy ) ]
312# [ repr ( C ) ]
313pub struct DierW {
314 bits: u32,
315}
316
317impl DierW {
318 # [ doc = r" Reset value" ]
319 pub fn reset_value() -> Self {
320 DierW { bits: 0 }
321 }
322 # [ doc = "Bit 8 - Update DMA request enable" ]
323 pub fn ude(&mut self, value: bool) -> &mut Self {
324 const OFFSET: u8 = 8u8;
325 if value {
326 self.bits |= 1 << OFFSET;
327 } else {
328 self.bits &= !(1 << OFFSET);
329 }
330 self
331 }
332 # [ doc = "Bit 0 - Update interrupt enable" ]
333 pub fn uie(&mut self, value: bool) -> &mut Self {
334 const OFFSET: u8 = 0u8;
335 if value {
336 self.bits |= 1 << OFFSET;
337 } else {
338 self.bits &= !(1 << OFFSET);
339 }
340 self
341 }
342}
343
344# [ repr ( C ) ]
345pub struct Sr {
346 register: ::volatile_register::RW<u32>,
347}
348
349impl Sr {
350 pub fn read_bits(&self) -> u32 {
351 self.register.read()
352 }
353 pub unsafe fn modify_bits<F>(&mut self, f: F)
354 where F: FnOnce(&mut u32)
355 {
356 let mut bits = self.register.read();
357 f(&mut bits);
358 self.register.write(bits);
359 }
360 pub unsafe fn write_bits(&mut self, bits: u32) {
361 self.register.write(bits);
362 }
363 pub fn modify<F>(&mut self, f: F)
364 where for<'w> F: FnOnce(&SrR, &'w mut SrW) -> &'w mut SrW
365 {
366 let bits = self.register.read();
367 let r = SrR { bits: bits };
368 let mut w = SrW { bits: bits };
369 f(&r, &mut w);
370 self.register.write(w.bits);
371 }
372 pub fn read(&self) -> SrR {
373 SrR { bits: self.register.read() }
374 }
375 pub fn write<F>(&mut self, f: F)
376 where F: FnOnce(&mut SrW) -> &mut SrW
377 {
378 let mut w = SrW::reset_value();
379 f(&mut w);
380 self.register.write(w.bits);
381 }
382}
383
384# [ derive ( Clone , Copy ) ]
385# [ repr ( C ) ]
386pub struct SrR {
387 bits: u32,
388}
389
390impl SrR {
391 # [ doc = "Bit 0 - Update interrupt flag" ]
392 pub fn uif(&self) -> bool {
393 const OFFSET: u8 = 0u8;
394 self.bits & (1 << OFFSET) != 0
395 }
396}
397
398# [ derive ( Clone , Copy ) ]
399# [ repr ( C ) ]
400pub struct SrW {
401 bits: u32,
402}
403
404impl SrW {
405 # [ doc = r" Reset value" ]
406 pub fn reset_value() -> Self {
407 SrW { bits: 0 }
408 }
409 # [ doc = "Bit 0 - Update interrupt flag" ]
410 pub fn uif(&mut self, value: bool) -> &mut Self {
411 const OFFSET: u8 = 0u8;
412 if value {
413 self.bits |= 1 << OFFSET;
414 } else {
415 self.bits &= !(1 << OFFSET);
416 }
417 self
418 }
419}
420
421# [ repr ( C ) ]
422pub struct Egr {
423 register: ::volatile_register::WO<u32>,
424}
425
426impl Egr {
427 pub unsafe fn write_bits(&mut self, bits: u32) {
428 self.register.write(bits);
429 }
430 pub fn write<F>(&self, f: F)
431 where F: FnOnce(&mut EgrW) -> &mut EgrW
432 {
433 let mut w = EgrW::reset_value();
434 f(&mut w);
435 self.register.write(w.bits);
436 }
437}
438
439# [ derive ( Clone , Copy ) ]
440# [ repr ( C ) ]
441pub struct EgrW {
442 bits: u32,
443}
444
445impl EgrW {
446 # [ doc = r" Reset value" ]
447 pub fn reset_value() -> Self {
448 EgrW { bits: 0 }
449 }
450 # [ doc = "Bit 0 - Update generation" ]
451 pub fn ug(&mut self, value: bool) -> &mut Self {
452 const OFFSET: u8 = 0u8;
453 if value {
454 self.bits |= 1 << OFFSET;
455 } else {
456 self.bits &= !(1 << OFFSET);
457 }
458 self
459 }
460}
461
462# [ repr ( C ) ]
463pub struct Cnt {
464 register: ::volatile_register::RW<u32>,
465}
466
467impl Cnt {
468 pub fn read_bits(&self) -> u32 {
469 self.register.read()
470 }
471 pub unsafe fn modify_bits<F>(&mut self, f: F)
472 where F: FnOnce(&mut u32)
473 {
474 let mut bits = self.register.read();
475 f(&mut bits);
476 self.register.write(bits);
477 }
478 pub unsafe fn write_bits(&mut self, bits: u32) {
479 self.register.write(bits);
480 }
481 pub fn modify<F>(&mut self, f: F)
482 where for<'w> F: FnOnce(&CntR, &'w mut CntW) -> &'w mut CntW
483 {
484 let bits = self.register.read();
485 let r = CntR { bits: bits };
486 let mut w = CntW { bits: bits };
487 f(&r, &mut w);
488 self.register.write(w.bits);
489 }
490 pub fn read(&self) -> CntR {
491 CntR { bits: self.register.read() }
492 }
493 pub fn write<F>(&mut self, f: F)
494 where F: FnOnce(&mut CntW) -> &mut CntW
495 {
496 let mut w = CntW::reset_value();
497 f(&mut w);
498 self.register.write(w.bits);
499 }
500}
501
502# [ derive ( Clone , Copy ) ]
503# [ repr ( C ) ]
504pub struct CntR {
505 bits: u32,
506}
507
508impl CntR {
509 # [ doc = "Bits 0:15 - Low counter value" ]
510 pub fn cnt(&self) -> u16 {
511 const MASK: u32 = 65535;
512 const OFFSET: u8 = 0u8;
513 ((self.bits >> OFFSET) & MASK) as u16
514 }
515 # [ doc = "Bit 31 - UIF Copy" ]
516 pub fn uifcpy(&self) -> bool {
517 const OFFSET: u8 = 31u8;
518 self.bits & (1 << OFFSET) != 0
519 }
520}
521
522# [ derive ( Clone , Copy ) ]
523# [ repr ( C ) ]
524pub struct CntW {
525 bits: u32,
526}
527
528impl CntW {
529 # [ doc = r" Reset value" ]
530 pub fn reset_value() -> Self {
531 CntW { bits: 0 }
532 }
533 # [ doc = "Bits 0:15 - Low counter value" ]
534 pub fn cnt(&mut self, value: u16) -> &mut Self {
535 const OFFSET: u8 = 0u8;
536 const MASK: u16 = 65535;
537 self.bits &= !((MASK as u32) << OFFSET);
538 self.bits |= ((value & MASK) as u32) << OFFSET;
539 self
540 }
541}
542
543# [ repr ( C ) ]
544pub struct Psc {
545 register: ::volatile_register::RW<u32>,
546}
547
548impl Psc {
549 pub fn read_bits(&self) -> u32 {
550 self.register.read()
551 }
552 pub unsafe fn modify_bits<F>(&mut self, f: F)
553 where F: FnOnce(&mut u32)
554 {
555 let mut bits = self.register.read();
556 f(&mut bits);
557 self.register.write(bits);
558 }
559 pub unsafe fn write_bits(&mut self, bits: u32) {
560 self.register.write(bits);
561 }
562 pub fn modify<F>(&mut self, f: F)
563 where for<'w> F: FnOnce(&PscR, &'w mut PscW) -> &'w mut PscW
564 {
565 let bits = self.register.read();
566 let r = PscR { bits: bits };
567 let mut w = PscW { bits: bits };
568 f(&r, &mut w);
569 self.register.write(w.bits);
570 }
571 pub fn read(&self) -> PscR {
572 PscR { bits: self.register.read() }
573 }
574 pub fn write<F>(&mut self, f: F)
575 where F: FnOnce(&mut PscW) -> &mut PscW
576 {
577 let mut w = PscW::reset_value();
578 f(&mut w);
579 self.register.write(w.bits);
580 }
581}
582
583# [ derive ( Clone , Copy ) ]
584# [ repr ( C ) ]
585pub struct PscR {
586 bits: u32,
587}
588
589impl PscR {
590 # [ doc = "Bits 0:15 - Prescaler value" ]
591 pub fn psc(&self) -> u16 {
592 const MASK: u32 = 65535;
593 const OFFSET: u8 = 0u8;
594 ((self.bits >> OFFSET) & MASK) as u16
595 }
596}
597
598# [ derive ( Clone , Copy ) ]
599# [ repr ( C ) ]
600pub struct PscW {
601 bits: u32,
602}
603
604impl PscW {
605 # [ doc = r" Reset value" ]
606 pub fn reset_value() -> Self {
607 PscW { bits: 0 }
608 }
609 # [ doc = "Bits 0:15 - Prescaler value" ]
610 pub fn psc(&mut self, value: u16) -> &mut Self {
611 const OFFSET: u8 = 0u8;
612 const MASK: u16 = 65535;
613 self.bits &= !((MASK as u32) << OFFSET);
614 self.bits |= ((value & MASK) as u32) << OFFSET;
615 self
616 }
617}
618
619# [ repr ( C ) ]
620pub struct Arr {
621 register: ::volatile_register::RW<u32>,
622}
623
624impl Arr {
625 pub fn read_bits(&self) -> u32 {
626 self.register.read()
627 }
628 pub unsafe fn modify_bits<F>(&mut self, f: F)
629 where F: FnOnce(&mut u32)
630 {
631 let mut bits = self.register.read();
632 f(&mut bits);
633 self.register.write(bits);
634 }
635 pub unsafe fn write_bits(&mut self, bits: u32) {
636 self.register.write(bits);
637 }
638 pub fn modify<F>(&mut self, f: F)
639 where for<'w> F: FnOnce(&ArrR, &'w mut ArrW) -> &'w mut ArrW
640 {
641 let bits = self.register.read();
642 let r = ArrR { bits: bits };
643 let mut w = ArrW { bits: bits };
644 f(&r, &mut w);
645 self.register.write(w.bits);
646 }
647 pub fn read(&self) -> ArrR {
648 ArrR { bits: self.register.read() }
649 }
650 pub fn write<F>(&mut self, f: F)
651 where F: FnOnce(&mut ArrW) -> &mut ArrW
652 {
653 let mut w = ArrW::reset_value();
654 f(&mut w);
655 self.register.write(w.bits);
656 }
657}
658
659# [ derive ( Clone , Copy ) ]
660# [ repr ( C ) ]
661pub struct ArrR {
662 bits: u32,
663}
664
665impl ArrR {
666 # [ doc = "Bits 0:15 - Low Auto-reload value" ]
667 pub fn arr(&self) -> u16 {
668 const MASK: u32 = 65535;
669 const OFFSET: u8 = 0u8;
670 ((self.bits >> OFFSET) & MASK) as u16
671 }
672}
673
674# [ derive ( Clone , Copy ) ]
675# [ repr ( C ) ]
676pub struct ArrW {
677 bits: u32,
678}
679
680impl ArrW {
681 # [ doc = r" Reset value" ]
682 pub fn reset_value() -> Self {
683 ArrW { bits: 0 }
684 }
685 # [ doc = "Bits 0:15 - Low Auto-reload value" ]
686 pub fn arr(&mut self, value: u16) -> &mut Self {
687 const OFFSET: u8 = 0u8;
688 const MASK: u16 = 65535;
689 self.bits &= !((MASK as u32) << OFFSET);
690 self.bits |= ((value & MASK) as u32) << OFFSET;
691 self
692 }
693}