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#[doc = "Reader of register CFGR2"] pub type R = crate::R<u32, super::CFGR2>; #[doc = "Writer for register CFGR2"] pub type W = crate::W<u32, super::CFGR2>; #[doc = "Register CFGR2 `reset()`'s with value 0"] impl crate::ResetValue for super::CFGR2 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `LOCKUP_LOCK`"] pub type LOCKUP_LOCK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LOCKUP_LOCK`"] pub struct LOCKUP_LOCK_W<'a> { w: &'a mut W, } impl<'a> LOCKUP_LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `SRAM_PARITY_LOCK`"] pub type SRAM_PARITY_LOCK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SRAM_PARITY_LOCK`"] pub struct SRAM_PARITY_LOCK_W<'a> { w: &'a mut W, } impl<'a> SRAM_PARITY_LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `PVD_LOCK`"] pub type PVD_LOCK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PVD_LOCK`"] pub struct PVD_LOCK_W<'a> { w: &'a mut W, } impl<'a> PVD_LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `BYP_ADDR_PAR`"] pub type BYP_ADDR_PAR_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BYP_ADDR_PAR`"] pub struct BYP_ADDR_PAR_W<'a> { w: &'a mut W, } impl<'a> BYP_ADDR_PAR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `SRAM_PEF`"] pub type SRAM_PEF_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SRAM_PEF`"] pub struct SRAM_PEF_W<'a> { w: &'a mut W, } impl<'a> SRAM_PEF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } impl R { #[doc = "Bit 0 - Cortex-M0 LOCKUP bit enable bit"] #[inline(always)] pub fn lockup_lock(&self) -> LOCKUP_LOCK_R { LOCKUP_LOCK_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - SRAM parity lock bit"] #[inline(always)] pub fn sram_parity_lock(&self) -> SRAM_PARITY_LOCK_R { SRAM_PARITY_LOCK_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - PVD lock enable bit"] #[inline(always)] pub fn pvd_lock(&self) -> PVD_LOCK_R { PVD_LOCK_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 4 - Bypass address bit 29 in parity calculation"] #[inline(always)] pub fn byp_addr_par(&self) -> BYP_ADDR_PAR_R { BYP_ADDR_PAR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 8 - SRAM parity flag"] #[inline(always)] pub fn sram_pef(&self) -> SRAM_PEF_R { SRAM_PEF_R::new(((self.bits >> 8) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Cortex-M0 LOCKUP bit enable bit"] #[inline(always)] pub fn lockup_lock(&mut self) -> LOCKUP_LOCK_W { LOCKUP_LOCK_W { w: self } } #[doc = "Bit 1 - SRAM parity lock bit"] #[inline(always)] pub fn sram_parity_lock(&mut self) -> SRAM_PARITY_LOCK_W { SRAM_PARITY_LOCK_W { w: self } } #[doc = "Bit 2 - PVD lock enable bit"] #[inline(always)] pub fn pvd_lock(&mut self) -> PVD_LOCK_W { PVD_LOCK_W { w: self } } #[doc = "Bit 4 - Bypass address bit 29 in parity calculation"] #[inline(always)] pub fn byp_addr_par(&mut self) -> BYP_ADDR_PAR_W { BYP_ADDR_PAR_W { w: self } } #[doc = "Bit 8 - SRAM parity flag"] #[inline(always)] pub fn sram_pef(&mut self) -> SRAM_PEF_W { SRAM_PEF_W { w: self } } }