Enum stm32f3::stm32f3x8::tim5::cr2::MMSW

pub enum MMSW {
    RESET,
    ENABLE,
    UPDATE,
    COMPAREPULSE,
    COMPAREOC1,
    COMPAREOC2,
    COMPAREOC3,
    COMPAREOC4,
}

Values that can be written to the field MMS

Variants

RESET

The UG bit from the TIMx_EGR register is used as trigger output

ENABLE

The counter enable signal, CNT_EN, is used as trigger output

UPDATE

The update event is selected as trigger output

COMPAREPULSE

The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred

COMPAREOC1

OC1REF signal is used as trigger output

COMPAREOC2

OC2REF signal is used as trigger output

COMPAREOC3

OC3REF signal is used as trigger output

COMPAREOC4

OC4REF signal is used as trigger output

Trait Implementations

impl Debug for MMSW

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl PartialEq<MMSW> for MMSW

fn eq(&self, other: &MMSW) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for MMSW

impl Clone for MMSW

fn clone(&self) -> MMSW

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.