Enum stm32f3::stm32f373::rcc::cfgr::PLLSRCW

pub enum PLLSRCW {
    HSI_DIV2,
    HSE_DIV_PREDIV,
}

Values that can be written to the field PLLSRC

Variants

HSI_DIV2

HSI divided by 2 selected as PLL input clock

HSE_DIV_PREDIV

HSE divided by PREDIV selected as PLL input clock

Trait Implementations

impl Debug for PLLSRCW

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl PartialEq<PLLSRCW> for PLLSRCW

fn eq(&self, other: &PLLSRCW) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for PLLSRCW

impl Clone for PLLSRCW

fn clone(&self) -> PLLSRCW

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.