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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::I2SPR { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0x10 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = "Possible values of the field `MCKOE`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MCKOER { #[doc = "Master clock output is disabled"] DISABLED, #[doc = "Master clock output is enabled"] ENABLED, } impl MCKOER { #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { match *self { MCKOER::DISABLED => false, MCKOER::ENABLED => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _from(value: bool) -> MCKOER { match value { false => MCKOER::DISABLED, true => MCKOER::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == MCKOER::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == MCKOER::ENABLED } } #[doc = "Values that can be written to the field `MCKOE`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MCKOEW { #[doc = "Master clock output is disabled"] DISABLED, #[doc = "Master clock output is enabled"] ENABLED, } impl MCKOEW { #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _bits(&self) -> bool { match *self { MCKOEW::DISABLED => false, MCKOEW::ENABLED => true, } } } #[doc = r"Proxy"] pub struct _MCKOEW<'a> { w: &'a mut W, } impl<'a> _MCKOEW<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: MCKOEW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Master clock output is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MCKOEW::DISABLED) } #[doc = "Master clock output is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MCKOEW::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 9); self.w.bits |= ((value as u32) & 0x01) << 9; self.w } } #[doc = "Possible values of the field `ODD`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ODDR { #[doc = "Real divider value is I2SDIV * 2"] EVEN, #[doc = "Real divider value is (I2SDIV * 2) + 1"] ODD, } impl ODDR { #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { match *self { ODDR::EVEN => false, ODDR::ODD => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _from(value: bool) -> ODDR { match value { false => ODDR::EVEN, true => ODDR::ODD, } } #[doc = "Checks if the value of the field is `EVEN`"] #[inline(always)] pub fn is_even(&self) -> bool { *self == ODDR::EVEN } #[doc = "Checks if the value of the field is `ODD`"] #[inline(always)] pub fn is_odd(&self) -> bool { *self == ODDR::ODD } } #[doc = "Values that can be written to the field `ODD`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ODDW { #[doc = "Real divider value is I2SDIV * 2"] EVEN, #[doc = "Real divider value is (I2SDIV * 2) + 1"] ODD, } impl ODDW { #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _bits(&self) -> bool { match *self { ODDW::EVEN => false, ODDW::ODD => true, } } } #[doc = r"Proxy"] pub struct _ODDW<'a> { w: &'a mut W, } impl<'a> _ODDW<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ODDW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Real divider value is I2SDIV * 2"] #[inline(always)] pub fn even(self) -> &'a mut W { self.variant(ODDW::EVEN) } #[doc = "Real divider value is (I2SDIV * 2) + 1"] #[inline(always)] pub fn odd(self) -> &'a mut W { self.variant(ODDW::ODD) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 8); self.w.bits |= ((value as u32) & 0x01) << 8; self.w } } #[doc = r"Value of the field"] pub struct I2SDIVR { bits: u8, } impl I2SDIVR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _I2SDIVW<'a> { w: &'a mut W, } impl<'a> _I2SDIVW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0xff << 0); self.w.bits |= ((value as u32) & 0xff) << 0; self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 9 - Master clock output enable"] #[inline(always)] pub fn mckoe(&self) -> MCKOER { MCKOER::_from(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Odd factor for the prescaler"] #[inline(always)] pub fn odd(&self) -> ODDR { ODDR::_from(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:7 - I2S Linear prescaler"] #[inline(always)] pub fn i2sdiv(&self) -> I2SDIVR { let bits = ((self.bits >> 0) & 0xff) as u8; I2SDIVR { bits } } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 9 - Master clock output enable"] #[inline(always)] pub fn mckoe(&mut self) -> _MCKOEW { _MCKOEW { w: self } } #[doc = "Bit 8 - Odd factor for the prescaler"] #[inline(always)] pub fn odd(&mut self) -> _ODDW { _ODDW { w: self } } #[doc = "Bits 0:7 - I2S Linear prescaler"] #[inline(always)] pub fn i2sdiv(&mut self) -> _I2SDIVW { _I2SDIVW { w: self } } }