stm32f3/stm32f373/
mod.rs

1/*!Peripheral access API for STM32F373 microcontrollers (generated using svd2rust v0.36.1 (4052ce6 2025-04-04))
2
3You can find an overview of the generated API [here].
4
5API features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.
6
7[here]: https://docs.rs/svd2rust/0.36.1/svd2rust/#peripheral-api
8[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased
9[repository]: https://github.com/rust-embedded/svd2rust*/
10///Number available in the NVIC for configuring priority
11pub const NVIC_PRIO_BITS: u8 = 4;
12#[cfg(feature = "rt")]
13pub use self::Interrupt as interrupt;
14pub use cortex_m::peripheral::Peripherals as CorePeripherals;
15pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
16#[cfg(feature = "rt")]
17pub use cortex_m_rt::interrupt;
18#[cfg(feature = "rt")]
19extern "C" {
20    fn WWDG();
21    fn PVD();
22    fn TAMP();
23    fn RTC_WKUP();
24    fn FLASH();
25    fn RCC();
26    fn EXTI0();
27    fn EXTI1();
28    fn EXTI2_TS();
29    fn EXTI3();
30    fn EXTI4();
31    fn DMA1_CH1();
32    fn DMA1_CH2();
33    fn DMA1_CH3();
34    fn DMA1_CH4();
35    fn DMA1_CH5();
36    fn DMA1_CH6();
37    fn DMA1_CH7();
38    fn ADC1();
39    fn CAN_TX();
40    fn CAN_RXD();
41    fn CAN_RXI();
42    fn CAN_SCE();
43    fn EXTI5_9();
44    fn TIM15();
45    fn TIM16();
46    fn TIM17();
47    fn TIM18_DAC();
48    fn TIM2();
49    fn TIM3();
50    fn TIM4();
51    fn I2C1_EV();
52    fn I2C1_ER();
53    fn I2C2_EV();
54    fn I2C2_ER();
55    fn SPI1();
56    fn SPI2();
57    fn USART1();
58    fn USART2();
59    fn USART3();
60    fn EXTI15_10();
61    fn RTC_ALARM();
62    fn CEC();
63    fn TIM12();
64    fn TIM13();
65    fn TIM14();
66    fn TIM5();
67    fn SPI3();
68    fn TIM6_DAC1();
69    fn TIM7();
70    fn DMA2_CH1();
71    fn DMA2_CH2();
72    fn DMA2_CH3();
73    fn DMA2_CH4();
74    fn DMA2_CH5();
75    fn SDADC1();
76    fn SDADC2();
77    fn SDADC3();
78    fn COMP1_2_3();
79    fn USB_HP();
80    fn USB_LP();
81    fn USB_WAKEUP();
82    fn TIM19();
83    fn FPU();
84}
85#[doc(hidden)]
86#[repr(C)]
87pub union Vector {
88    _handler: unsafe extern "C" fn(),
89    _reserved: u32,
90}
91#[cfg(feature = "rt")]
92#[doc(hidden)]
93#[link_section = ".vector_table.interrupts"]
94#[no_mangle]
95pub static __INTERRUPTS: [Vector; 82] = [
96    Vector { _handler: WWDG },
97    Vector { _handler: PVD },
98    Vector { _handler: TAMP },
99    Vector { _handler: RTC_WKUP },
100    Vector { _handler: FLASH },
101    Vector { _handler: RCC },
102    Vector { _handler: EXTI0 },
103    Vector { _handler: EXTI1 },
104    Vector { _handler: EXTI2_TS },
105    Vector { _handler: EXTI3 },
106    Vector { _handler: EXTI4 },
107    Vector { _handler: DMA1_CH1 },
108    Vector { _handler: DMA1_CH2 },
109    Vector { _handler: DMA1_CH3 },
110    Vector { _handler: DMA1_CH4 },
111    Vector { _handler: DMA1_CH5 },
112    Vector { _handler: DMA1_CH6 },
113    Vector { _handler: DMA1_CH7 },
114    Vector { _handler: ADC1 },
115    Vector { _handler: CAN_TX },
116    Vector { _handler: CAN_RXD },
117    Vector { _handler: CAN_RXI },
118    Vector { _handler: CAN_SCE },
119    Vector { _handler: EXTI5_9 },
120    Vector { _handler: TIM15 },
121    Vector { _handler: TIM16 },
122    Vector { _handler: TIM17 },
123    Vector {
124        _handler: TIM18_DAC,
125    },
126    Vector { _handler: TIM2 },
127    Vector { _handler: TIM3 },
128    Vector { _handler: TIM4 },
129    Vector { _handler: I2C1_EV },
130    Vector { _handler: I2C1_ER },
131    Vector { _handler: I2C2_EV },
132    Vector { _handler: I2C2_ER },
133    Vector { _handler: SPI1 },
134    Vector { _handler: SPI2 },
135    Vector { _handler: USART1 },
136    Vector { _handler: USART2 },
137    Vector { _handler: USART3 },
138    Vector {
139        _handler: EXTI15_10,
140    },
141    Vector {
142        _handler: RTC_ALARM,
143    },
144    Vector { _handler: CEC },
145    Vector { _handler: TIM12 },
146    Vector { _handler: TIM13 },
147    Vector { _handler: TIM14 },
148    Vector { _reserved: 0 },
149    Vector { _reserved: 0 },
150    Vector { _reserved: 0 },
151    Vector { _reserved: 0 },
152    Vector { _handler: TIM5 },
153    Vector { _handler: SPI3 },
154    Vector { _reserved: 0 },
155    Vector { _reserved: 0 },
156    Vector {
157        _handler: TIM6_DAC1,
158    },
159    Vector { _handler: TIM7 },
160    Vector { _handler: DMA2_CH1 },
161    Vector { _handler: DMA2_CH2 },
162    Vector { _handler: DMA2_CH3 },
163    Vector { _handler: DMA2_CH4 },
164    Vector { _handler: DMA2_CH5 },
165    Vector { _handler: SDADC1 },
166    Vector { _handler: SDADC2 },
167    Vector { _handler: SDADC3 },
168    Vector {
169        _handler: COMP1_2_3,
170    },
171    Vector { _reserved: 0 },
172    Vector { _reserved: 0 },
173    Vector { _reserved: 0 },
174    Vector { _reserved: 0 },
175    Vector { _reserved: 0 },
176    Vector { _reserved: 0 },
177    Vector { _reserved: 0 },
178    Vector { _reserved: 0 },
179    Vector { _reserved: 0 },
180    Vector { _handler: USB_HP },
181    Vector { _handler: USB_LP },
182    Vector {
183        _handler: USB_WAKEUP,
184    },
185    Vector { _reserved: 0 },
186    Vector { _handler: TIM19 },
187    Vector { _reserved: 0 },
188    Vector { _reserved: 0 },
189    Vector { _handler: FPU },
190];
191///Enumeration of all the interrupts.
192#[cfg_attr(feature = "defmt", derive(defmt::Format))]
193#[derive(Copy, Clone, Debug, PartialEq, Eq)]
194#[repr(u16)]
195pub enum Interrupt {
196    ///0 - Window Watchdog interrupt
197    WWDG = 0,
198    ///1 - Power voltage detector through EXTI line detection interrupt
199    PVD = 1,
200    ///2 - Tamper and timestamp through EXTI19 line
201    TAMP = 2,
202    ///3 - RTC
203    RTC_WKUP = 3,
204    ///4 - Flash global interrupt
205    FLASH = 4,
206    ///5 - RCC global interrupt
207    RCC = 5,
208    ///6 - EXTI Line 0 interrupt
209    EXTI0 = 6,
210    ///7 - EXTI Line1 interrupt
211    EXTI1 = 7,
212    ///8 - EXTI Line 2 and routing interface interrupt
213    EXTI2_TS = 8,
214    ///9 - EXTI Line1 interrupt
215    EXTI3 = 9,
216    ///10 - EXTI Line4 interrupt
217    EXTI4 = 10,
218    ///11 - DMA1 channel 1 interrupt
219    DMA1_CH1 = 11,
220    ///12 - DMA1 channel 2 interrupt
221    DMA1_CH2 = 12,
222    ///13 - DMA1 channel 3 interrupt
223    DMA1_CH3 = 13,
224    ///14 - DMA1 channel 4 interrupt
225    DMA1_CH4 = 14,
226    ///15 - DMA1 channel 5 interrupt
227    DMA1_CH5 = 15,
228    ///16 - DMA1 channel 6 interrupt
229    DMA1_CH6 = 16,
230    ///17 - DMA1 channel 7 interrupt
231    DMA1_CH7 = 17,
232    ///18 - ADC1 interrupt
233    ADC1 = 18,
234    ///19 - USB high priority/CAN_TX interrupt
235    CAN_TX = 19,
236    ///20 - USB low priority/CAN_RXD interrupt
237    CAN_RXD = 20,
238    ///21 - CAN_RXI interrupt
239    CAN_RXI = 21,
240    ///22 - CAN_SCE interrupt
241    CAN_SCE = 22,
242    ///23 - EXTI Line\[9:5\] interrupts
243    EXTI5_9 = 23,
244    ///24 - Timer 15 global interrupt
245    TIM15 = 24,
246    ///25 - Timer 16 global interrupt
247    TIM16 = 25,
248    ///26 - Timer 17 global interrupt
249    TIM17 = 26,
250    ///27 - Timer 18 global interrupt/DAC3 underrun interrupt
251    TIM18_DAC = 27,
252    ///28 - Timer 2 global interrupt
253    TIM2 = 28,
254    ///29 - Timer 3 global interrupt
255    TIM3 = 29,
256    ///30 - Timer 4 global interrupt
257    TIM4 = 30,
258    ///31 - I2C1_EV global interrupt/EXTI Line\[3:2\] interrupts
259    I2C1_EV = 31,
260    ///32 - I2C1_ER
261    I2C1_ER = 32,
262    ///33 - I2C2_EV global interrupt/EXTI Line\[4:2\] interrupts
263    I2C2_EV = 33,
264    ///34 - I2C2_ER
265    I2C2_ER = 34,
266    ///35 - SPI1 global interrupt
267    SPI1 = 35,
268    ///36 - SPI2 global interrupt
269    SPI2 = 36,
270    ///37 - USART1 global interrupt/EXTI25 (USART1 wakeup event)
271    USART1 = 37,
272    ///38 - USART2 global interrupt/EXTI26 (USART1 wakeup event)
273    USART2 = 38,
274    ///39 - USART3 global interrupt/EXTI28 (USART1 wakeup event)
275    USART3 = 39,
276    ///40 - EXTI Line\[15:10\] interrupts
277    EXTI15_10 = 40,
278    ///41 - RTC alarm interrupt
279    RTC_ALARM = 41,
280    ///42 - CEC interrupt
281    CEC = 42,
282    ///43 - Timer 12 global interrupt
283    TIM12 = 43,
284    ///44 - Timer 13 global interrupt
285    TIM13 = 44,
286    ///45 - Timer 14 global interrupt
287    TIM14 = 45,
288    ///50 - Timer 5 global interrupt
289    TIM5 = 50,
290    ///51 - SPI3 global interrupt
291    SPI3 = 51,
292    ///54 - TIM6 global, DAC1 Cahnnel1 and Cahnnel2 underrun error Interrupts
293    TIM6_DAC1 = 54,
294    ///55 - Timer 7 global interrupt
295    TIM7 = 55,
296    ///56 - DMA2 channel interrupt
297    DMA2_CH1 = 56,
298    ///57 - DMA2 channel interrupt
299    DMA2_CH2 = 57,
300    ///58 - DMA2 channel interrupt
301    DMA2_CH3 = 58,
302    ///59 - DMA2 channel interrupt
303    DMA2_CH4 = 59,
304    ///60 - DMA2 channel interrupt
305    DMA2_CH5 = 60,
306    ///61 - ADC sigma delta 1 (SDADC1) global interrupt
307    SDADC1 = 61,
308    ///62 - ADC sigma delta 2 (SDADC2) global interrupt
309    SDADC2 = 62,
310    ///63 - ADC sigma delta 3 (SDADC3) global interrupt
311    SDADC3 = 63,
312    ///64 - COMP1_2_3 interrupt combined with EXTI lines 21, 22
313    COMP1_2_3 = 64,
314    ///74 - USB high priority interrupt
315    USB_HP = 74,
316    ///75 - USB low priority interrupt
317    USB_LP = 75,
318    ///76 - USB wakeup interrupt
319    USB_WAKEUP = 76,
320    ///78 - Timer 19 global interrupt
321    TIM19 = 78,
322    ///81 - Floating point unit interrupt
323    FPU = 81,
324}
325unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
326    #[inline(always)]
327    fn number(self) -> u16 {
328        self as u16
329    }
330}
331///General-purpose I/Os
332///
333///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#GPIOA)
334pub type GPIOA = crate::Periph<gpioa::RegisterBlock, 0x4800_0000>;
335impl core::fmt::Debug for GPIOA {
336    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
337        f.debug_struct("GPIOA").finish()
338    }
339}
340///General-purpose I/Os
341pub mod gpioa;
342///General-purpose I/Os
343///
344///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#GPIOB)
345pub type GPIOB = crate::Periph<gpiob::RegisterBlock, 0x4800_0400>;
346impl core::fmt::Debug for GPIOB {
347    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
348        f.debug_struct("GPIOB").finish()
349    }
350}
351///General-purpose I/Os
352pub mod gpiob;
353///General-purpose I/Os
354///
355///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#GPIOC)
356pub type GPIOC = crate::Periph<gpioc::RegisterBlock, 0x4800_0800>;
357impl core::fmt::Debug for GPIOC {
358    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
359        f.debug_struct("GPIOC").finish()
360    }
361}
362///General-purpose I/Os
363pub mod gpioc;
364///General-purpose I/Os
365///
366///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#GPIOC)
367pub type GPIOE = crate::Periph<gpioc::RegisterBlock, 0x4800_1000>;
368impl core::fmt::Debug for GPIOE {
369    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
370        f.debug_struct("GPIOE").finish()
371    }
372}
373///General-purpose I/Os
374pub use self::gpioc as gpioe;
375///General-purpose I/Os
376///
377///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#GPIOC)
378pub type GPIOF = crate::Periph<gpioc::RegisterBlock, 0x4800_1400>;
379impl core::fmt::Debug for GPIOF {
380    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
381        f.debug_struct("GPIOF").finish()
382    }
383}
384///General-purpose I/Os
385pub use self::gpioc as gpiof;
386///Touch sensing controller
387///
388///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TSC)
389pub type TSC = crate::Periph<tsc::RegisterBlock, 0x4002_4000>;
390impl core::fmt::Debug for TSC {
391    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
392        f.debug_struct("TSC").finish()
393    }
394}
395///Touch sensing controller
396pub mod tsc;
397///cyclic redundancy check calculation unit
398///
399///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#CRC)
400pub type CRC = crate::Periph<crc::RegisterBlock, 0x4002_3000>;
401impl core::fmt::Debug for CRC {
402    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
403        f.debug_struct("CRC").finish()
404    }
405}
406///cyclic redundancy check calculation unit
407pub mod crc;
408///Flash
409///
410///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#FLASH)
411pub type FLASH = crate::Periph<flash::RegisterBlock, 0x4002_2000>;
412impl core::fmt::Debug for FLASH {
413    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
414        f.debug_struct("FLASH").finish()
415    }
416}
417///Flash
418pub mod flash;
419///Reset and clock control
420///
421///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#RCC)
422pub type RCC = crate::Periph<rcc::RegisterBlock, 0x4002_1000>;
423impl core::fmt::Debug for RCC {
424    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
425        f.debug_struct("RCC").finish()
426    }
427}
428///Reset and clock control
429pub mod rcc;
430///DMA controller 1
431///
432///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DMA1)
433pub type DMA1 = crate::Periph<dma1::RegisterBlock, 0x4002_0000>;
434impl core::fmt::Debug for DMA1 {
435    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
436        f.debug_struct("DMA1").finish()
437    }
438}
439///DMA controller 1
440pub mod dma1;
441///DMA controller 1
442///
443///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DMA1)
444pub type DMA2 = crate::Periph<dma1::RegisterBlock, 0x4002_0400>;
445impl core::fmt::Debug for DMA2 {
446    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
447        f.debug_struct("DMA2").finish()
448    }
449}
450///DMA controller 1
451pub use self::dma1 as dma2;
452///General purpose timer
453///
454///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM2)
455pub type TIM2 = crate::Periph<tim2::RegisterBlock, 0x4000_0000>;
456impl core::fmt::Debug for TIM2 {
457    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
458        f.debug_struct("TIM2").finish()
459    }
460}
461///General purpose timer
462pub mod tim2;
463///General purpose timer
464///
465///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM5)
466pub type TIM5 = crate::Periph<tim5::RegisterBlock, 0x4000_0c00>;
467impl core::fmt::Debug for TIM5 {
468    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
469        f.debug_struct("TIM5").finish()
470    }
471}
472///General purpose timer
473pub mod tim5;
474///General purpose timer
475///
476///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM3)
477pub type TIM3 = crate::Periph<tim3::RegisterBlock, 0x4000_0400>;
478impl core::fmt::Debug for TIM3 {
479    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
480        f.debug_struct("TIM3").finish()
481    }
482}
483///General purpose timer
484pub mod tim3;
485///General purpose timer
486///
487///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM3)
488pub type TIM4 = crate::Periph<tim3::RegisterBlock, 0x4000_0800>;
489impl core::fmt::Debug for TIM4 {
490    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
491        f.debug_struct("TIM4").finish()
492    }
493}
494///General purpose timer
495pub use self::tim3 as tim4;
496///General purpose timer
497///
498///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM3)
499pub type TIM19 = crate::Periph<tim3::RegisterBlock, 0x4001_5c00>;
500impl core::fmt::Debug for TIM19 {
501    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
502        f.debug_struct("TIM19").finish()
503    }
504}
505///General purpose timer
506pub use self::tim3 as tim19;
507///General purpose timers
508///
509///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM15)
510pub type TIM15 = crate::Periph<tim15::RegisterBlock, 0x4001_4000>;
511impl core::fmt::Debug for TIM15 {
512    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
513        f.debug_struct("TIM15").finish()
514    }
515}
516///General purpose timers
517pub mod tim15;
518///General-purpose-timers
519///
520///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM16)
521pub type TIM16 = crate::Periph<tim16::RegisterBlock, 0x4001_4400>;
522impl core::fmt::Debug for TIM16 {
523    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
524        f.debug_struct("TIM16").finish()
525    }
526}
527///General-purpose-timers
528pub mod tim16;
529///General-purpose-timers
530///
531///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM16)
532pub type TIM17 = crate::Periph<tim16::RegisterBlock, 0x4001_4800>;
533impl core::fmt::Debug for TIM17 {
534    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
535        f.debug_struct("TIM17").finish()
536    }
537}
538///General-purpose-timers
539pub use self::tim16 as tim17;
540///Universal synchronous asynchronous receiver transmitter
541///
542///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#USART1)
543pub type USART1 = crate::Periph<usart1::RegisterBlock, 0x4001_3800>;
544impl core::fmt::Debug for USART1 {
545    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
546        f.debug_struct("USART1").finish()
547    }
548}
549///Universal synchronous asynchronous receiver transmitter
550pub mod usart1;
551///Universal synchronous asynchronous receiver transmitter
552///
553///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#USART1)
554pub type USART2 = crate::Periph<usart1::RegisterBlock, 0x4000_4400>;
555impl core::fmt::Debug for USART2 {
556    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
557        f.debug_struct("USART2").finish()
558    }
559}
560///Universal synchronous asynchronous receiver transmitter
561pub use self::usart1 as usart2;
562///Universal synchronous asynchronous receiver transmitter
563///
564///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#USART1)
565pub type USART3 = crate::Periph<usart1::RegisterBlock, 0x4000_4800>;
566impl core::fmt::Debug for USART3 {
567    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
568        f.debug_struct("USART3").finish()
569    }
570}
571///Universal synchronous asynchronous receiver transmitter
572pub use self::usart1 as usart3;
573///Serial peripheral interface/Inter-IC sound
574///
575///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SPI1)
576pub type SPI1 = crate::Periph<spi1::RegisterBlock, 0x4001_3000>;
577impl core::fmt::Debug for SPI1 {
578    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
579        f.debug_struct("SPI1").finish()
580    }
581}
582///Serial peripheral interface/Inter-IC sound
583pub mod spi1;
584///Serial peripheral interface/Inter-IC sound
585///
586///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SPI1)
587pub type SPI2 = crate::Periph<spi1::RegisterBlock, 0x4000_3800>;
588impl core::fmt::Debug for SPI2 {
589    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
590        f.debug_struct("SPI2").finish()
591    }
592}
593///Serial peripheral interface/Inter-IC sound
594pub use self::spi1 as spi2;
595///Serial peripheral interface/Inter-IC sound
596///
597///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SPI1)
598pub type SPI3 = crate::Periph<spi1::RegisterBlock, 0x4000_3c00>;
599impl core::fmt::Debug for SPI3 {
600    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
601        f.debug_struct("SPI3").finish()
602    }
603}
604///Serial peripheral interface/Inter-IC sound
605pub use self::spi1 as spi3;
606///Serial peripheral interface/Inter-IC sound
607///
608///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SPI1)
609pub type I2S2EXT = crate::Periph<spi1::RegisterBlock, 0x4000_3400>;
610impl core::fmt::Debug for I2S2EXT {
611    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
612        f.debug_struct("I2S2EXT").finish()
613    }
614}
615///Serial peripheral interface/Inter-IC sound
616pub use self::spi1 as i2s2ext;
617///Serial peripheral interface/Inter-IC sound
618///
619///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SPI1)
620pub type I2S3EXT = crate::Periph<spi1::RegisterBlock, 0x4000_4000>;
621impl core::fmt::Debug for I2S3EXT {
622    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
623        f.debug_struct("I2S3EXT").finish()
624    }
625}
626///Serial peripheral interface/Inter-IC sound
627pub use self::spi1 as i2s3ext;
628///Analog to digital converter
629///
630///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#ADC1)
631pub type ADC1 = crate::Periph<adc1::RegisterBlock, 0x4001_2400>;
632impl core::fmt::Debug for ADC1 {
633    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
634        f.debug_struct("ADC1").finish()
635    }
636}
637///Analog to digital converter
638pub mod adc1;
639///External interrupt/event controller
640///
641///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#EXTI)
642pub type EXTI = crate::Periph<exti::RegisterBlock, 0x4001_0400>;
643impl core::fmt::Debug for EXTI {
644    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
645        f.debug_struct("EXTI").finish()
646    }
647}
648///External interrupt/event controller
649pub mod exti;
650///HDMI-CEC controller
651///
652///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#CEC)
653pub type CEC = crate::Periph<cec::RegisterBlock, 0x4000_7800>;
654impl core::fmt::Debug for CEC {
655    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
656        f.debug_struct("CEC").finish()
657    }
658}
659///HDMI-CEC controller
660pub mod cec;
661///Power control
662///
663///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#PWR)
664pub type PWR = crate::Periph<pwr::RegisterBlock, 0x4000_7000>;
665impl core::fmt::Debug for PWR {
666    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
667        f.debug_struct("PWR").finish()
668    }
669}
670///Power control
671pub mod pwr;
672///Controller area network
673///
674///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#CAN)
675pub type CAN = crate::Periph<can::RegisterBlock, 0x4000_6400>;
676impl core::fmt::Debug for CAN {
677    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
678        f.debug_struct("CAN").finish()
679    }
680}
681///Controller area network
682pub mod can;
683///Universal serial bus full-speed device interface
684///
685///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#USB)
686pub type USB = crate::Periph<usb::RegisterBlock, 0x4000_5c00>;
687impl core::fmt::Debug for USB {
688    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
689        f.debug_struct("USB").finish()
690    }
691}
692///Universal serial bus full-speed device interface
693pub mod usb;
694///Inter-integrated circuit
695///
696///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#I2C1)
697pub type I2C1 = crate::Periph<i2c1::RegisterBlock, 0x4000_5400>;
698impl core::fmt::Debug for I2C1 {
699    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
700        f.debug_struct("I2C1").finish()
701    }
702}
703///Inter-integrated circuit
704pub mod i2c1;
705///Inter-integrated circuit
706///
707///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#I2C1)
708pub type I2C2 = crate::Periph<i2c1::RegisterBlock, 0x4000_5800>;
709impl core::fmt::Debug for I2C2 {
710    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
711        f.debug_struct("I2C2").finish()
712    }
713}
714///Inter-integrated circuit
715pub use self::i2c1 as i2c2;
716///Independent watchdog
717///
718///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#IWDG)
719pub type IWDG = crate::Periph<iwdg::RegisterBlock, 0x4000_3000>;
720impl core::fmt::Debug for IWDG {
721    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
722        f.debug_struct("IWDG").finish()
723    }
724}
725///Independent watchdog
726pub mod iwdg;
727///Window watchdog
728///
729///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#WWDG)
730pub type WWDG = crate::Periph<wwdg::RegisterBlock, 0x4000_2c00>;
731impl core::fmt::Debug for WWDG {
732    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
733        f.debug_struct("WWDG").finish()
734    }
735}
736///Window watchdog
737pub mod wwdg;
738///Real-time clock
739///
740///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#RTC)
741pub type RTC = crate::Periph<rtc::RegisterBlock, 0x4000_2800>;
742impl core::fmt::Debug for RTC {
743    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
744        f.debug_struct("RTC").finish()
745    }
746}
747///Real-time clock
748pub mod rtc;
749///Sigma-delta analog-to-digital converter
750///
751///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SDADC1)
752pub type SDADC1 = crate::Periph<sdadc1::RegisterBlock, 0x4001_6000>;
753impl core::fmt::Debug for SDADC1 {
754    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
755        f.debug_struct("SDADC1").finish()
756    }
757}
758///Sigma-delta analog-to-digital converter
759pub mod sdadc1;
760///Sigma-delta analog-to-digital converter
761///
762///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SDADC1)
763pub type SDADC2 = crate::Periph<sdadc1::RegisterBlock, 0x4001_6400>;
764impl core::fmt::Debug for SDADC2 {
765    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
766        f.debug_struct("SDADC2").finish()
767    }
768}
769///Sigma-delta analog-to-digital converter
770pub use self::sdadc1 as sdadc2;
771///Sigma-delta analog-to-digital converter
772///
773///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SDADC1)
774pub type SDADC3 = crate::Periph<sdadc1::RegisterBlock, 0x4001_6800>;
775impl core::fmt::Debug for SDADC3 {
776    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
777        f.debug_struct("SDADC3").finish()
778    }
779}
780///Sigma-delta analog-to-digital converter
781pub use self::sdadc1 as sdadc3;
782///Digital-to-analog converter
783///
784///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DAC2)
785pub type DAC2 = crate::Periph<dac2::RegisterBlock, 0x4000_9800>;
786impl core::fmt::Debug for DAC2 {
787    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
788        f.debug_struct("DAC2").finish()
789    }
790}
791///Digital-to-analog converter
792pub mod dac2;
793///Basic timers
794///
795///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM6)
796pub type TIM6 = crate::Periph<tim6::RegisterBlock, 0x4000_1000>;
797impl core::fmt::Debug for TIM6 {
798    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
799        f.debug_struct("TIM6").finish()
800    }
801}
802///Basic timers
803pub mod tim6;
804///Basic timers
805///
806///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM6)
807pub type TIM7 = crate::Periph<tim6::RegisterBlock, 0x4000_1400>;
808impl core::fmt::Debug for TIM7 {
809    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
810        f.debug_struct("TIM7").finish()
811    }
812}
813///Basic timers
814pub use self::tim6 as tim7;
815///Basic timers
816///
817///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM6)
818pub type TIM18 = crate::Periph<tim6::RegisterBlock, 0x4000_9c00>;
819impl core::fmt::Debug for TIM18 {
820    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
821        f.debug_struct("TIM18").finish()
822    }
823}
824///Basic timers
825pub use self::tim6 as tim18;
826///General purpose timers
827///
828///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM13)
829pub type TIM13 = crate::Periph<tim13::RegisterBlock, 0x4000_1c00>;
830impl core::fmt::Debug for TIM13 {
831    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
832        f.debug_struct("TIM13").finish()
833    }
834}
835///General purpose timers
836pub mod tim13;
837///General purpose timers
838///
839///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM13)
840pub type TIM14 = crate::Periph<tim13::RegisterBlock, 0x4000_2000>;
841impl core::fmt::Debug for TIM14 {
842    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
843        f.debug_struct("TIM14").finish()
844    }
845}
846///General purpose timers
847pub use self::tim13 as tim14;
848///General purpose timers
849///
850///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#TIM12)
851pub type TIM12 = crate::Periph<tim12::RegisterBlock, 0x4000_1800>;
852impl core::fmt::Debug for TIM12 {
853    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
854        f.debug_struct("TIM12").finish()
855    }
856}
857///General purpose timers
858pub mod tim12;
859///Digital-to-analog converter
860///
861///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DAC1)
862pub type DAC1 = crate::Periph<dac1::RegisterBlock, 0x4000_7400>;
863impl core::fmt::Debug for DAC1 {
864    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
865        f.debug_struct("DAC1").finish()
866    }
867}
868///Digital-to-analog converter
869pub mod dac1;
870///Debug support
871///
872///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DBGMCU)
873pub type DBGMCU = crate::Periph<dbgmcu::RegisterBlock, 0xe004_2000>;
874impl core::fmt::Debug for DBGMCU {
875    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
876        f.debug_struct("DBGMCU").finish()
877    }
878}
879///Debug support
880pub mod dbgmcu;
881///System configuration controller
882///
883///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SYSCFG)
884pub type SYSCFG = crate::Periph<syscfg::RegisterBlock, 0x4001_0000>;
885impl core::fmt::Debug for SYSCFG {
886    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
887        f.debug_struct("SYSCFG").finish()
888    }
889}
890///System configuration controller
891pub mod syscfg;
892///General purpose comparators
893///
894///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#COMP)
895pub type COMP = crate::Periph<comp::RegisterBlock, 0x4001_0000>;
896impl core::fmt::Debug for COMP {
897    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
898        f.debug_struct("COMP").finish()
899    }
900}
901///General purpose comparators
902pub mod comp;
903///General-purpose I/Os
904///
905///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#GPIOD)
906pub type GPIOD = crate::Periph<gpiod::RegisterBlock, 0x4800_0c00>;
907impl core::fmt::Debug for GPIOD {
908    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
909        f.debug_struct("GPIOD").finish()
910    }
911}
912///General-purpose I/Os
913pub mod gpiod;
914#[no_mangle]
915static mut DEVICE_PERIPHERALS: bool = false;
916/// All the peripherals.
917#[allow(non_snake_case)]
918pub struct Peripherals {
919    ///GPIOA
920    pub GPIOA: GPIOA,
921    ///GPIOB
922    pub GPIOB: GPIOB,
923    ///GPIOC
924    pub GPIOC: GPIOC,
925    ///GPIOE
926    pub GPIOE: GPIOE,
927    ///GPIOF
928    pub GPIOF: GPIOF,
929    ///TSC
930    pub TSC: TSC,
931    ///CRC
932    pub CRC: CRC,
933    ///FLASH
934    pub FLASH: FLASH,
935    ///RCC
936    pub RCC: RCC,
937    ///DMA1
938    pub DMA1: DMA1,
939    ///DMA2
940    pub DMA2: DMA2,
941    ///TIM2
942    pub TIM2: TIM2,
943    ///TIM5
944    pub TIM5: TIM5,
945    ///TIM3
946    pub TIM3: TIM3,
947    ///TIM4
948    pub TIM4: TIM4,
949    ///TIM19
950    pub TIM19: TIM19,
951    ///TIM15
952    pub TIM15: TIM15,
953    ///TIM16
954    pub TIM16: TIM16,
955    ///TIM17
956    pub TIM17: TIM17,
957    ///USART1
958    pub USART1: USART1,
959    ///USART2
960    pub USART2: USART2,
961    ///USART3
962    pub USART3: USART3,
963    ///SPI1
964    pub SPI1: SPI1,
965    ///SPI2
966    pub SPI2: SPI2,
967    ///SPI3
968    pub SPI3: SPI3,
969    ///I2S2ext
970    pub I2S2EXT: I2S2EXT,
971    ///I2S3ext
972    pub I2S3EXT: I2S3EXT,
973    ///ADC1
974    pub ADC1: ADC1,
975    ///EXTI
976    pub EXTI: EXTI,
977    ///CEC
978    pub CEC: CEC,
979    ///PWR
980    pub PWR: PWR,
981    ///CAN
982    pub CAN: CAN,
983    ///USB
984    pub USB: USB,
985    ///I2C1
986    pub I2C1: I2C1,
987    ///I2C2
988    pub I2C2: I2C2,
989    ///IWDG
990    pub IWDG: IWDG,
991    ///WWDG
992    pub WWDG: WWDG,
993    ///RTC
994    pub RTC: RTC,
995    ///SDADC1
996    pub SDADC1: SDADC1,
997    ///SDADC2
998    pub SDADC2: SDADC2,
999    ///SDADC3
1000    pub SDADC3: SDADC3,
1001    ///DAC2
1002    pub DAC2: DAC2,
1003    ///TIM6
1004    pub TIM6: TIM6,
1005    ///TIM7
1006    pub TIM7: TIM7,
1007    ///TIM18
1008    pub TIM18: TIM18,
1009    ///TIM13
1010    pub TIM13: TIM13,
1011    ///TIM14
1012    pub TIM14: TIM14,
1013    ///TIM12
1014    pub TIM12: TIM12,
1015    ///DAC1
1016    pub DAC1: DAC1,
1017    ///DBGMCU
1018    pub DBGMCU: DBGMCU,
1019    ///SYSCFG
1020    pub SYSCFG: SYSCFG,
1021    ///COMP
1022    pub COMP: COMP,
1023    ///GPIOD
1024    pub GPIOD: GPIOD,
1025}
1026impl Peripherals {
1027    /// Returns all the peripherals *once*.
1028    #[cfg(feature = "critical-section")]
1029    #[inline]
1030    pub fn take() -> Option<Self> {
1031        critical_section::with(|_| {
1032            if unsafe { DEVICE_PERIPHERALS } {
1033                return None;
1034            }
1035            Some(unsafe { Peripherals::steal() })
1036        })
1037    }
1038    /// Unchecked version of `Peripherals::take`.
1039    ///
1040    /// # Safety
1041    ///
1042    /// Each of the returned peripherals must be used at most once.
1043    #[inline]
1044    pub unsafe fn steal() -> Self {
1045        DEVICE_PERIPHERALS = true;
1046        Peripherals {
1047            GPIOA: GPIOA::steal(),
1048            GPIOB: GPIOB::steal(),
1049            GPIOC: GPIOC::steal(),
1050            GPIOE: GPIOE::steal(),
1051            GPIOF: GPIOF::steal(),
1052            TSC: TSC::steal(),
1053            CRC: CRC::steal(),
1054            FLASH: FLASH::steal(),
1055            RCC: RCC::steal(),
1056            DMA1: DMA1::steal(),
1057            DMA2: DMA2::steal(),
1058            TIM2: TIM2::steal(),
1059            TIM5: TIM5::steal(),
1060            TIM3: TIM3::steal(),
1061            TIM4: TIM4::steal(),
1062            TIM19: TIM19::steal(),
1063            TIM15: TIM15::steal(),
1064            TIM16: TIM16::steal(),
1065            TIM17: TIM17::steal(),
1066            USART1: USART1::steal(),
1067            USART2: USART2::steal(),
1068            USART3: USART3::steal(),
1069            SPI1: SPI1::steal(),
1070            SPI2: SPI2::steal(),
1071            SPI3: SPI3::steal(),
1072            I2S2EXT: I2S2EXT::steal(),
1073            I2S3EXT: I2S3EXT::steal(),
1074            ADC1: ADC1::steal(),
1075            EXTI: EXTI::steal(),
1076            CEC: CEC::steal(),
1077            PWR: PWR::steal(),
1078            CAN: CAN::steal(),
1079            USB: USB::steal(),
1080            I2C1: I2C1::steal(),
1081            I2C2: I2C2::steal(),
1082            IWDG: IWDG::steal(),
1083            WWDG: WWDG::steal(),
1084            RTC: RTC::steal(),
1085            SDADC1: SDADC1::steal(),
1086            SDADC2: SDADC2::steal(),
1087            SDADC3: SDADC3::steal(),
1088            DAC2: DAC2::steal(),
1089            TIM6: TIM6::steal(),
1090            TIM7: TIM7::steal(),
1091            TIM18: TIM18::steal(),
1092            TIM13: TIM13::steal(),
1093            TIM14: TIM14::steal(),
1094            TIM12: TIM12::steal(),
1095            DAC1: DAC1::steal(),
1096            DBGMCU: DBGMCU::steal(),
1097            SYSCFG: SYSCFG::steal(),
1098            COMP: COMP::steal(),
1099            GPIOD: GPIOD::steal(),
1100        }
1101    }
1102}
stm32f3/stm32f373/mod.rs

stm32f3/stm32f373/
mod.rs
