Module sdadc1

Source
Expand description

Sigma-delta analog-to-digital converter

Modules§

clrisr
interrupt and status clear register
conf0r
configuration 0 register
conf1r
configuration 1 register
conf2r
configuration 2 register
confchr1
channel configuration register 1
confchr2
channel configuration register 2
cr1
control register 1
cr2
control register 2
isr
interrupt and status register
jchgr
injected channel group selection register
jdata12r
SDADC1 and SDADC2 injected data register
jdata13r
SDADC1 and SDADC3 injected data register
jdatar
data register for injected group
rdata12r
SDADC1 and SDADC2 regular data register
rdata13r
SDADC1 and SDADC3 regular data register
rdatar
data register for the regular channel

Structs§

RegisterBlock
Register block

Type Aliases§

CLRISR
CLRISR (rw) register accessor: interrupt and status clear register
CONF0R
CONF0R (rw) register accessor: configuration 0 register
CONF1R
CONF1R (rw) register accessor: configuration 1 register
CONF2R
CONF2R (rw) register accessor: configuration 2 register
CONFCHR1
CONFCHR1 (rw) register accessor: channel configuration register 1
CONFCHR2
CONFCHR2 (rw) register accessor: channel configuration register 2
CR1
CR1 (rw) register accessor: control register 1
CR2
CR2 (rw) register accessor: control register 2
ISR
ISR (r) register accessor: interrupt and status register
JCHGR
JCHGR (rw) register accessor: injected channel group selection register
JDATA12R
JDATA12R (r) register accessor: SDADC1 and SDADC2 injected data register
JDATA13R
JDATA13R (r) register accessor: SDADC1 and SDADC3 injected data register
JDATAR
JDATAR (r) register accessor: data register for injected group
RDATA12R
RDATA12R (r) register accessor: SDADC1 and SDADC2 regular data register
RDATA13R
RDATA13R (r) register accessor: SDADC1 and SDADC3 regular data register
RDATAR
RDATAR (r) register accessor: data register for the regular channel