stm32f3_staging/stm32f373/sdadc1/
jchgr.rs

1///Register `JCHGR` reader
2pub type R = crate::R<JCHGRrs>;
3///Register `JCHGR` writer
4pub type W = crate::W<JCHGRrs>;
5///Field `JCHG` reader - Injected channel group selection
6pub type JCHG_R = crate::FieldReader<u16>;
7///Field `JCHG` writer - Injected channel group selection
8pub type JCHG_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9impl R {
10    ///Bits 0:8 - Injected channel group selection
11    #[inline(always)]
12    pub fn jchg(&self) -> JCHG_R {
13        JCHG_R::new((self.bits & 0x01ff) as u16)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("JCHGR").field("jchg", &self.jchg()).finish()
19    }
20}
21impl W {
22    ///Bits 0:8 - Injected channel group selection
23    #[inline(always)]
24    pub fn jchg(&mut self) -> JCHG_W<JCHGRrs> {
25        JCHG_W::new(self, 0)
26    }
27}
28/**injected channel group selection register
29
30You can [`read`](crate::Reg::read) this register and get [`jchgr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`jchgr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#SDADC1:JCHGR)*/
33pub struct JCHGRrs;
34impl crate::RegisterSpec for JCHGRrs {
35    type Ux = u32;
36}
37///`read()` method returns [`jchgr::R`](R) reader structure
38impl crate::Readable for JCHGRrs {}
39///`write(|w| ..)` method takes [`jchgr::W`](W) writer structure
40impl crate::Writable for JCHGRrs {
41    type Safety = crate::Unsafe;
42    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
44}
45///`reset()` method sets JCHGR to value 0x01
46impl crate::Resettable for JCHGRrs {
47    const RESET_VALUE: u32 = 0x01;
48}
stm32f3_staging/stm32f373/sdadc1/jchgr.rs

stm32f3_staging/stm32f373/sdadc1/
jchgr.rs
