stm32f3_staging/stm32f373/dbgmcu.rs
1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5 idcode: IDCODE,
6 cr: CR,
7 apb1_fz: APB1_FZ,
8 apb2_fz: APB2_FZ,
9}
10impl RegisterBlock {
11 ///0x00 - MCU Device ID Code Register
12 #[inline(always)]
13 pub const fn idcode(&self) -> &IDCODE {
14 &self.idcode
15 }
16 ///0x04 - Debug MCU Configuration Register
17 #[inline(always)]
18 pub const fn cr(&self) -> &CR {
19 &self.cr
20 }
21 ///0x08 - APB Low Freeze Register
22 #[inline(always)]
23 pub const fn apb1_fz(&self) -> &APB1_FZ {
24 &self.apb1_fz
25 }
26 ///0x0c - APB High Freeze Register
27 #[inline(always)]
28 pub const fn apb2_fz(&self) -> &APB2_FZ {
29 &self.apb2_fz
30 }
31}
32/**IDCODE (r) register accessor: MCU Device ID Code Register
33
34You can [`read`](crate::Reg::read) this register and get [`idcode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
35
36See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DBGMCU:IDCODE)
37
38For information about available fields see [`mod@idcode`]
39module*/
40pub type IDCODE = crate::Reg<idcode::IDCODErs>;
41///MCU Device ID Code Register
42pub mod idcode;
43/**CR (rw) register accessor: Debug MCU Configuration Register
44
45You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
46
47See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DBGMCU:CR)
48
49For information about available fields see [`mod@cr`]
50module*/
51pub type CR = crate::Reg<cr::CRrs>;
52///Debug MCU Configuration Register
53pub mod cr;
54/**APB1_FZ (rw) register accessor: APB Low Freeze Register
55
56You can [`read`](crate::Reg::read) this register and get [`apb1_fz::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb1_fz::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
57
58See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DBGMCU:APB1_FZ)
59
60For information about available fields see [`mod@apb1_fz`]
61module*/
62pub type APB1_FZ = crate::Reg<apb1_fz::APB1_FZrs>;
63///APB Low Freeze Register
64pub mod apb1_fz;
65/**APB2_FZ (rw) register accessor: APB High Freeze Register
66
67You can [`read`](crate::Reg::read) this register and get [`apb2_fz::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb2_fz::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
68
69See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#DBGMCU:APB2_FZ)
70
71For information about available fields see [`mod@apb2_fz`]
72module*/
73pub type APB2_FZ = crate::Reg<apb2_fz::APB2_FZrs>;
74///APB High Freeze Register
75pub mod apb2_fz;