stm32f3_staging/stm32f373/cec/
ier.rs

1///Register `IER` reader
2pub type R = crate::R<IERrs>;
3///Register `IER` writer
4pub type W = crate::W<IERrs>;
5///Field `RXBRIE` reader - Rx-Byte Received Interrupt Enable
6pub type RXBRIE_R = crate::BitReader;
7///Field `RXBRIE` writer - Rx-Byte Received Interrupt Enable
8pub type RXBRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `RXENDIE` reader - End Of Reception Interrupt Enable
10pub type RXENDIE_R = crate::BitReader;
11///Field `RXENDIE` writer - End Of Reception Interrupt Enable
12pub type RXENDIE_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `RXOVRIE` reader - Rx-Buffer Overrun Interrupt Enable
14pub type RXOVRIE_R = crate::BitReader;
15///Field `RXOVRIE` writer - Rx-Buffer Overrun Interrupt Enable
16pub type RXOVRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `BREIE` reader - Bit Rising Error Interrupt Enable
18pub type BREIE_R = crate::BitReader;
19///Field `BREIE` writer - Bit Rising Error Interrupt Enable
20pub type BREIE_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `SBPEIE` reader - Short Bit Period Error Interrupt Enable
22pub type SBPEIE_R = crate::BitReader;
23///Field `SBPEIE` writer - Short Bit Period Error Interrupt Enable
24pub type SBPEIE_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `LBPEIE` reader - Long Bit Period Error Interrupt Enable
26pub type LBPEIE_R = crate::BitReader;
27///Field `LBPEIE` writer - Long Bit Period Error Interrupt Enable
28pub type LBPEIE_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `RXACKIE` reader - Rx-Missing Acknowledge Error Interrupt Enable
30pub type RXACKIE_R = crate::BitReader;
31///Field `RXACKIE` writer - Rx-Missing Acknowledge Error Interrupt Enable
32pub type RXACKIE_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `ARBLSTIE` reader - Arbitration Lost Interrupt Enable
34pub type ARBLSTIE_R = crate::BitReader;
35///Field `ARBLSTIE` writer - Arbitration Lost Interrupt Enable
36pub type ARBLSTIE_W<'a, REG> = crate::BitWriter<'a, REG>;
37///Field `TXBRIE` reader - Tx-Byte Request Interrupt Enable
38pub type TXBRIE_R = crate::BitReader;
39///Field `TXBRIE` writer - Tx-Byte Request Interrupt Enable
40pub type TXBRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `TXENDIE` reader - Tx-End of message interrupt enable
42pub type TXENDIE_R = crate::BitReader;
43///Field `TXENDIE` writer - Tx-End of message interrupt enable
44pub type TXENDIE_W<'a, REG> = crate::BitWriter<'a, REG>;
45///Field `TXUDRIE` reader - Tx-Underrun interrupt enable
46pub type TXUDRIE_R = crate::BitReader;
47///Field `TXUDRIE` writer - Tx-Underrun interrupt enable
48pub type TXUDRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
49///Field `TXERRIE` reader - Tx-Error Interrupt Enable
50pub type TXERRIE_R = crate::BitReader;
51///Field `TXERRIE` writer - Tx-Error Interrupt Enable
52pub type TXERRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
53///Field `TXACKIE` reader - Tx-Missing Acknowledge Error Interrupt Enable
54pub type TXACKIE_R = crate::BitReader;
55///Field `TXACKIE` writer - Tx-Missing Acknowledge Error Interrupt Enable
56pub type TXACKIE_W<'a, REG> = crate::BitWriter<'a, REG>;
57impl R {
58    ///Bit 0 - Rx-Byte Received Interrupt Enable
59    #[inline(always)]
60    pub fn rxbrie(&self) -> RXBRIE_R {
61        RXBRIE_R::new((self.bits & 1) != 0)
62    }
63    ///Bit 1 - End Of Reception Interrupt Enable
64    #[inline(always)]
65    pub fn rxendie(&self) -> RXENDIE_R {
66        RXENDIE_R::new(((self.bits >> 1) & 1) != 0)
67    }
68    ///Bit 2 - Rx-Buffer Overrun Interrupt Enable
69    #[inline(always)]
70    pub fn rxovrie(&self) -> RXOVRIE_R {
71        RXOVRIE_R::new(((self.bits >> 2) & 1) != 0)
72    }
73    ///Bit 3 - Bit Rising Error Interrupt Enable
74    #[inline(always)]
75    pub fn breie(&self) -> BREIE_R {
76        BREIE_R::new(((self.bits >> 3) & 1) != 0)
77    }
78    ///Bit 4 - Short Bit Period Error Interrupt Enable
79    #[inline(always)]
80    pub fn sbpeie(&self) -> SBPEIE_R {
81        SBPEIE_R::new(((self.bits >> 4) & 1) != 0)
82    }
83    ///Bit 5 - Long Bit Period Error Interrupt Enable
84    #[inline(always)]
85    pub fn lbpeie(&self) -> LBPEIE_R {
86        LBPEIE_R::new(((self.bits >> 5) & 1) != 0)
87    }
88    ///Bit 6 - Rx-Missing Acknowledge Error Interrupt Enable
89    #[inline(always)]
90    pub fn rxackie(&self) -> RXACKIE_R {
91        RXACKIE_R::new(((self.bits >> 6) & 1) != 0)
92    }
93    ///Bit 7 - Arbitration Lost Interrupt Enable
94    #[inline(always)]
95    pub fn arblstie(&self) -> ARBLSTIE_R {
96        ARBLSTIE_R::new(((self.bits >> 7) & 1) != 0)
97    }
98    ///Bit 8 - Tx-Byte Request Interrupt Enable
99    #[inline(always)]
100    pub fn txbrie(&self) -> TXBRIE_R {
101        TXBRIE_R::new(((self.bits >> 8) & 1) != 0)
102    }
103    ///Bit 9 - Tx-End of message interrupt enable
104    #[inline(always)]
105    pub fn txendie(&self) -> TXENDIE_R {
106        TXENDIE_R::new(((self.bits >> 9) & 1) != 0)
107    }
108    ///Bit 10 - Tx-Underrun interrupt enable
109    #[inline(always)]
110    pub fn txudrie(&self) -> TXUDRIE_R {
111        TXUDRIE_R::new(((self.bits >> 10) & 1) != 0)
112    }
113    ///Bit 11 - Tx-Error Interrupt Enable
114    #[inline(always)]
115    pub fn txerrie(&self) -> TXERRIE_R {
116        TXERRIE_R::new(((self.bits >> 11) & 1) != 0)
117    }
118    ///Bit 12 - Tx-Missing Acknowledge Error Interrupt Enable
119    #[inline(always)]
120    pub fn txackie(&self) -> TXACKIE_R {
121        TXACKIE_R::new(((self.bits >> 12) & 1) != 0)
122    }
123}
124impl core::fmt::Debug for R {
125    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
126        f.debug_struct("IER")
127            .field("txackie", &self.txackie())
128            .field("txerrie", &self.txerrie())
129            .field("txudrie", &self.txudrie())
130            .field("txendie", &self.txendie())
131            .field("txbrie", &self.txbrie())
132            .field("arblstie", &self.arblstie())
133            .field("rxackie", &self.rxackie())
134            .field("lbpeie", &self.lbpeie())
135            .field("sbpeie", &self.sbpeie())
136            .field("breie", &self.breie())
137            .field("rxovrie", &self.rxovrie())
138            .field("rxendie", &self.rxendie())
139            .field("rxbrie", &self.rxbrie())
140            .finish()
141    }
142}
143impl W {
144    ///Bit 0 - Rx-Byte Received Interrupt Enable
145    #[inline(always)]
146    pub fn rxbrie(&mut self) -> RXBRIE_W<IERrs> {
147        RXBRIE_W::new(self, 0)
148    }
149    ///Bit 1 - End Of Reception Interrupt Enable
150    #[inline(always)]
151    pub fn rxendie(&mut self) -> RXENDIE_W<IERrs> {
152        RXENDIE_W::new(self, 1)
153    }
154    ///Bit 2 - Rx-Buffer Overrun Interrupt Enable
155    #[inline(always)]
156    pub fn rxovrie(&mut self) -> RXOVRIE_W<IERrs> {
157        RXOVRIE_W::new(self, 2)
158    }
159    ///Bit 3 - Bit Rising Error Interrupt Enable
160    #[inline(always)]
161    pub fn breie(&mut self) -> BREIE_W<IERrs> {
162        BREIE_W::new(self, 3)
163    }
164    ///Bit 4 - Short Bit Period Error Interrupt Enable
165    #[inline(always)]
166    pub fn sbpeie(&mut self) -> SBPEIE_W<IERrs> {
167        SBPEIE_W::new(self, 4)
168    }
169    ///Bit 5 - Long Bit Period Error Interrupt Enable
170    #[inline(always)]
171    pub fn lbpeie(&mut self) -> LBPEIE_W<IERrs> {
172        LBPEIE_W::new(self, 5)
173    }
174    ///Bit 6 - Rx-Missing Acknowledge Error Interrupt Enable
175    #[inline(always)]
176    pub fn rxackie(&mut self) -> RXACKIE_W<IERrs> {
177        RXACKIE_W::new(self, 6)
178    }
179    ///Bit 7 - Arbitration Lost Interrupt Enable
180    #[inline(always)]
181    pub fn arblstie(&mut self) -> ARBLSTIE_W<IERrs> {
182        ARBLSTIE_W::new(self, 7)
183    }
184    ///Bit 8 - Tx-Byte Request Interrupt Enable
185    #[inline(always)]
186    pub fn txbrie(&mut self) -> TXBRIE_W<IERrs> {
187        TXBRIE_W::new(self, 8)
188    }
189    ///Bit 9 - Tx-End of message interrupt enable
190    #[inline(always)]
191    pub fn txendie(&mut self) -> TXENDIE_W<IERrs> {
192        TXENDIE_W::new(self, 9)
193    }
194    ///Bit 10 - Tx-Underrun interrupt enable
195    #[inline(always)]
196    pub fn txudrie(&mut self) -> TXUDRIE_W<IERrs> {
197        TXUDRIE_W::new(self, 10)
198    }
199    ///Bit 11 - Tx-Error Interrupt Enable
200    #[inline(always)]
201    pub fn txerrie(&mut self) -> TXERRIE_W<IERrs> {
202        TXERRIE_W::new(self, 11)
203    }
204    ///Bit 12 - Tx-Missing Acknowledge Error Interrupt Enable
205    #[inline(always)]
206    pub fn txackie(&mut self) -> TXACKIE_W<IERrs> {
207        TXACKIE_W::new(self, 12)
208    }
209}
210/**interrupt enable register
211
212You can [`read`](crate::Reg::read) this register and get [`ier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
213
214See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#CEC:IER)*/
215pub struct IERrs;
216impl crate::RegisterSpec for IERrs {
217    type Ux = u32;
218}
219///`read()` method returns [`ier::R`](R) reader structure
220impl crate::Readable for IERrs {}
221///`write(|w| ..)` method takes [`ier::W`](W) writer structure
222impl crate::Writable for IERrs {
223    type Safety = crate::Unsafe;
224    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
225    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
226}
227///`reset()` method sets IER to value 0
228impl crate::Resettable for IERrs {
229    const RESET_VALUE: u32 = 0;
230}
stm32f3_staging/stm32f373/cec/ier.rs

stm32f3_staging/stm32f373/cec/
ier.rs
