stm32f3_staging/stm32f373/adc1/
dr.rs

1///Register `DR` reader
2pub type R = crate::R<DRrs>;
3///Field `DATA` reader - Regular data
4pub type DATA_R = crate::FieldReader<u16>;
5impl R {
6    ///Bits 0:15 - Regular data
7    #[inline(always)]
8    pub fn data(&self) -> DATA_R {
9        DATA_R::new((self.bits & 0xffff) as u16)
10    }
11}
12impl core::fmt::Debug for R {
13    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
14        f.debug_struct("DR").field("data", &self.data()).finish()
15    }
16}
17/**regular data register
18
19You can [`read`](crate::Reg::read) this register and get [`dr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
20
21See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F373.html#ADC1:DR)*/
22pub struct DRrs;
23impl crate::RegisterSpec for DRrs {
24    type Ux = u32;
25}
26///`read()` method returns [`dr::R`](R) reader structure
27impl crate::Readable for DRrs {}
28///`reset()` method sets DR to value 0
29impl crate::Resettable for DRrs {
30    const RESET_VALUE: u32 = 0;
31}
stm32f3_staging/stm32f373/adc1/dr.rs

stm32f3_staging/stm32f373/adc1/
dr.rs
