stm32f3_staging/stm32f303/
tim6.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr1: CR1,
6    cr2: CR2,
7    _reserved2: [u8; 0x04],
8    dier: DIER,
9    sr: SR,
10    egr: EGR,
11    _reserved5: [u8; 0x0c],
12    cnt: CNT,
13    psc: PSC,
14    arr: ARR,
15}
16impl RegisterBlock {
17    ///0x00 - control register 1
18    #[inline(always)]
19    pub const fn cr1(&self) -> &CR1 {
20        &self.cr1
21    }
22    ///0x04 - control register 2
23    #[inline(always)]
24    pub const fn cr2(&self) -> &CR2 {
25        &self.cr2
26    }
27    ///0x0c - DMA/Interrupt enable register
28    #[inline(always)]
29    pub const fn dier(&self) -> &DIER {
30        &self.dier
31    }
32    ///0x10 - status register
33    #[inline(always)]
34    pub const fn sr(&self) -> &SR {
35        &self.sr
36    }
37    ///0x14 - event generation register
38    #[inline(always)]
39    pub const fn egr(&self) -> &EGR {
40        &self.egr
41    }
42    ///0x24 - counter
43    #[inline(always)]
44    pub const fn cnt(&self) -> &CNT {
45        &self.cnt
46    }
47    ///0x28 - prescaler
48    #[inline(always)]
49    pub const fn psc(&self) -> &PSC {
50        &self.psc
51    }
52    ///0x2c - auto-reload register
53    #[inline(always)]
54    pub const fn arr(&self) -> &ARR {
55        &self.arr
56    }
57}
58/**CR1 (rw) register accessor: control register 1
59
60You can [`read`](crate::Reg::read) this register and get [`cr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
61
62See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:CR1)
63
64For information about available fields see [`mod@cr1`]
65module*/
66pub type CR1 = crate::Reg<cr1::CR1rs>;
67///control register 1
68pub mod cr1;
69/**CR2 (rw) register accessor: control register 2
70
71You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
72
73See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:CR2)
74
75For information about available fields see [`mod@cr2`]
76module*/
77pub type CR2 = crate::Reg<cr2::CR2rs>;
78///control register 2
79pub mod cr2;
80/**DIER (rw) register accessor: DMA/Interrupt enable register
81
82You can [`read`](crate::Reg::read) this register and get [`dier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
83
84See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:DIER)
85
86For information about available fields see [`mod@dier`]
87module*/
88pub type DIER = crate::Reg<dier::DIERrs>;
89///DMA/Interrupt enable register
90pub mod dier;
91/**SR (rw) register accessor: status register
92
93You can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
94
95See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:SR)
96
97For information about available fields see [`mod@sr`]
98module*/
99pub type SR = crate::Reg<sr::SRrs>;
100///status register
101pub mod sr;
102/**EGR (w) register accessor: event generation register
103
104You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`egr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
105
106See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:EGR)
107
108For information about available fields see [`mod@egr`]
109module*/
110pub type EGR = crate::Reg<egr::EGRrs>;
111///event generation register
112pub mod egr;
113/**CNT (rw) register accessor: counter
114
115You can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
116
117See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:CNT)
118
119For information about available fields see [`mod@cnt`]
120module*/
121pub type CNT = crate::Reg<cnt::CNTrs>;
122///counter
123pub mod cnt;
124/**PSC (rw) register accessor: prescaler
125
126You can [`read`](crate::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
127
128See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:PSC)
129
130For information about available fields see [`mod@psc`]
131module*/
132pub type PSC = crate::Reg<psc::PSCrs>;
133///prescaler
134pub mod psc;
135/**ARR (rw) register accessor: auto-reload register
136
137You can [`read`](crate::Reg::read) this register and get [`arr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
138
139See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#TIM6:ARR)
140
141For information about available fields see [`mod@arr`]
142module*/
143pub type ARR = crate::Reg<arr::ARRrs>;
144///auto-reload register
145pub mod arr;
stm32f3_staging/stm32f303/tim6.rs

stm32f3_staging/stm32f303/
tim6.rs
