stm32f3_staging/stm32f303/
syscfg.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cfgr1: CFGR1,
6    rcr: RCR,
7    exticr1: EXTICR1,
8    exticr2: EXTICR2,
9    exticr3: EXTICR3,
10    exticr4: EXTICR4,
11    cfgr2: CFGR2,
12    _reserved7: [u8; 0x2c],
13    cfgr4: CFGR4,
14    _reserved8: [u8; 0x04],
15    cfgr3: CFGR3,
16}
17impl RegisterBlock {
18    ///0x00 - configuration register 1
19    #[inline(always)]
20    pub const fn cfgr1(&self) -> &CFGR1 {
21        &self.cfgr1
22    }
23    ///0x04 - CCM SRAM protection register
24    #[inline(always)]
25    pub const fn rcr(&self) -> &RCR {
26        &self.rcr
27    }
28    ///0x08 - external interrupt configuration register 1
29    #[inline(always)]
30    pub const fn exticr1(&self) -> &EXTICR1 {
31        &self.exticr1
32    }
33    ///0x0c - external interrupt configuration register 2
34    #[inline(always)]
35    pub const fn exticr2(&self) -> &EXTICR2 {
36        &self.exticr2
37    }
38    ///0x10 - external interrupt configuration register 3
39    #[inline(always)]
40    pub const fn exticr3(&self) -> &EXTICR3 {
41        &self.exticr3
42    }
43    ///0x14 - external interrupt configuration register 4
44    #[inline(always)]
45    pub const fn exticr4(&self) -> &EXTICR4 {
46        &self.exticr4
47    }
48    ///0x18 - configuration register 2
49    #[inline(always)]
50    pub const fn cfgr2(&self) -> &CFGR2 {
51        &self.cfgr2
52    }
53    ///0x48 - SYSCFG configuration register 4
54    #[inline(always)]
55    pub const fn cfgr4(&self) -> &CFGR4 {
56        &self.cfgr4
57    }
58    ///0x50 - SYSCFG configuration register 3
59    #[inline(always)]
60    pub const fn cfgr3(&self) -> &CFGR3 {
61        &self.cfgr3
62    }
63}
64/**CFGR1 (rw) register accessor: configuration register 1
65
66You can [`read`](crate::Reg::read) this register and get [`cfgr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
67
68See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:CFGR1)
69
70For information about available fields see [`mod@cfgr1`]
71module*/
72pub type CFGR1 = crate::Reg<cfgr1::CFGR1rs>;
73///configuration register 1
74pub mod cfgr1;
75/**EXTICR1 (rw) register accessor: external interrupt configuration register 1
76
77You can [`read`](crate::Reg::read) this register and get [`exticr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:EXTICR1)
80
81For information about available fields see [`mod@exticr1`]
82module*/
83pub type EXTICR1 = crate::Reg<exticr1::EXTICR1rs>;
84///external interrupt configuration register 1
85pub mod exticr1;
86/**EXTICR2 (rw) register accessor: external interrupt configuration register 2
87
88You can [`read`](crate::Reg::read) this register and get [`exticr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
89
90See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:EXTICR2)
91
92For information about available fields see [`mod@exticr2`]
93module*/
94pub type EXTICR2 = crate::Reg<exticr2::EXTICR2rs>;
95///external interrupt configuration register 2
96pub mod exticr2;
97/**EXTICR3 (rw) register accessor: external interrupt configuration register 3
98
99You can [`read`](crate::Reg::read) this register and get [`exticr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
100
101See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:EXTICR3)
102
103For information about available fields see [`mod@exticr3`]
104module*/
105pub type EXTICR3 = crate::Reg<exticr3::EXTICR3rs>;
106///external interrupt configuration register 3
107pub mod exticr3;
108/**EXTICR4 (rw) register accessor: external interrupt configuration register 4
109
110You can [`read`](crate::Reg::read) this register and get [`exticr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
111
112See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:EXTICR4)
113
114For information about available fields see [`mod@exticr4`]
115module*/
116pub type EXTICR4 = crate::Reg<exticr4::EXTICR4rs>;
117///external interrupt configuration register 4
118pub mod exticr4;
119/**CFGR2 (rw) register accessor: configuration register 2
120
121You can [`read`](crate::Reg::read) this register and get [`cfgr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
122
123See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:CFGR2)
124
125For information about available fields see [`mod@cfgr2`]
126module*/
127pub type CFGR2 = crate::Reg<cfgr2::CFGR2rs>;
128///configuration register 2
129pub mod cfgr2;
130/**RCR (rw) register accessor: CCM SRAM protection register
131
132You can [`read`](crate::Reg::read) this register and get [`rcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
133
134See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:RCR)
135
136For information about available fields see [`mod@rcr`]
137module*/
138pub type RCR = crate::Reg<rcr::RCRrs>;
139///CCM SRAM protection register
140pub mod rcr;
141/**CFGR3 (rw) register accessor: SYSCFG configuration register 3
142
143You can [`read`](crate::Reg::read) this register and get [`cfgr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
144
145See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:CFGR3)
146
147For information about available fields see [`mod@cfgr3`]
148module*/
149pub type CFGR3 = crate::Reg<cfgr3::CFGR3rs>;
150///SYSCFG configuration register 3
151pub mod cfgr3;
152/**CFGR4 (rw) register accessor: SYSCFG configuration register 4
153
154You can [`read`](crate::Reg::read) this register and get [`cfgr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
155
156See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#SYSCFG:CFGR4)
157
158For information about available fields see [`mod@cfgr4`]
159module*/
160pub type CFGR4 = crate::Reg<cfgr4::CFGR4rs>;
161///SYSCFG configuration register 4
162pub mod cfgr4;
stm32f3_staging/stm32f303/syscfg.rs

stm32f3_staging/stm32f303/
syscfg.rs
