stm32f3_staging/stm32f302/
syscfg.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cfgr1: CFGR1,
6    _reserved1: [u8; 0x04],
7    exticr1: EXTICR1,
8    exticr2: EXTICR2,
9    exticr3: EXTICR3,
10    exticr4: EXTICR4,
11    cfgr2: CFGR2,
12}
13impl RegisterBlock {
14    ///0x00 - configuration register 1
15    #[inline(always)]
16    pub const fn cfgr1(&self) -> &CFGR1 {
17        &self.cfgr1
18    }
19    ///0x08 - external interrupt configuration register 1
20    #[inline(always)]
21    pub const fn exticr1(&self) -> &EXTICR1 {
22        &self.exticr1
23    }
24    ///0x0c - external interrupt configuration register 2
25    #[inline(always)]
26    pub const fn exticr2(&self) -> &EXTICR2 {
27        &self.exticr2
28    }
29    ///0x10 - external interrupt configuration register 3
30    #[inline(always)]
31    pub const fn exticr3(&self) -> &EXTICR3 {
32        &self.exticr3
33    }
34    ///0x14 - external interrupt configuration register 4
35    #[inline(always)]
36    pub const fn exticr4(&self) -> &EXTICR4 {
37        &self.exticr4
38    }
39    ///0x18 - configuration register 2
40    #[inline(always)]
41    pub const fn cfgr2(&self) -> &CFGR2 {
42        &self.cfgr2
43    }
44}
45/**CFGR1 (rw) register accessor: configuration register 1
46
47You can [`read`](crate::Reg::read) this register and get [`cfgr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48
49See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F302.html#SYSCFG:CFGR1)
50
51For information about available fields see [`mod@cfgr1`]
52module*/
53pub type CFGR1 = crate::Reg<cfgr1::CFGR1rs>;
54///configuration register 1
55pub mod cfgr1;
56/**EXTICR1 (rw) register accessor: external interrupt configuration register 1
57
58You can [`read`](crate::Reg::read) this register and get [`exticr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
59
60See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F302.html#SYSCFG:EXTICR1)
61
62For information about available fields see [`mod@exticr1`]
63module*/
64pub type EXTICR1 = crate::Reg<exticr1::EXTICR1rs>;
65///external interrupt configuration register 1
66pub mod exticr1;
67/**EXTICR2 (rw) register accessor: external interrupt configuration register 2
68
69You can [`read`](crate::Reg::read) this register and get [`exticr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
70
71See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F302.html#SYSCFG:EXTICR2)
72
73For information about available fields see [`mod@exticr2`]
74module*/
75pub type EXTICR2 = crate::Reg<exticr2::EXTICR2rs>;
76///external interrupt configuration register 2
77pub mod exticr2;
78/**EXTICR3 (rw) register accessor: external interrupt configuration register 3
79
80You can [`read`](crate::Reg::read) this register and get [`exticr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
81
82See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F302.html#SYSCFG:EXTICR3)
83
84For information about available fields see [`mod@exticr3`]
85module*/
86pub type EXTICR3 = crate::Reg<exticr3::EXTICR3rs>;
87///external interrupt configuration register 3
88pub mod exticr3;
89/**EXTICR4 (rw) register accessor: external interrupt configuration register 4
90
91You can [`read`](crate::Reg::read) this register and get [`exticr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exticr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
92
93See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F302.html#SYSCFG:EXTICR4)
94
95For information about available fields see [`mod@exticr4`]
96module*/
97pub type EXTICR4 = crate::Reg<exticr4::EXTICR4rs>;
98///external interrupt configuration register 4
99pub mod exticr4;
100/**CFGR2 (rw) register accessor: configuration register 2
101
102You can [`read`](crate::Reg::read) this register and get [`cfgr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
103
104See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F302.html#SYSCFG:CFGR2)
105
106For information about available fields see [`mod@cfgr2`]
107module*/
108pub type CFGR2 = crate::Reg<cfgr2::CFGR2rs>;
109///configuration register 2
110pub mod cfgr2;
stm32f3_staging/stm32f302/syscfg.rs

stm32f3_staging/stm32f302/
syscfg.rs
