stm32f3_staging/stm32f303/
adc1_2.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    csr: CSR,
6    _reserved1: [u8; 0x04],
7    ccr: CCR,
8    cdr: CDR,
9}
10impl RegisterBlock {
11    ///0x00 - ADC Common status register
12    #[inline(always)]
13    pub const fn csr(&self) -> &CSR {
14        &self.csr
15    }
16    ///0x08 - ADC common control register
17    #[inline(always)]
18    pub const fn ccr(&self) -> &CCR {
19        &self.ccr
20    }
21    ///0x0c - ADC common regular data register for dual and triple modes
22    #[inline(always)]
23    pub const fn cdr(&self) -> &CDR {
24        &self.cdr
25    }
26}
27/**CSR (r) register accessor: ADC Common status register
28
29You can [`read`](crate::Reg::read) this register and get [`csr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
30
31See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#ADC1_2:CSR)
32
33For information about available fields see [`mod@csr`]
34module*/
35pub type CSR = crate::Reg<csr::CSRrs>;
36///ADC Common status register
37pub mod csr;
38/**CCR (rw) register accessor: ADC common control register
39
40You can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
41
42See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#ADC1_2:CCR)
43
44For information about available fields see [`mod@ccr`]
45module*/
46pub type CCR = crate::Reg<ccr::CCRrs>;
47///ADC common control register
48pub mod ccr;
49/**CDR (r) register accessor: ADC common regular data register for dual and triple modes
50
51You can [`read`](crate::Reg::read) this register and get [`cdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
52
53See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F303.html#ADC1_2:CDR)
54
55For information about available fields see [`mod@cdr`]
56module*/
57pub type CDR = crate::Reg<cdr::CDRrs>;
58///ADC common regular data register for dual and triple modes
59pub mod cdr;
stm32f3_staging/stm32f303/adc1_2.rs

stm32f3_staging/stm32f303/
adc1_2.rs
