stm32f2/stm32f217/rtc/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5/**Wakeup clock selection
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10#[repr(u8)]
11pub enum WUCKSEL {
12    ///0: RTC/16 clock is selected
13    Div16 = 0,
14    ///1: RTC/8 clock is selected
15    Div8 = 1,
16    ///2: RTC/4 clock is selected
17    Div4 = 2,
18    ///3: RTC/2 clock is selected
19    Div2 = 3,
20    ///4: ck_spre (usually 1 Hz) clock is selected
21    ClockSpare = 4,
22    ///6: ck_spre (usually 1 Hz) clock is selected and 2^16 is added to the WUT counter value
23    ClockSpareWithOffset = 6,
24}
25impl From<WUCKSEL> for u8 {
26    #[inline(always)]
27    fn from(variant: WUCKSEL) -> Self {
28        variant as _
29    }
30}
31impl crate::FieldSpec for WUCKSEL {
32    type Ux = u8;
33}
34impl crate::IsEnum for WUCKSEL {}
35///Field `WUCKSEL` reader - Wakeup clock selection
36pub type WUCKSEL_R = crate::FieldReader<WUCKSEL>;
37impl WUCKSEL_R {
38    ///Get enumerated values variant
39    #[inline(always)]
40    pub const fn variant(&self) -> Option<WUCKSEL> {
41        match self.bits {
42            0 => Some(WUCKSEL::Div16),
43            1 => Some(WUCKSEL::Div8),
44            2 => Some(WUCKSEL::Div4),
45            3 => Some(WUCKSEL::Div2),
46            4 => Some(WUCKSEL::ClockSpare),
47            6 => Some(WUCKSEL::ClockSpareWithOffset),
48            _ => None,
49        }
50    }
51    ///RTC/16 clock is selected
52    #[inline(always)]
53    pub fn is_div16(&self) -> bool {
54        *self == WUCKSEL::Div16
55    }
56    ///RTC/8 clock is selected
57    #[inline(always)]
58    pub fn is_div8(&self) -> bool {
59        *self == WUCKSEL::Div8
60    }
61    ///RTC/4 clock is selected
62    #[inline(always)]
63    pub fn is_div4(&self) -> bool {
64        *self == WUCKSEL::Div4
65    }
66    ///RTC/2 clock is selected
67    #[inline(always)]
68    pub fn is_div2(&self) -> bool {
69        *self == WUCKSEL::Div2
70    }
71    ///ck_spre (usually 1 Hz) clock is selected
72    #[inline(always)]
73    pub fn is_clock_spare(&self) -> bool {
74        *self == WUCKSEL::ClockSpare
75    }
76    ///ck_spre (usually 1 Hz) clock is selected and 2^16 is added to the WUT counter value
77    #[inline(always)]
78    pub fn is_clock_spare_with_offset(&self) -> bool {
79        *self == WUCKSEL::ClockSpareWithOffset
80    }
81}
82///Field `WUCKSEL` writer - Wakeup clock selection
83pub type WUCKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, WUCKSEL>;
84impl<'a, REG> WUCKSEL_W<'a, REG>
85where
86    REG: crate::Writable + crate::RegisterSpec,
87    REG::Ux: From<u8>,
88{
89    ///RTC/16 clock is selected
90    #[inline(always)]
91    pub fn div16(self) -> &'a mut crate::W<REG> {
92        self.variant(WUCKSEL::Div16)
93    }
94    ///RTC/8 clock is selected
95    #[inline(always)]
96    pub fn div8(self) -> &'a mut crate::W<REG> {
97        self.variant(WUCKSEL::Div8)
98    }
99    ///RTC/4 clock is selected
100    #[inline(always)]
101    pub fn div4(self) -> &'a mut crate::W<REG> {
102        self.variant(WUCKSEL::Div4)
103    }
104    ///RTC/2 clock is selected
105    #[inline(always)]
106    pub fn div2(self) -> &'a mut crate::W<REG> {
107        self.variant(WUCKSEL::Div2)
108    }
109    ///ck_spre (usually 1 Hz) clock is selected
110    #[inline(always)]
111    pub fn clock_spare(self) -> &'a mut crate::W<REG> {
112        self.variant(WUCKSEL::ClockSpare)
113    }
114    ///ck_spre (usually 1 Hz) clock is selected and 2^16 is added to the WUT counter value
115    #[inline(always)]
116    pub fn clock_spare_with_offset(self) -> &'a mut crate::W<REG> {
117        self.variant(WUCKSEL::ClockSpareWithOffset)
118    }
119}
120/**Time-stamp event active edge
121
122Value on reset: 0*/
123#[cfg_attr(feature = "defmt", derive(defmt::Format))]
124#[derive(Clone, Copy, Debug, PartialEq, Eq)]
125pub enum TSEDGE {
126    ///0: RTC_TS input rising edge generates a time-stamp event
127    RisingEdge = 0,
128    ///1: RTC_TS input falling edge generates a time-stamp event
129    FallingEdge = 1,
130}
131impl From<TSEDGE> for bool {
132    #[inline(always)]
133    fn from(variant: TSEDGE) -> Self {
134        variant as u8 != 0
135    }
136}
137///Field `TSEDGE` reader - Time-stamp event active edge
138pub type TSEDGE_R = crate::BitReader<TSEDGE>;
139impl TSEDGE_R {
140    ///Get enumerated values variant
141    #[inline(always)]
142    pub const fn variant(&self) -> TSEDGE {
143        match self.bits {
144            false => TSEDGE::RisingEdge,
145            true => TSEDGE::FallingEdge,
146        }
147    }
148    ///RTC_TS input rising edge generates a time-stamp event
149    #[inline(always)]
150    pub fn is_rising_edge(&self) -> bool {
151        *self == TSEDGE::RisingEdge
152    }
153    ///RTC_TS input falling edge generates a time-stamp event
154    #[inline(always)]
155    pub fn is_falling_edge(&self) -> bool {
156        *self == TSEDGE::FallingEdge
157    }
158}
159///Field `TSEDGE` writer - Time-stamp event active edge
160pub type TSEDGE_W<'a, REG> = crate::BitWriter<'a, REG, TSEDGE>;
161impl<'a, REG> TSEDGE_W<'a, REG>
162where
163    REG: crate::Writable + crate::RegisterSpec,
164{
165    ///RTC_TS input rising edge generates a time-stamp event
166    #[inline(always)]
167    pub fn rising_edge(self) -> &'a mut crate::W<REG> {
168        self.variant(TSEDGE::RisingEdge)
169    }
170    ///RTC_TS input falling edge generates a time-stamp event
171    #[inline(always)]
172    pub fn falling_edge(self) -> &'a mut crate::W<REG> {
173        self.variant(TSEDGE::FallingEdge)
174    }
175}
176/**Reference clock detection enable (50 or 60 Hz)
177
178Value on reset: 0*/
179#[cfg_attr(feature = "defmt", derive(defmt::Format))]
180#[derive(Clone, Copy, Debug, PartialEq, Eq)]
181pub enum REFCKON {
182    ///0: RTC_REFIN detection disabled
183    Disabled = 0,
184    ///1: RTC_REFIN detection enabled
185    Enabled = 1,
186}
187impl From<REFCKON> for bool {
188    #[inline(always)]
189    fn from(variant: REFCKON) -> Self {
190        variant as u8 != 0
191    }
192}
193///Field `REFCKON` reader - Reference clock detection enable (50 or 60 Hz)
194pub type REFCKON_R = crate::BitReader<REFCKON>;
195impl REFCKON_R {
196    ///Get enumerated values variant
197    #[inline(always)]
198    pub const fn variant(&self) -> REFCKON {
199        match self.bits {
200            false => REFCKON::Disabled,
201            true => REFCKON::Enabled,
202        }
203    }
204    ///RTC_REFIN detection disabled
205    #[inline(always)]
206    pub fn is_disabled(&self) -> bool {
207        *self == REFCKON::Disabled
208    }
209    ///RTC_REFIN detection enabled
210    #[inline(always)]
211    pub fn is_enabled(&self) -> bool {
212        *self == REFCKON::Enabled
213    }
214}
215///Field `REFCKON` writer - Reference clock detection enable (50 or 60 Hz)
216pub type REFCKON_W<'a, REG> = crate::BitWriter<'a, REG, REFCKON>;
217impl<'a, REG> REFCKON_W<'a, REG>
218where
219    REG: crate::Writable + crate::RegisterSpec,
220{
221    ///RTC_REFIN detection disabled
222    #[inline(always)]
223    pub fn disabled(self) -> &'a mut crate::W<REG> {
224        self.variant(REFCKON::Disabled)
225    }
226    ///RTC_REFIN detection enabled
227    #[inline(always)]
228    pub fn enabled(self) -> &'a mut crate::W<REG> {
229        self.variant(REFCKON::Enabled)
230    }
231}
232/**Hour format
233
234Value on reset: 0*/
235#[cfg_attr(feature = "defmt", derive(defmt::Format))]
236#[derive(Clone, Copy, Debug, PartialEq, Eq)]
237pub enum FMT {
238    ///0: 24 hour/day format
239    TwentyFourHour = 0,
240    ///1: AM/PM hour format
241    AmPm = 1,
242}
243impl From<FMT> for bool {
244    #[inline(always)]
245    fn from(variant: FMT) -> Self {
246        variant as u8 != 0
247    }
248}
249///Field `FMT` reader - Hour format
250pub type FMT_R = crate::BitReader<FMT>;
251impl FMT_R {
252    ///Get enumerated values variant
253    #[inline(always)]
254    pub const fn variant(&self) -> FMT {
255        match self.bits {
256            false => FMT::TwentyFourHour,
257            true => FMT::AmPm,
258        }
259    }
260    ///24 hour/day format
261    #[inline(always)]
262    pub fn is_twenty_four_hour(&self) -> bool {
263        *self == FMT::TwentyFourHour
264    }
265    ///AM/PM hour format
266    #[inline(always)]
267    pub fn is_am_pm(&self) -> bool {
268        *self == FMT::AmPm
269    }
270}
271///Field `FMT` writer - Hour format
272pub type FMT_W<'a, REG> = crate::BitWriter<'a, REG, FMT>;
273impl<'a, REG> FMT_W<'a, REG>
274where
275    REG: crate::Writable + crate::RegisterSpec,
276{
277    ///24 hour/day format
278    #[inline(always)]
279    pub fn twenty_four_hour(self) -> &'a mut crate::W<REG> {
280        self.variant(FMT::TwentyFourHour)
281    }
282    ///AM/PM hour format
283    #[inline(always)]
284    pub fn am_pm(self) -> &'a mut crate::W<REG> {
285        self.variant(FMT::AmPm)
286    }
287}
288///Field `DCE` reader - Coarse digital calibration enable
289pub type DCE_R = crate::BitReader;
290///Field `DCE` writer - Coarse digital calibration enable
291pub type DCE_W<'a, REG> = crate::BitWriter<'a, REG>;
292/**Alarm %s enable
293
294Value on reset: 0*/
295#[cfg_attr(feature = "defmt", derive(defmt::Format))]
296#[derive(Clone, Copy, Debug, PartialEq, Eq)]
297pub enum ALRAE {
298    ///0: Alarm disabled
299    Disabled = 0,
300    ///1: Alarm enabled
301    Enabled = 1,
302}
303impl From<ALRAE> for bool {
304    #[inline(always)]
305    fn from(variant: ALRAE) -> Self {
306        variant as u8 != 0
307    }
308}
309///Field `ALRE(A,B)` reader - Alarm %s enable
310pub type ALRE_R = crate::BitReader<ALRAE>;
311impl ALRE_R {
312    ///Get enumerated values variant
313    #[inline(always)]
314    pub const fn variant(&self) -> ALRAE {
315        match self.bits {
316            false => ALRAE::Disabled,
317            true => ALRAE::Enabled,
318        }
319    }
320    ///Alarm disabled
321    #[inline(always)]
322    pub fn is_disabled(&self) -> bool {
323        *self == ALRAE::Disabled
324    }
325    ///Alarm enabled
326    #[inline(always)]
327    pub fn is_enabled(&self) -> bool {
328        *self == ALRAE::Enabled
329    }
330}
331///Field `ALRE(A,B)` writer - Alarm %s enable
332pub type ALRE_W<'a, REG> = crate::BitWriter<'a, REG, ALRAE>;
333impl<'a, REG> ALRE_W<'a, REG>
334where
335    REG: crate::Writable + crate::RegisterSpec,
336{
337    ///Alarm disabled
338    #[inline(always)]
339    pub fn disabled(self) -> &'a mut crate::W<REG> {
340        self.variant(ALRAE::Disabled)
341    }
342    ///Alarm enabled
343    #[inline(always)]
344    pub fn enabled(self) -> &'a mut crate::W<REG> {
345        self.variant(ALRAE::Enabled)
346    }
347}
348/**Wakeup timer enable
349
350Value on reset: 0*/
351#[cfg_attr(feature = "defmt", derive(defmt::Format))]
352#[derive(Clone, Copy, Debug, PartialEq, Eq)]
353pub enum WUTE {
354    ///0: Wakeup timer disabled
355    Disabled = 0,
356    ///1: Wakeup timer enabled
357    Enabled = 1,
358}
359impl From<WUTE> for bool {
360    #[inline(always)]
361    fn from(variant: WUTE) -> Self {
362        variant as u8 != 0
363    }
364}
365///Field `WUTE` reader - Wakeup timer enable
366pub type WUTE_R = crate::BitReader<WUTE>;
367impl WUTE_R {
368    ///Get enumerated values variant
369    #[inline(always)]
370    pub const fn variant(&self) -> WUTE {
371        match self.bits {
372            false => WUTE::Disabled,
373            true => WUTE::Enabled,
374        }
375    }
376    ///Wakeup timer disabled
377    #[inline(always)]
378    pub fn is_disabled(&self) -> bool {
379        *self == WUTE::Disabled
380    }
381    ///Wakeup timer enabled
382    #[inline(always)]
383    pub fn is_enabled(&self) -> bool {
384        *self == WUTE::Enabled
385    }
386}
387///Field `WUTE` writer - Wakeup timer enable
388pub type WUTE_W<'a, REG> = crate::BitWriter<'a, REG, WUTE>;
389impl<'a, REG> WUTE_W<'a, REG>
390where
391    REG: crate::Writable + crate::RegisterSpec,
392{
393    ///Wakeup timer disabled
394    #[inline(always)]
395    pub fn disabled(self) -> &'a mut crate::W<REG> {
396        self.variant(WUTE::Disabled)
397    }
398    ///Wakeup timer enabled
399    #[inline(always)]
400    pub fn enabled(self) -> &'a mut crate::W<REG> {
401        self.variant(WUTE::Enabled)
402    }
403}
404/**Time stamp enable
405
406Value on reset: 0*/
407#[cfg_attr(feature = "defmt", derive(defmt::Format))]
408#[derive(Clone, Copy, Debug, PartialEq, Eq)]
409pub enum TSE {
410    ///0: Timestamp disabled
411    Disabled = 0,
412    ///1: Timestamp enabled
413    Enabled = 1,
414}
415impl From<TSE> for bool {
416    #[inline(always)]
417    fn from(variant: TSE) -> Self {
418        variant as u8 != 0
419    }
420}
421///Field `TSE` reader - Time stamp enable
422pub type TSE_R = crate::BitReader<TSE>;
423impl TSE_R {
424    ///Get enumerated values variant
425    #[inline(always)]
426    pub const fn variant(&self) -> TSE {
427        match self.bits {
428            false => TSE::Disabled,
429            true => TSE::Enabled,
430        }
431    }
432    ///Timestamp disabled
433    #[inline(always)]
434    pub fn is_disabled(&self) -> bool {
435        *self == TSE::Disabled
436    }
437    ///Timestamp enabled
438    #[inline(always)]
439    pub fn is_enabled(&self) -> bool {
440        *self == TSE::Enabled
441    }
442}
443///Field `TSE` writer - Time stamp enable
444pub type TSE_W<'a, REG> = crate::BitWriter<'a, REG, TSE>;
445impl<'a, REG> TSE_W<'a, REG>
446where
447    REG: crate::Writable + crate::RegisterSpec,
448{
449    ///Timestamp disabled
450    #[inline(always)]
451    pub fn disabled(self) -> &'a mut crate::W<REG> {
452        self.variant(TSE::Disabled)
453    }
454    ///Timestamp enabled
455    #[inline(always)]
456    pub fn enabled(self) -> &'a mut crate::W<REG> {
457        self.variant(TSE::Enabled)
458    }
459}
460/**Alarm %s interrupt enable
461
462Value on reset: 0*/
463#[cfg_attr(feature = "defmt", derive(defmt::Format))]
464#[derive(Clone, Copy, Debug, PartialEq, Eq)]
465pub enum ALRAIE {
466    ///0: Alarm Interrupt disabled
467    Disabled = 0,
468    ///1: Alarm Interrupt enabled
469    Enabled = 1,
470}
471impl From<ALRAIE> for bool {
472    #[inline(always)]
473    fn from(variant: ALRAIE) -> Self {
474        variant as u8 != 0
475    }
476}
477///Field `ALRIE(A,B)` reader - Alarm %s interrupt enable
478pub type ALRIE_R = crate::BitReader<ALRAIE>;
479impl ALRIE_R {
480    ///Get enumerated values variant
481    #[inline(always)]
482    pub const fn variant(&self) -> ALRAIE {
483        match self.bits {
484            false => ALRAIE::Disabled,
485            true => ALRAIE::Enabled,
486        }
487    }
488    ///Alarm Interrupt disabled
489    #[inline(always)]
490    pub fn is_disabled(&self) -> bool {
491        *self == ALRAIE::Disabled
492    }
493    ///Alarm Interrupt enabled
494    #[inline(always)]
495    pub fn is_enabled(&self) -> bool {
496        *self == ALRAIE::Enabled
497    }
498}
499///Field `ALRIE(A,B)` writer - Alarm %s interrupt enable
500pub type ALRIE_W<'a, REG> = crate::BitWriter<'a, REG, ALRAIE>;
501impl<'a, REG> ALRIE_W<'a, REG>
502where
503    REG: crate::Writable + crate::RegisterSpec,
504{
505    ///Alarm Interrupt disabled
506    #[inline(always)]
507    pub fn disabled(self) -> &'a mut crate::W<REG> {
508        self.variant(ALRAIE::Disabled)
509    }
510    ///Alarm Interrupt enabled
511    #[inline(always)]
512    pub fn enabled(self) -> &'a mut crate::W<REG> {
513        self.variant(ALRAIE::Enabled)
514    }
515}
516/**Wakeup timer interrupt enable
517
518Value on reset: 0*/
519#[cfg_attr(feature = "defmt", derive(defmt::Format))]
520#[derive(Clone, Copy, Debug, PartialEq, Eq)]
521pub enum WUTIE {
522    ///0: Wakeup timer interrupt disabled
523    Disabled = 0,
524    ///1: Wakeup timer interrupt enabled
525    Enabled = 1,
526}
527impl From<WUTIE> for bool {
528    #[inline(always)]
529    fn from(variant: WUTIE) -> Self {
530        variant as u8 != 0
531    }
532}
533///Field `WUTIE` reader - Wakeup timer interrupt enable
534pub type WUTIE_R = crate::BitReader<WUTIE>;
535impl WUTIE_R {
536    ///Get enumerated values variant
537    #[inline(always)]
538    pub const fn variant(&self) -> WUTIE {
539        match self.bits {
540            false => WUTIE::Disabled,
541            true => WUTIE::Enabled,
542        }
543    }
544    ///Wakeup timer interrupt disabled
545    #[inline(always)]
546    pub fn is_disabled(&self) -> bool {
547        *self == WUTIE::Disabled
548    }
549    ///Wakeup timer interrupt enabled
550    #[inline(always)]
551    pub fn is_enabled(&self) -> bool {
552        *self == WUTIE::Enabled
553    }
554}
555///Field `WUTIE` writer - Wakeup timer interrupt enable
556pub type WUTIE_W<'a, REG> = crate::BitWriter<'a, REG, WUTIE>;
557impl<'a, REG> WUTIE_W<'a, REG>
558where
559    REG: crate::Writable + crate::RegisterSpec,
560{
561    ///Wakeup timer interrupt disabled
562    #[inline(always)]
563    pub fn disabled(self) -> &'a mut crate::W<REG> {
564        self.variant(WUTIE::Disabled)
565    }
566    ///Wakeup timer interrupt enabled
567    #[inline(always)]
568    pub fn enabled(self) -> &'a mut crate::W<REG> {
569        self.variant(WUTIE::Enabled)
570    }
571}
572/**Time-stamp interrupt enable
573
574Value on reset: 0*/
575#[cfg_attr(feature = "defmt", derive(defmt::Format))]
576#[derive(Clone, Copy, Debug, PartialEq, Eq)]
577pub enum TSIE {
578    ///0: Time-stamp Interrupt disabled
579    Disabled = 0,
580    ///1: Time-stamp Interrupt enabled
581    Enabled = 1,
582}
583impl From<TSIE> for bool {
584    #[inline(always)]
585    fn from(variant: TSIE) -> Self {
586        variant as u8 != 0
587    }
588}
589///Field `TSIE` reader - Time-stamp interrupt enable
590pub type TSIE_R = crate::BitReader<TSIE>;
591impl TSIE_R {
592    ///Get enumerated values variant
593    #[inline(always)]
594    pub const fn variant(&self) -> TSIE {
595        match self.bits {
596            false => TSIE::Disabled,
597            true => TSIE::Enabled,
598        }
599    }
600    ///Time-stamp Interrupt disabled
601    #[inline(always)]
602    pub fn is_disabled(&self) -> bool {
603        *self == TSIE::Disabled
604    }
605    ///Time-stamp Interrupt enabled
606    #[inline(always)]
607    pub fn is_enabled(&self) -> bool {
608        *self == TSIE::Enabled
609    }
610}
611///Field `TSIE` writer - Time-stamp interrupt enable
612pub type TSIE_W<'a, REG> = crate::BitWriter<'a, REG, TSIE>;
613impl<'a, REG> TSIE_W<'a, REG>
614where
615    REG: crate::Writable + crate::RegisterSpec,
616{
617    ///Time-stamp Interrupt disabled
618    #[inline(always)]
619    pub fn disabled(self) -> &'a mut crate::W<REG> {
620        self.variant(TSIE::Disabled)
621    }
622    ///Time-stamp Interrupt enabled
623    #[inline(always)]
624    pub fn enabled(self) -> &'a mut crate::W<REG> {
625        self.variant(TSIE::Enabled)
626    }
627}
628/**Add 1 hour (summer time change)
629
630Value on reset: 0*/
631#[cfg_attr(feature = "defmt", derive(defmt::Format))]
632#[derive(Clone, Copy, Debug, PartialEq, Eq)]
633pub enum ADD1HW {
634    ///1: Adds 1 hour to the current time. This can be used for summer time change outside initialization mode
635    Add1 = 1,
636}
637impl From<ADD1HW> for bool {
638    #[inline(always)]
639    fn from(variant: ADD1HW) -> Self {
640        variant as u8 != 0
641    }
642}
643///Field `ADD1H` reader - Add 1 hour (summer time change)
644pub type ADD1H_R = crate::BitReader<ADD1HW>;
645impl ADD1H_R {
646    ///Get enumerated values variant
647    #[inline(always)]
648    pub const fn variant(&self) -> Option<ADD1HW> {
649        match self.bits {
650            true => Some(ADD1HW::Add1),
651            _ => None,
652        }
653    }
654    ///Adds 1 hour to the current time. This can be used for summer time change outside initialization mode
655    #[inline(always)]
656    pub fn is_add1(&self) -> bool {
657        *self == ADD1HW::Add1
658    }
659}
660///Field `ADD1H` writer - Add 1 hour (summer time change)
661pub type ADD1H_W<'a, REG> = crate::BitWriter<'a, REG, ADD1HW>;
662impl<'a, REG> ADD1H_W<'a, REG>
663where
664    REG: crate::Writable + crate::RegisterSpec,
665{
666    ///Adds 1 hour to the current time. This can be used for summer time change outside initialization mode
667    #[inline(always)]
668    pub fn add1(self) -> &'a mut crate::W<REG> {
669        self.variant(ADD1HW::Add1)
670    }
671}
672/**Subtract 1 hour (winter time change)
673
674Value on reset: 0*/
675#[cfg_attr(feature = "defmt", derive(defmt::Format))]
676#[derive(Clone, Copy, Debug, PartialEq, Eq)]
677pub enum SUB1HW {
678    ///1: Subtracts 1 hour to the current time. This can be used for winter time change outside initialization mode
679    Sub1 = 1,
680}
681impl From<SUB1HW> for bool {
682    #[inline(always)]
683    fn from(variant: SUB1HW) -> Self {
684        variant as u8 != 0
685    }
686}
687///Field `SUB1H` reader - Subtract 1 hour (winter time change)
688pub type SUB1H_R = crate::BitReader<SUB1HW>;
689impl SUB1H_R {
690    ///Get enumerated values variant
691    #[inline(always)]
692    pub const fn variant(&self) -> Option<SUB1HW> {
693        match self.bits {
694            true => Some(SUB1HW::Sub1),
695            _ => None,
696        }
697    }
698    ///Subtracts 1 hour to the current time. This can be used for winter time change outside initialization mode
699    #[inline(always)]
700    pub fn is_sub1(&self) -> bool {
701        *self == SUB1HW::Sub1
702    }
703}
704///Field `SUB1H` writer - Subtract 1 hour (winter time change)
705pub type SUB1H_W<'a, REG> = crate::BitWriter<'a, REG, SUB1HW>;
706impl<'a, REG> SUB1H_W<'a, REG>
707where
708    REG: crate::Writable + crate::RegisterSpec,
709{
710    ///Subtracts 1 hour to the current time. This can be used for winter time change outside initialization mode
711    #[inline(always)]
712    pub fn sub1(self) -> &'a mut crate::W<REG> {
713        self.variant(SUB1HW::Sub1)
714    }
715}
716/**Backup
717
718Value on reset: 0*/
719#[cfg_attr(feature = "defmt", derive(defmt::Format))]
720#[derive(Clone, Copy, Debug, PartialEq, Eq)]
721pub enum BKP {
722    ///0: Daylight Saving Time change has not been performed
723    DstNotChanged = 0,
724    ///1: Daylight Saving Time change has been performed
725    DstChanged = 1,
726}
727impl From<BKP> for bool {
728    #[inline(always)]
729    fn from(variant: BKP) -> Self {
730        variant as u8 != 0
731    }
732}
733///Field `BKP` reader - Backup
734pub type BKP_R = crate::BitReader<BKP>;
735impl BKP_R {
736    ///Get enumerated values variant
737    #[inline(always)]
738    pub const fn variant(&self) -> BKP {
739        match self.bits {
740            false => BKP::DstNotChanged,
741            true => BKP::DstChanged,
742        }
743    }
744    ///Daylight Saving Time change has not been performed
745    #[inline(always)]
746    pub fn is_dst_not_changed(&self) -> bool {
747        *self == BKP::DstNotChanged
748    }
749    ///Daylight Saving Time change has been performed
750    #[inline(always)]
751    pub fn is_dst_changed(&self) -> bool {
752        *self == BKP::DstChanged
753    }
754}
755///Field `BKP` writer - Backup
756pub type BKP_W<'a, REG> = crate::BitWriter<'a, REG, BKP>;
757impl<'a, REG> BKP_W<'a, REG>
758where
759    REG: crate::Writable + crate::RegisterSpec,
760{
761    ///Daylight Saving Time change has not been performed
762    #[inline(always)]
763    pub fn dst_not_changed(self) -> &'a mut crate::W<REG> {
764        self.variant(BKP::DstNotChanged)
765    }
766    ///Daylight Saving Time change has been performed
767    #[inline(always)]
768    pub fn dst_changed(self) -> &'a mut crate::W<REG> {
769        self.variant(BKP::DstChanged)
770    }
771}
772/**Output polarity
773
774Value on reset: 0*/
775#[cfg_attr(feature = "defmt", derive(defmt::Format))]
776#[derive(Clone, Copy, Debug, PartialEq, Eq)]
777pub enum POL {
778    ///0: The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\[1:0\])
779    High = 0,
780    ///1: The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\[1:0\])
781    Low = 1,
782}
783impl From<POL> for bool {
784    #[inline(always)]
785    fn from(variant: POL) -> Self {
786        variant as u8 != 0
787    }
788}
789///Field `POL` reader - Output polarity
790pub type POL_R = crate::BitReader<POL>;
791impl POL_R {
792    ///Get enumerated values variant
793    #[inline(always)]
794    pub const fn variant(&self) -> POL {
795        match self.bits {
796            false => POL::High,
797            true => POL::Low,
798        }
799    }
800    ///The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\[1:0\])
801    #[inline(always)]
802    pub fn is_high(&self) -> bool {
803        *self == POL::High
804    }
805    ///The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\[1:0\])
806    #[inline(always)]
807    pub fn is_low(&self) -> bool {
808        *self == POL::Low
809    }
810}
811///Field `POL` writer - Output polarity
812pub type POL_W<'a, REG> = crate::BitWriter<'a, REG, POL>;
813impl<'a, REG> POL_W<'a, REG>
814where
815    REG: crate::Writable + crate::RegisterSpec,
816{
817    ///The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\[1:0\])
818    #[inline(always)]
819    pub fn high(self) -> &'a mut crate::W<REG> {
820        self.variant(POL::High)
821    }
822    ///The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\[1:0\])
823    #[inline(always)]
824    pub fn low(self) -> &'a mut crate::W<REG> {
825        self.variant(POL::Low)
826    }
827}
828/**Output selection
829
830Value on reset: 0*/
831#[cfg_attr(feature = "defmt", derive(defmt::Format))]
832#[derive(Clone, Copy, Debug, PartialEq, Eq)]
833#[repr(u8)]
834pub enum OSEL {
835    ///0: Output disabled
836    Disabled = 0,
837    ///1: Alarm A output enabled
838    AlarmA = 1,
839    ///2: Alarm B output enabled
840    AlarmB = 2,
841    ///3: Wakeup output enabled
842    Wakeup = 3,
843}
844impl From<OSEL> for u8 {
845    #[inline(always)]
846    fn from(variant: OSEL) -> Self {
847        variant as _
848    }
849}
850impl crate::FieldSpec for OSEL {
851    type Ux = u8;
852}
853impl crate::IsEnum for OSEL {}
854///Field `OSEL` reader - Output selection
855pub type OSEL_R = crate::FieldReader<OSEL>;
856impl OSEL_R {
857    ///Get enumerated values variant
858    #[inline(always)]
859    pub const fn variant(&self) -> OSEL {
860        match self.bits {
861            0 => OSEL::Disabled,
862            1 => OSEL::AlarmA,
863            2 => OSEL::AlarmB,
864            3 => OSEL::Wakeup,
865            _ => unreachable!(),
866        }
867    }
868    ///Output disabled
869    #[inline(always)]
870    pub fn is_disabled(&self) -> bool {
871        *self == OSEL::Disabled
872    }
873    ///Alarm A output enabled
874    #[inline(always)]
875    pub fn is_alarm_a(&self) -> bool {
876        *self == OSEL::AlarmA
877    }
878    ///Alarm B output enabled
879    #[inline(always)]
880    pub fn is_alarm_b(&self) -> bool {
881        *self == OSEL::AlarmB
882    }
883    ///Wakeup output enabled
884    #[inline(always)]
885    pub fn is_wakeup(&self) -> bool {
886        *self == OSEL::Wakeup
887    }
888}
889///Field `OSEL` writer - Output selection
890pub type OSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, OSEL, crate::Safe>;
891impl<'a, REG> OSEL_W<'a, REG>
892where
893    REG: crate::Writable + crate::RegisterSpec,
894    REG::Ux: From<u8>,
895{
896    ///Output disabled
897    #[inline(always)]
898    pub fn disabled(self) -> &'a mut crate::W<REG> {
899        self.variant(OSEL::Disabled)
900    }
901    ///Alarm A output enabled
902    #[inline(always)]
903    pub fn alarm_a(self) -> &'a mut crate::W<REG> {
904        self.variant(OSEL::AlarmA)
905    }
906    ///Alarm B output enabled
907    #[inline(always)]
908    pub fn alarm_b(self) -> &'a mut crate::W<REG> {
909        self.variant(OSEL::AlarmB)
910    }
911    ///Wakeup output enabled
912    #[inline(always)]
913    pub fn wakeup(self) -> &'a mut crate::W<REG> {
914        self.variant(OSEL::Wakeup)
915    }
916}
917/**Calibration output enable
918
919Value on reset: 0*/
920#[cfg_attr(feature = "defmt", derive(defmt::Format))]
921#[derive(Clone, Copy, Debug, PartialEq, Eq)]
922pub enum COE {
923    ///0: Calibration output disabled
924    Disabled = 0,
925    ///1: Calibration output enabled
926    Enabled = 1,
927}
928impl From<COE> for bool {
929    #[inline(always)]
930    fn from(variant: COE) -> Self {
931        variant as u8 != 0
932    }
933}
934///Field `COE` reader - Calibration output enable
935pub type COE_R = crate::BitReader<COE>;
936impl COE_R {
937    ///Get enumerated values variant
938    #[inline(always)]
939    pub const fn variant(&self) -> COE {
940        match self.bits {
941            false => COE::Disabled,
942            true => COE::Enabled,
943        }
944    }
945    ///Calibration output disabled
946    #[inline(always)]
947    pub fn is_disabled(&self) -> bool {
948        *self == COE::Disabled
949    }
950    ///Calibration output enabled
951    #[inline(always)]
952    pub fn is_enabled(&self) -> bool {
953        *self == COE::Enabled
954    }
955}
956///Field `COE` writer - Calibration output enable
957pub type COE_W<'a, REG> = crate::BitWriter<'a, REG, COE>;
958impl<'a, REG> COE_W<'a, REG>
959where
960    REG: crate::Writable + crate::RegisterSpec,
961{
962    ///Calibration output disabled
963    #[inline(always)]
964    pub fn disabled(self) -> &'a mut crate::W<REG> {
965        self.variant(COE::Disabled)
966    }
967    ///Calibration output enabled
968    #[inline(always)]
969    pub fn enabled(self) -> &'a mut crate::W<REG> {
970        self.variant(COE::Enabled)
971    }
972}
973impl R {
974    ///Bits 0:2 - Wakeup clock selection
975    #[inline(always)]
976    pub fn wucksel(&self) -> WUCKSEL_R {
977        WUCKSEL_R::new((self.bits & 7) as u8)
978    }
979    ///Bit 3 - Time-stamp event active edge
980    #[inline(always)]
981    pub fn tsedge(&self) -> TSEDGE_R {
982        TSEDGE_R::new(((self.bits >> 3) & 1) != 0)
983    }
984    ///Bit 4 - Reference clock detection enable (50 or 60 Hz)
985    #[inline(always)]
986    pub fn refckon(&self) -> REFCKON_R {
987        REFCKON_R::new(((self.bits >> 4) & 1) != 0)
988    }
989    ///Bit 6 - Hour format
990    #[inline(always)]
991    pub fn fmt(&self) -> FMT_R {
992        FMT_R::new(((self.bits >> 6) & 1) != 0)
993    }
994    ///Bit 7 - Coarse digital calibration enable
995    #[inline(always)]
996    pub fn dce(&self) -> DCE_R {
997        DCE_R::new(((self.bits >> 7) & 1) != 0)
998    }
999    ///Alarm (A,B) enable
1000    ///
1001    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAE` field.</div>
1002    #[inline(always)]
1003    pub fn alre(&self, n: u8) -> ALRE_R {
1004        #[allow(clippy::no_effect)]
1005        [(); 2][n as usize];
1006        ALRE_R::new(((self.bits >> (n + 8)) & 1) != 0)
1007    }
1008    ///Iterator for array of:
1009    ///Alarm (A,B) enable
1010    #[inline(always)]
1011    pub fn alre_iter(&self) -> impl Iterator<Item = ALRE_R> + '_ {
1012        (0..2).map(move |n| ALRE_R::new(((self.bits >> (n + 8)) & 1) != 0))
1013    }
1014    ///Bit 8 - Alarm A enable
1015    #[inline(always)]
1016    pub fn alrae(&self) -> ALRE_R {
1017        ALRE_R::new(((self.bits >> 8) & 1) != 0)
1018    }
1019    ///Bit 9 - Alarm B enable
1020    #[inline(always)]
1021    pub fn alrbe(&self) -> ALRE_R {
1022        ALRE_R::new(((self.bits >> 9) & 1) != 0)
1023    }
1024    ///Bit 10 - Wakeup timer enable
1025    #[inline(always)]
1026    pub fn wute(&self) -> WUTE_R {
1027        WUTE_R::new(((self.bits >> 10) & 1) != 0)
1028    }
1029    ///Bit 11 - Time stamp enable
1030    #[inline(always)]
1031    pub fn tse(&self) -> TSE_R {
1032        TSE_R::new(((self.bits >> 11) & 1) != 0)
1033    }
1034    ///Alarm (A,B) interrupt enable
1035    ///
1036    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAIE` field.</div>
1037    #[inline(always)]
1038    pub fn alrie(&self, n: u8) -> ALRIE_R {
1039        #[allow(clippy::no_effect)]
1040        [(); 2][n as usize];
1041        ALRIE_R::new(((self.bits >> (n + 12)) & 1) != 0)
1042    }
1043    ///Iterator for array of:
1044    ///Alarm (A,B) interrupt enable
1045    #[inline(always)]
1046    pub fn alrie_iter(&self) -> impl Iterator<Item = ALRIE_R> + '_ {
1047        (0..2).map(move |n| ALRIE_R::new(((self.bits >> (n + 12)) & 1) != 0))
1048    }
1049    ///Bit 12 - Alarm A interrupt enable
1050    #[inline(always)]
1051    pub fn alraie(&self) -> ALRIE_R {
1052        ALRIE_R::new(((self.bits >> 12) & 1) != 0)
1053    }
1054    ///Bit 13 - Alarm B interrupt enable
1055    #[inline(always)]
1056    pub fn alrbie(&self) -> ALRIE_R {
1057        ALRIE_R::new(((self.bits >> 13) & 1) != 0)
1058    }
1059    ///Bit 14 - Wakeup timer interrupt enable
1060    #[inline(always)]
1061    pub fn wutie(&self) -> WUTIE_R {
1062        WUTIE_R::new(((self.bits >> 14) & 1) != 0)
1063    }
1064    ///Bit 15 - Time-stamp interrupt enable
1065    #[inline(always)]
1066    pub fn tsie(&self) -> TSIE_R {
1067        TSIE_R::new(((self.bits >> 15) & 1) != 0)
1068    }
1069    ///Bit 16 - Add 1 hour (summer time change)
1070    #[inline(always)]
1071    pub fn add1h(&self) -> ADD1H_R {
1072        ADD1H_R::new(((self.bits >> 16) & 1) != 0)
1073    }
1074    ///Bit 17 - Subtract 1 hour (winter time change)
1075    #[inline(always)]
1076    pub fn sub1h(&self) -> SUB1H_R {
1077        SUB1H_R::new(((self.bits >> 17) & 1) != 0)
1078    }
1079    ///Bit 18 - Backup
1080    #[inline(always)]
1081    pub fn bkp(&self) -> BKP_R {
1082        BKP_R::new(((self.bits >> 18) & 1) != 0)
1083    }
1084    ///Bit 20 - Output polarity
1085    #[inline(always)]
1086    pub fn pol(&self) -> POL_R {
1087        POL_R::new(((self.bits >> 20) & 1) != 0)
1088    }
1089    ///Bits 21:22 - Output selection
1090    #[inline(always)]
1091    pub fn osel(&self) -> OSEL_R {
1092        OSEL_R::new(((self.bits >> 21) & 3) as u8)
1093    }
1094    ///Bit 23 - Calibration output enable
1095    #[inline(always)]
1096    pub fn coe(&self) -> COE_R {
1097        COE_R::new(((self.bits >> 23) & 1) != 0)
1098    }
1099}
1100impl core::fmt::Debug for R {
1101    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1102        f.debug_struct("CR")
1103            .field("coe", &self.coe())
1104            .field("osel", &self.osel())
1105            .field("pol", &self.pol())
1106            .field("bkp", &self.bkp())
1107            .field("sub1h", &self.sub1h())
1108            .field("add1h", &self.add1h())
1109            .field("tsie", &self.tsie())
1110            .field("wutie", &self.wutie())
1111            .field("alraie", &self.alraie())
1112            .field("alrbie", &self.alrbie())
1113            .field("tse", &self.tse())
1114            .field("wute", &self.wute())
1115            .field("alrae", &self.alrae())
1116            .field("alrbe", &self.alrbe())
1117            .field("dce", &self.dce())
1118            .field("fmt", &self.fmt())
1119            .field("refckon", &self.refckon())
1120            .field("tsedge", &self.tsedge())
1121            .field("wucksel", &self.wucksel())
1122            .finish()
1123    }
1124}
1125impl W {
1126    ///Bits 0:2 - Wakeup clock selection
1127    #[inline(always)]
1128    pub fn wucksel(&mut self) -> WUCKSEL_W<CRrs> {
1129        WUCKSEL_W::new(self, 0)
1130    }
1131    ///Bit 3 - Time-stamp event active edge
1132    #[inline(always)]
1133    pub fn tsedge(&mut self) -> TSEDGE_W<CRrs> {
1134        TSEDGE_W::new(self, 3)
1135    }
1136    ///Bit 4 - Reference clock detection enable (50 or 60 Hz)
1137    #[inline(always)]
1138    pub fn refckon(&mut self) -> REFCKON_W<CRrs> {
1139        REFCKON_W::new(self, 4)
1140    }
1141    ///Bit 6 - Hour format
1142    #[inline(always)]
1143    pub fn fmt(&mut self) -> FMT_W<CRrs> {
1144        FMT_W::new(self, 6)
1145    }
1146    ///Bit 7 - Coarse digital calibration enable
1147    #[inline(always)]
1148    pub fn dce(&mut self) -> DCE_W<CRrs> {
1149        DCE_W::new(self, 7)
1150    }
1151    ///Alarm (A,B) enable
1152    ///
1153    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAE` field.</div>
1154    #[inline(always)]
1155    pub fn alre(&mut self, n: u8) -> ALRE_W<CRrs> {
1156        #[allow(clippy::no_effect)]
1157        [(); 2][n as usize];
1158        ALRE_W::new(self, n + 8)
1159    }
1160    ///Bit 8 - Alarm A enable
1161    #[inline(always)]
1162    pub fn alrae(&mut self) -> ALRE_W<CRrs> {
1163        ALRE_W::new(self, 8)
1164    }
1165    ///Bit 9 - Alarm B enable
1166    #[inline(always)]
1167    pub fn alrbe(&mut self) -> ALRE_W<CRrs> {
1168        ALRE_W::new(self, 9)
1169    }
1170    ///Bit 10 - Wakeup timer enable
1171    #[inline(always)]
1172    pub fn wute(&mut self) -> WUTE_W<CRrs> {
1173        WUTE_W::new(self, 10)
1174    }
1175    ///Bit 11 - Time stamp enable
1176    #[inline(always)]
1177    pub fn tse(&mut self) -> TSE_W<CRrs> {
1178        TSE_W::new(self, 11)
1179    }
1180    ///Alarm (A,B) interrupt enable
1181    ///
1182    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAIE` field.</div>
1183    #[inline(always)]
1184    pub fn alrie(&mut self, n: u8) -> ALRIE_W<CRrs> {
1185        #[allow(clippy::no_effect)]
1186        [(); 2][n as usize];
1187        ALRIE_W::new(self, n + 12)
1188    }
1189    ///Bit 12 - Alarm A interrupt enable
1190    #[inline(always)]
1191    pub fn alraie(&mut self) -> ALRIE_W<CRrs> {
1192        ALRIE_W::new(self, 12)
1193    }
1194    ///Bit 13 - Alarm B interrupt enable
1195    #[inline(always)]
1196    pub fn alrbie(&mut self) -> ALRIE_W<CRrs> {
1197        ALRIE_W::new(self, 13)
1198    }
1199    ///Bit 14 - Wakeup timer interrupt enable
1200    #[inline(always)]
1201    pub fn wutie(&mut self) -> WUTIE_W<CRrs> {
1202        WUTIE_W::new(self, 14)
1203    }
1204    ///Bit 15 - Time-stamp interrupt enable
1205    #[inline(always)]
1206    pub fn tsie(&mut self) -> TSIE_W<CRrs> {
1207        TSIE_W::new(self, 15)
1208    }
1209    ///Bit 16 - Add 1 hour (summer time change)
1210    #[inline(always)]
1211    pub fn add1h(&mut self) -> ADD1H_W<CRrs> {
1212        ADD1H_W::new(self, 16)
1213    }
1214    ///Bit 17 - Subtract 1 hour (winter time change)
1215    #[inline(always)]
1216    pub fn sub1h(&mut self) -> SUB1H_W<CRrs> {
1217        SUB1H_W::new(self, 17)
1218    }
1219    ///Bit 18 - Backup
1220    #[inline(always)]
1221    pub fn bkp(&mut self) -> BKP_W<CRrs> {
1222        BKP_W::new(self, 18)
1223    }
1224    ///Bit 20 - Output polarity
1225    #[inline(always)]
1226    pub fn pol(&mut self) -> POL_W<CRrs> {
1227        POL_W::new(self, 20)
1228    }
1229    ///Bits 21:22 - Output selection
1230    #[inline(always)]
1231    pub fn osel(&mut self) -> OSEL_W<CRrs> {
1232        OSEL_W::new(self, 21)
1233    }
1234    ///Bit 23 - Calibration output enable
1235    #[inline(always)]
1236    pub fn coe(&mut self) -> COE_W<CRrs> {
1237        COE_W::new(self, 23)
1238    }
1239}
1240/**control register
1241
1242You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
1243
1244See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F217.html#RTC:CR)*/
1245pub struct CRrs;
1246impl crate::RegisterSpec for CRrs {
1247    type Ux = u32;
1248}
1249///`read()` method returns [`cr::R`](R) reader structure
1250impl crate::Readable for CRrs {}
1251///`write(|w| ..)` method takes [`cr::W`](W) writer structure
1252impl crate::Writable for CRrs {
1253    type Safety = crate::Unsafe;
1254}
1255///`reset()` method sets CR to value 0
1256impl crate::Resettable for CRrs {}
stm32f2/stm32f217/rtc/cr.rs

stm32f2/stm32f217/rtc/
cr.rs
