stm32f2/stm32f215/
rtc.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    tr: TR,
6    dr: DR,
7    cr: CR,
8    isr: ISR,
9    prer: PRER,
10    wutr: WUTR,
11    calibr: CALIBR,
12    alrmr: [ALRMR; 2],
13    wpr: WPR,
14    _reserved9: [u8; 0x08],
15    tstr: TSTR,
16    tsdr: TSDR,
17    _reserved11: [u8; 0x08],
18    tafcr: TAFCR,
19    _reserved12: [u8; 0x0c],
20    bkpr: [BKPR; 20],
21}
22impl RegisterBlock {
23    ///0x00 - time register
24    #[inline(always)]
25    pub const fn tr(&self) -> &TR {
26        &self.tr
27    }
28    ///0x04 - date register
29    #[inline(always)]
30    pub const fn dr(&self) -> &DR {
31        &self.dr
32    }
33    ///0x08 - control register
34    #[inline(always)]
35    pub const fn cr(&self) -> &CR {
36        &self.cr
37    }
38    ///0x0c - initialization and status register
39    #[inline(always)]
40    pub const fn isr(&self) -> &ISR {
41        &self.isr
42    }
43    ///0x10 - prescaler register
44    #[inline(always)]
45    pub const fn prer(&self) -> &PRER {
46        &self.prer
47    }
48    ///0x14 - wakeup timer register
49    #[inline(always)]
50    pub const fn wutr(&self) -> &WUTR {
51        &self.wutr
52    }
53    ///0x18 - calibration register
54    #[inline(always)]
55    pub const fn calibr(&self) -> &CALIBR {
56        &self.calibr
57    }
58    ///0x1c..0x24 - Alarm %s register
59    ///
60    ///<div class="warning">`n` is the index of register in the array. `n == 0` corresponds to `ALRMAR` register.</div>
61    #[inline(always)]
62    pub const fn alrmr(&self, n: usize) -> &ALRMR {
63        &self.alrmr[n]
64    }
65    ///Iterator for array of:
66    ///0x1c..0x24 - Alarm %s register
67    #[inline(always)]
68    pub fn alrmr_iter(&self) -> impl Iterator<Item = &ALRMR> {
69        self.alrmr.iter()
70    }
71    ///0x1c - Alarm A register
72    #[inline(always)]
73    pub const fn alrmar(&self) -> &ALRMR {
74        self.alrmr(0)
75    }
76    ///0x20 - Alarm B register
77    #[inline(always)]
78    pub const fn alrmbr(&self) -> &ALRMR {
79        self.alrmr(1)
80    }
81    ///0x24 - write protection register
82    #[inline(always)]
83    pub const fn wpr(&self) -> &WPR {
84        &self.wpr
85    }
86    ///0x30 - time stamp time register
87    #[inline(always)]
88    pub const fn tstr(&self) -> &TSTR {
89        &self.tstr
90    }
91    ///0x34 - time stamp date register
92    #[inline(always)]
93    pub const fn tsdr(&self) -> &TSDR {
94        &self.tsdr
95    }
96    ///0x40 - tamper and alternate function configuration register
97    #[inline(always)]
98    pub const fn tafcr(&self) -> &TAFCR {
99        &self.tafcr
100    }
101    ///0x50..0xa0 - backup register
102    #[inline(always)]
103    pub const fn bkpr(&self, n: usize) -> &BKPR {
104        &self.bkpr[n]
105    }
106    ///Iterator for array of:
107    ///0x50..0xa0 - backup register
108    #[inline(always)]
109    pub fn bkpr_iter(&self) -> impl Iterator<Item = &BKPR> {
110        self.bkpr.iter()
111    }
112    ///0x50 - backup register
113    #[inline(always)]
114    pub const fn bkp0r(&self) -> &BKPR {
115        self.bkpr(0)
116    }
117    ///0x54 - backup register
118    #[inline(always)]
119    pub const fn bkp1r(&self) -> &BKPR {
120        self.bkpr(1)
121    }
122    ///0x58 - backup register
123    #[inline(always)]
124    pub const fn bkp2r(&self) -> &BKPR {
125        self.bkpr(2)
126    }
127    ///0x5c - backup register
128    #[inline(always)]
129    pub const fn bkp3r(&self) -> &BKPR {
130        self.bkpr(3)
131    }
132    ///0x60 - backup register
133    #[inline(always)]
134    pub const fn bkp4r(&self) -> &BKPR {
135        self.bkpr(4)
136    }
137    ///0x64 - backup register
138    #[inline(always)]
139    pub const fn bkp5r(&self) -> &BKPR {
140        self.bkpr(5)
141    }
142    ///0x68 - backup register
143    #[inline(always)]
144    pub const fn bkp6r(&self) -> &BKPR {
145        self.bkpr(6)
146    }
147    ///0x6c - backup register
148    #[inline(always)]
149    pub const fn bkp7r(&self) -> &BKPR {
150        self.bkpr(7)
151    }
152    ///0x70 - backup register
153    #[inline(always)]
154    pub const fn bkp8r(&self) -> &BKPR {
155        self.bkpr(8)
156    }
157    ///0x74 - backup register
158    #[inline(always)]
159    pub const fn bkp9r(&self) -> &BKPR {
160        self.bkpr(9)
161    }
162    ///0x78 - backup register
163    #[inline(always)]
164    pub const fn bkp10r(&self) -> &BKPR {
165        self.bkpr(10)
166    }
167    ///0x7c - backup register
168    #[inline(always)]
169    pub const fn bkp11r(&self) -> &BKPR {
170        self.bkpr(11)
171    }
172    ///0x80 - backup register
173    #[inline(always)]
174    pub const fn bkp12r(&self) -> &BKPR {
175        self.bkpr(12)
176    }
177    ///0x84 - backup register
178    #[inline(always)]
179    pub const fn bkp13r(&self) -> &BKPR {
180        self.bkpr(13)
181    }
182    ///0x88 - backup register
183    #[inline(always)]
184    pub const fn bkp14r(&self) -> &BKPR {
185        self.bkpr(14)
186    }
187    ///0x8c - backup register
188    #[inline(always)]
189    pub const fn bkp15r(&self) -> &BKPR {
190        self.bkpr(15)
191    }
192    ///0x90 - backup register
193    #[inline(always)]
194    pub const fn bkp16r(&self) -> &BKPR {
195        self.bkpr(16)
196    }
197    ///0x94 - backup register
198    #[inline(always)]
199    pub const fn bkp17r(&self) -> &BKPR {
200        self.bkpr(17)
201    }
202    ///0x98 - backup register
203    #[inline(always)]
204    pub const fn bkp18r(&self) -> &BKPR {
205        self.bkpr(18)
206    }
207    ///0x9c - backup register
208    #[inline(always)]
209    pub const fn bkp19r(&self) -> &BKPR {
210        self.bkpr(19)
211    }
212}
213/**TR (rw) register accessor: time register
214
215You can [`read`](crate::Reg::read) this register and get [`tr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
216
217See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:TR)
218
219For information about available fields see [`mod@tr`] module*/
220pub type TR = crate::Reg<tr::TRrs>;
221///time register
222pub mod tr;
223/**DR (rw) register accessor: date register
224
225You can [`read`](crate::Reg::read) this register and get [`dr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
226
227See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:DR)
228
229For information about available fields see [`mod@dr`] module*/
230pub type DR = crate::Reg<dr::DRrs>;
231///date register
232pub mod dr;
233/**CR (rw) register accessor: control register
234
235You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
236
237See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:CR)
238
239For information about available fields see [`mod@cr`] module*/
240pub type CR = crate::Reg<cr::CRrs>;
241///control register
242pub mod cr;
243/**ISR (rw) register accessor: initialization and status register
244
245You can [`read`](crate::Reg::read) this register and get [`isr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`isr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
246
247See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:ISR)
248
249For information about available fields see [`mod@isr`] module*/
250pub type ISR = crate::Reg<isr::ISRrs>;
251///initialization and status register
252pub mod isr;
253/**PRER (rw) register accessor: prescaler register
254
255You can [`read`](crate::Reg::read) this register and get [`prer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
256
257See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:PRER)
258
259For information about available fields see [`mod@prer`] module*/
260pub type PRER = crate::Reg<prer::PRERrs>;
261///prescaler register
262pub mod prer;
263/**WUTR (rw) register accessor: wakeup timer register
264
265You can [`read`](crate::Reg::read) this register and get [`wutr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wutr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
266
267See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:WUTR)
268
269For information about available fields see [`mod@wutr`] module*/
270pub type WUTR = crate::Reg<wutr::WUTRrs>;
271///wakeup timer register
272pub mod wutr;
273/**CALIBR (rw) register accessor: calibration register
274
275You can [`read`](crate::Reg::read) this register and get [`calibr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calibr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
276
277See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:CALIBR)
278
279For information about available fields see [`mod@calibr`] module*/
280pub type CALIBR = crate::Reg<calibr::CALIBRrs>;
281///calibration register
282pub mod calibr;
283/**ALRMR (rw) register accessor: Alarm %s register
284
285You can [`read`](crate::Reg::read) this register and get [`alrmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alrmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
286
287See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:ALRM[A]R)
288
289For information about available fields see [`mod@alrmr`] module*/
290pub type ALRMR = crate::Reg<alrmr::ALRMRrs>;
291///Alarm %s register
292pub mod alrmr;
293/**WPR (w) register accessor: write protection register
294
295You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wpr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
296
297See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:WPR)
298
299For information about available fields see [`mod@wpr`] module*/
300pub type WPR = crate::Reg<wpr::WPRrs>;
301///write protection register
302pub mod wpr;
303pub use dr as tsdr;
304pub use tr as tstr;
305pub use DR as TSDR;
306pub use TR as TSTR;
307/**TAFCR (rw) register accessor: tamper and alternate function configuration register
308
309You can [`read`](crate::Reg::read) this register and get [`tafcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tafcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
310
311See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:TAFCR)
312
313For information about available fields see [`mod@tafcr`] module*/
314pub type TAFCR = crate::Reg<tafcr::TAFCRrs>;
315///tamper and alternate function configuration register
316pub mod tafcr;
317/**BKPR (rw) register accessor: backup register
318
319You can [`read`](crate::Reg::read) this register and get [`bkpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bkpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
320
321See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F215.html#RTC:BKP[0]R)
322
323For information about available fields see [`mod@bkpr`] module*/
324pub type BKPR = crate::Reg<bkpr::BKPRrs>;
325///backup register
326pub mod bkpr;
stm32f2/stm32f215/rtc.rs

stm32f2/stm32f215/
rtc.rs
