stm32f1xx_hal/timer/
pins.rs

1use crate::pac;
2
3pub trait CPin<REMAP, const C: u8> {}
4pub struct Ch<const C: u8>;
5pub const C1: u8 = 0;
6pub const C2: u8 = 1;
7pub const C3: u8 = 2;
8pub const C4: u8 = 3;
9
10pub(crate) mod sealed {
11    pub trait Remap {
12        type Periph;
13        const REMAP: u8;
14
15        fn remap(mapr: &mut crate::afio::MAPR);
16    }
17}
18
19macro_rules! remap {
20    ($($name:ident: ($TIMX:ty, $state:literal, $P1:ident, $P2:ident, $P3:ident, $P4:ident, { $remapex:expr }),)+) => {
21        $(
22            pub struct $name;
23            impl sealed::Remap for $name {
24                type Periph = $TIMX;
25                const REMAP: u8 = $state;
26
27                fn remap(mapr: &mut crate::afio::MAPR) {
28                    mapr.modify_mapr($remapex);
29                }
30            }
31            impl<MODE> CPin<$name, 0> for crate::gpio::$P1<MODE> {}
32            impl<MODE> CPin<$name, 1> for crate::gpio::$P2<MODE> {}
33            impl<MODE> CPin<$name, 2> for crate::gpio::$P3<MODE> {}
34            impl<MODE> CPin<$name, 3> for crate::gpio::$P4<MODE> {}
35        )+
36    }
37}
38
39#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
40remap!(
41    Tim1NoRemap: (pac::TIM1, 0b00, PA8, PA9, PA10, PA11, {|_, w| unsafe { w.tim1_remap().bits(Self::REMAP)}}),
42    //Tim1PartialRemap: (pac::TIM1, 0b01, PA8, PA9, PA10, PA11),
43    Tim1FullRemap: (pac::TIM1, 0b11, PE9, PE11, PE13, PE14, {|_, w| unsafe { w.tim1_remap().bits(Self::REMAP)}}),
44);
45
46remap!(
47    Tim2NoRemap: (pac::TIM2, 0b00, PA0, PA1, PA2, PA3, {|_, w| unsafe { w.tim2_remap().bits(Self::REMAP)}}),
48    Tim2PartialRemap1: (pac::TIM2, 0b01, PA15, PB3, PA2, PA3, {|_, w| unsafe { w.tim2_remap().bits(Self::REMAP)}}),
49    Tim2PartialRemap2: (pac::TIM2, 0b10, PA0, PA1, PB10, PB11, {|_, w| unsafe { w.tim2_remap().bits(Self::REMAP)}}),
50    Tim2FullRemap: (pac::TIM2, 0b11, PA15, PB3, PB10, PB11, {|_, w| unsafe { w.tim2_remap().bits(Self::REMAP)}}),
51
52    Tim3NoRemap: (pac::TIM3, 0b00, PA6, PA7, PB0, PB1, {|_, w| unsafe { w.tim3_remap().bits(Self::REMAP)}}),
53    Tim3PartialRemap: (pac::TIM3, 0b10, PB4, PB5, PB0, PB1, {|_, w| unsafe { w.tim3_remap().bits(Self::REMAP)}}),
54    Tim3FullRemap: (pac::TIM3, 0b11, PC6, PC7, PC8, PC9, {|_, w| unsafe { w.tim3_remap().bits(Self::REMAP)}}),
55);
56
57#[cfg(feature = "medium")]
58remap!(
59    Tim4NoRemap: (pac::TIM4, 0b00, PB6, PB7, PB8, PB9, {|_, w| w.tim4_remap().bit(Self::REMAP == 1)}),
60    Tim4Remap: (pac::TIM4, 0b01, PD12, PD13, PD14, PD15, {|_, w| w.tim4_remap().bit(Self::REMAP == 1)}),
61);
stm32f1xx_hal/timer/pins.rs

stm32f1xx_hal/timer/
pins.rs
