stm32f1xx_hal/
crc.rs

1//! CRC
2
3use crate::pac::{CRC, RCC};
4use crate::rcc::Enable;
5
6/// Extension trait to constrain the CRC peripheral
7pub trait CrcExt {
8    /// Constrains the CRC peripheral to play nicely with the other abstractions
9    #[allow(clippy::wrong_self_convention, clippy::new_ret_no_self)]
10    fn new(self, rcc: &mut RCC) -> Crc;
11}
12
13impl CrcExt for CRC {
14    fn new(self, rcc: &mut RCC) -> Crc {
15        CRC::enable(rcc);
16
17        Crc { crc: self }
18    }
19}
20
21/// Constrained CRC peripheral
22pub struct Crc {
23    crc: CRC,
24}
25
26impl Crc {
27    pub fn read(&self) -> u32 {
28        self.crc.dr().read().bits()
29    }
30
31    pub fn write(&mut self, val: u32) {
32        self.crc.dr().write(|w| w.dr().set(val));
33    }
34
35    pub fn reset(&self) {
36        self.crc.cr().write(|w| w.reset().set_bit());
37        // calling CRC::dr::write() just after CRC::cr::reset() will not work as expected, and
38        // inserting single nop() seems to solve the problem.
39        cortex_m::asm::nop();
40    }
41}