stm32f103xx/adc1/sqr1/
mod.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::SQR1 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct LR {
47    bits: u8,
48}
49impl LR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u8 {
53        self.bits
54    }
55}
56#[doc = r" Value of the field"]
57pub struct SQ16R {
58    bits: u8,
59}
60impl SQ16R {
61    #[doc = r" Value of the field as raw bits"]
62    #[inline]
63    pub fn bits(&self) -> u8 {
64        self.bits
65    }
66}
67#[doc = r" Value of the field"]
68pub struct SQ15R {
69    bits: u8,
70}
71impl SQ15R {
72    #[doc = r" Value of the field as raw bits"]
73    #[inline]
74    pub fn bits(&self) -> u8 {
75        self.bits
76    }
77}
78#[doc = r" Value of the field"]
79pub struct SQ14R {
80    bits: u8,
81}
82impl SQ14R {
83    #[doc = r" Value of the field as raw bits"]
84    #[inline]
85    pub fn bits(&self) -> u8 {
86        self.bits
87    }
88}
89#[doc = r" Value of the field"]
90pub struct SQ13R {
91    bits: u8,
92}
93impl SQ13R {
94    #[doc = r" Value of the field as raw bits"]
95    #[inline]
96    pub fn bits(&self) -> u8 {
97        self.bits
98    }
99}
100#[doc = r" Proxy"]
101pub struct _LW<'a> {
102    w: &'a mut W,
103}
104impl<'a> _LW<'a> {
105    #[doc = r" Writes raw bits to the field"]
106    #[inline]
107    pub unsafe fn bits(self, value: u8) -> &'a mut W {
108        const MASK: u8 = 15;
109        const OFFSET: u8 = 20;
110        self.w.bits &= !((MASK as u32) << OFFSET);
111        self.w.bits |= ((value & MASK) as u32) << OFFSET;
112        self.w
113    }
114}
115#[doc = r" Proxy"]
116pub struct _SQ16W<'a> {
117    w: &'a mut W,
118}
119impl<'a> _SQ16W<'a> {
120    #[doc = r" Writes raw bits to the field"]
121    #[inline]
122    pub unsafe fn bits(self, value: u8) -> &'a mut W {
123        const MASK: u8 = 31;
124        const OFFSET: u8 = 15;
125        self.w.bits &= !((MASK as u32) << OFFSET);
126        self.w.bits |= ((value & MASK) as u32) << OFFSET;
127        self.w
128    }
129}
130#[doc = r" Proxy"]
131pub struct _SQ15W<'a> {
132    w: &'a mut W,
133}
134impl<'a> _SQ15W<'a> {
135    #[doc = r" Writes raw bits to the field"]
136    #[inline]
137    pub unsafe fn bits(self, value: u8) -> &'a mut W {
138        const MASK: u8 = 31;
139        const OFFSET: u8 = 10;
140        self.w.bits &= !((MASK as u32) << OFFSET);
141        self.w.bits |= ((value & MASK) as u32) << OFFSET;
142        self.w
143    }
144}
145#[doc = r" Proxy"]
146pub struct _SQ14W<'a> {
147    w: &'a mut W,
148}
149impl<'a> _SQ14W<'a> {
150    #[doc = r" Writes raw bits to the field"]
151    #[inline]
152    pub unsafe fn bits(self, value: u8) -> &'a mut W {
153        const MASK: u8 = 31;
154        const OFFSET: u8 = 5;
155        self.w.bits &= !((MASK as u32) << OFFSET);
156        self.w.bits |= ((value & MASK) as u32) << OFFSET;
157        self.w
158    }
159}
160#[doc = r" Proxy"]
161pub struct _SQ13W<'a> {
162    w: &'a mut W,
163}
164impl<'a> _SQ13W<'a> {
165    #[doc = r" Writes raw bits to the field"]
166    #[inline]
167    pub unsafe fn bits(self, value: u8) -> &'a mut W {
168        const MASK: u8 = 31;
169        const OFFSET: u8 = 0;
170        self.w.bits &= !((MASK as u32) << OFFSET);
171        self.w.bits |= ((value & MASK) as u32) << OFFSET;
172        self.w
173    }
174}
175impl R {
176    #[doc = r" Value of the register as raw bits"]
177    #[inline]
178    pub fn bits(&self) -> u32 {
179        self.bits
180    }
181    #[doc = "Bits 20:23 - Regular channel sequence length"]
182    #[inline]
183    pub fn l(&self) -> LR {
184        let bits = {
185            const MASK: u8 = 15;
186            const OFFSET: u8 = 20;
187            ((self.bits >> OFFSET) & MASK as u32) as u8
188        };
189        LR { bits }
190    }
191    #[doc = "Bits 15:19 - 16th conversion in regular sequence"]
192    #[inline]
193    pub fn sq16(&self) -> SQ16R {
194        let bits = {
195            const MASK: u8 = 31;
196            const OFFSET: u8 = 15;
197            ((self.bits >> OFFSET) & MASK as u32) as u8
198        };
199        SQ16R { bits }
200    }
201    #[doc = "Bits 10:14 - 15th conversion in regular sequence"]
202    #[inline]
203    pub fn sq15(&self) -> SQ15R {
204        let bits = {
205            const MASK: u8 = 31;
206            const OFFSET: u8 = 10;
207            ((self.bits >> OFFSET) & MASK as u32) as u8
208        };
209        SQ15R { bits }
210    }
211    #[doc = "Bits 5:9 - 14th conversion in regular sequence"]
212    #[inline]
213    pub fn sq14(&self) -> SQ14R {
214        let bits = {
215            const MASK: u8 = 31;
216            const OFFSET: u8 = 5;
217            ((self.bits >> OFFSET) & MASK as u32) as u8
218        };
219        SQ14R { bits }
220    }
221    #[doc = "Bits 0:4 - 13th conversion in regular sequence"]
222    #[inline]
223    pub fn sq13(&self) -> SQ13R {
224        let bits = {
225            const MASK: u8 = 31;
226            const OFFSET: u8 = 0;
227            ((self.bits >> OFFSET) & MASK as u32) as u8
228        };
229        SQ13R { bits }
230    }
231}
232impl W {
233    #[doc = r" Reset value of the register"]
234    #[inline]
235    pub fn reset_value() -> W {
236        W { bits: 0 }
237    }
238    #[doc = r" Writes raw bits to the register"]
239    #[inline]
240    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
241        self.bits = bits;
242        self
243    }
244    #[doc = "Bits 20:23 - Regular channel sequence length"]
245    #[inline]
246    pub fn l(&mut self) -> _LW {
247        _LW { w: self }
248    }
249    #[doc = "Bits 15:19 - 16th conversion in regular sequence"]
250    #[inline]
251    pub fn sq16(&mut self) -> _SQ16W {
252        _SQ16W { w: self }
253    }
254    #[doc = "Bits 10:14 - 15th conversion in regular sequence"]
255    #[inline]
256    pub fn sq15(&mut self) -> _SQ15W {
257        _SQ15W { w: self }
258    }
259    #[doc = "Bits 5:9 - 14th conversion in regular sequence"]
260    #[inline]
261    pub fn sq14(&mut self) -> _SQ14W {
262        _SQ14W { w: self }
263    }
264    #[doc = "Bits 0:4 - 13th conversion in regular sequence"]
265    #[inline]
266    pub fn sq13(&mut self) -> _SQ13W {
267        _SQ13W { w: self }
268    }
269}
stm32f103xx/adc1/sqr1/mod.rs

stm32f103xx/adc1/sqr1/
mod.rs
