stm32f103xx/rcc/apb2enr/
mod.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::APB2ENR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `AFIOEN`"]
46pub type AFIOENR = super::ahbenr::DMA1ENR;
47#[doc = "Possible values of the field `IOPAEN`"]
48pub type IOPAENR = super::ahbenr::DMA1ENR;
49#[doc = "Possible values of the field `IOPBEN`"]
50pub type IOPBENR = super::ahbenr::DMA1ENR;
51#[doc = "Possible values of the field `IOPCEN`"]
52pub type IOPCENR = super::ahbenr::DMA1ENR;
53#[doc = "Possible values of the field `IOPDEN`"]
54pub type IOPDENR = super::ahbenr::DMA1ENR;
55#[doc = "Possible values of the field `IOPEEN`"]
56pub type IOPEENR = super::ahbenr::DMA1ENR;
57#[doc = "Possible values of the field `IOPFEN`"]
58pub type IOPFENR = super::ahbenr::DMA1ENR;
59#[doc = "Possible values of the field `IOPGEN`"]
60pub type IOPGENR = super::ahbenr::DMA1ENR;
61#[doc = "Possible values of the field `ADC1EN`"]
62pub type ADC1ENR = super::ahbenr::DMA1ENR;
63#[doc = "Possible values of the field `ADC2EN`"]
64pub type ADC2ENR = super::ahbenr::DMA1ENR;
65#[doc = "Possible values of the field `TIM1EN`"]
66pub type TIM1ENR = super::ahbenr::DMA1ENR;
67#[doc = "Possible values of the field `SPI1EN`"]
68pub type SPI1ENR = super::ahbenr::DMA1ENR;
69#[doc = "Possible values of the field `TIM8EN`"]
70pub type TIM8ENR = super::ahbenr::DMA1ENR;
71#[doc = "Possible values of the field `USART1EN`"]
72pub type USART1ENR = super::ahbenr::DMA1ENR;
73#[doc = "Possible values of the field `ADC3EN`"]
74pub type ADC3ENR = super::ahbenr::DMA1ENR;
75#[doc = "Possible values of the field `TIM9EN`"]
76pub type TIM9ENR = super::ahbenr::DMA1ENR;
77#[doc = "Possible values of the field `TIM10EN`"]
78pub type TIM10ENR = super::ahbenr::DMA1ENR;
79#[doc = "Possible values of the field `TIM11EN`"]
80pub type TIM11ENR = super::ahbenr::DMA1ENR;
81#[doc = "Values that can be written to the field `AFIOEN`"]
82pub type AFIOENW = super::ahbenr::DMA1ENW;
83#[doc = r" Proxy"]
84pub struct _AFIOENW<'a> {
85 w: &'a mut W,
86}
87impl<'a> _AFIOENW<'a> {
88 #[doc = r" Writes `variant` to the field"]
89 #[inline]
90 pub fn variant(self, variant: AFIOENW) -> &'a mut W {
91 {
92 self.bit(variant._bits())
93 }
94 }
95 #[doc = "Disabled."]
96 #[inline]
97 pub fn disabled(self) -> &'a mut W {
98 self.variant(super::ahbenr::DMA1ENW::DISABLED)
99 }
100 #[doc = "Enabled."]
101 #[inline]
102 pub fn enabled(self) -> &'a mut W {
103 self.variant(super::ahbenr::DMA1ENW::ENABLED)
104 }
105 #[doc = r" Sets the field bit"]
106 pub fn set_bit(self) -> &'a mut W {
107 self.bit(true)
108 }
109 #[doc = r" Clears the field bit"]
110 pub fn clear_bit(self) -> &'a mut W {
111 self.bit(false)
112 }
113 #[doc = r" Writes raw bits to the field"]
114 #[inline]
115 pub fn bit(self, value: bool) -> &'a mut W {
116 const MASK: bool = true;
117 const OFFSET: u8 = 0;
118 self.w.bits &= !((MASK as u32) << OFFSET);
119 self.w.bits |= ((value & MASK) as u32) << OFFSET;
120 self.w
121 }
122}
123#[doc = "Values that can be written to the field `IOPAEN`"]
124pub type IOPAENW = super::ahbenr::DMA1ENW;
125#[doc = r" Proxy"]
126pub struct _IOPAENW<'a> {
127 w: &'a mut W,
128}
129impl<'a> _IOPAENW<'a> {
130 #[doc = r" Writes `variant` to the field"]
131 #[inline]
132 pub fn variant(self, variant: IOPAENW) -> &'a mut W {
133 {
134 self.bit(variant._bits())
135 }
136 }
137 #[doc = "Disabled."]
138 #[inline]
139 pub fn disabled(self) -> &'a mut W {
140 self.variant(super::ahbenr::DMA1ENW::DISABLED)
141 }
142 #[doc = "Enabled."]
143 #[inline]
144 pub fn enabled(self) -> &'a mut W {
145 self.variant(super::ahbenr::DMA1ENW::ENABLED)
146 }
147 #[doc = r" Sets the field bit"]
148 pub fn set_bit(self) -> &'a mut W {
149 self.bit(true)
150 }
151 #[doc = r" Clears the field bit"]
152 pub fn clear_bit(self) -> &'a mut W {
153 self.bit(false)
154 }
155 #[doc = r" Writes raw bits to the field"]
156 #[inline]
157 pub fn bit(self, value: bool) -> &'a mut W {
158 const MASK: bool = true;
159 const OFFSET: u8 = 2;
160 self.w.bits &= !((MASK as u32) << OFFSET);
161 self.w.bits |= ((value & MASK) as u32) << OFFSET;
162 self.w
163 }
164}
165#[doc = "Values that can be written to the field `IOPBEN`"]
166pub type IOPBENW = super::ahbenr::DMA1ENW;
167#[doc = r" Proxy"]
168pub struct _IOPBENW<'a> {
169 w: &'a mut W,
170}
171impl<'a> _IOPBENW<'a> {
172 #[doc = r" Writes `variant` to the field"]
173 #[inline]
174 pub fn variant(self, variant: IOPBENW) -> &'a mut W {
175 {
176 self.bit(variant._bits())
177 }
178 }
179 #[doc = "Disabled."]
180 #[inline]
181 pub fn disabled(self) -> &'a mut W {
182 self.variant(super::ahbenr::DMA1ENW::DISABLED)
183 }
184 #[doc = "Enabled."]
185 #[inline]
186 pub fn enabled(self) -> &'a mut W {
187 self.variant(super::ahbenr::DMA1ENW::ENABLED)
188 }
189 #[doc = r" Sets the field bit"]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r" Clears the field bit"]
194 pub fn clear_bit(self) -> &'a mut W {
195 self.bit(false)
196 }
197 #[doc = r" Writes raw bits to the field"]
198 #[inline]
199 pub fn bit(self, value: bool) -> &'a mut W {
200 const MASK: bool = true;
201 const OFFSET: u8 = 3;
202 self.w.bits &= !((MASK as u32) << OFFSET);
203 self.w.bits |= ((value & MASK) as u32) << OFFSET;
204 self.w
205 }
206}
207#[doc = "Values that can be written to the field `IOPCEN`"]
208pub type IOPCENW = super::ahbenr::DMA1ENW;
209#[doc = r" Proxy"]
210pub struct _IOPCENW<'a> {
211 w: &'a mut W,
212}
213impl<'a> _IOPCENW<'a> {
214 #[doc = r" Writes `variant` to the field"]
215 #[inline]
216 pub fn variant(self, variant: IOPCENW) -> &'a mut W {
217 {
218 self.bit(variant._bits())
219 }
220 }
221 #[doc = "Disabled."]
222 #[inline]
223 pub fn disabled(self) -> &'a mut W {
224 self.variant(super::ahbenr::DMA1ENW::DISABLED)
225 }
226 #[doc = "Enabled."]
227 #[inline]
228 pub fn enabled(self) -> &'a mut W {
229 self.variant(super::ahbenr::DMA1ENW::ENABLED)
230 }
231 #[doc = r" Sets the field bit"]
232 pub fn set_bit(self) -> &'a mut W {
233 self.bit(true)
234 }
235 #[doc = r" Clears the field bit"]
236 pub fn clear_bit(self) -> &'a mut W {
237 self.bit(false)
238 }
239 #[doc = r" Writes raw bits to the field"]
240 #[inline]
241 pub fn bit(self, value: bool) -> &'a mut W {
242 const MASK: bool = true;
243 const OFFSET: u8 = 4;
244 self.w.bits &= !((MASK as u32) << OFFSET);
245 self.w.bits |= ((value & MASK) as u32) << OFFSET;
246 self.w
247 }
248}
249#[doc = "Values that can be written to the field `IOPDEN`"]
250pub type IOPDENW = super::ahbenr::DMA1ENW;
251#[doc = r" Proxy"]
252pub struct _IOPDENW<'a> {
253 w: &'a mut W,
254}
255impl<'a> _IOPDENW<'a> {
256 #[doc = r" Writes `variant` to the field"]
257 #[inline]
258 pub fn variant(self, variant: IOPDENW) -> &'a mut W {
259 {
260 self.bit(variant._bits())
261 }
262 }
263 #[doc = "Disabled."]
264 #[inline]
265 pub fn disabled(self) -> &'a mut W {
266 self.variant(super::ahbenr::DMA1ENW::DISABLED)
267 }
268 #[doc = "Enabled."]
269 #[inline]
270 pub fn enabled(self) -> &'a mut W {
271 self.variant(super::ahbenr::DMA1ENW::ENABLED)
272 }
273 #[doc = r" Sets the field bit"]
274 pub fn set_bit(self) -> &'a mut W {
275 self.bit(true)
276 }
277 #[doc = r" Clears the field bit"]
278 pub fn clear_bit(self) -> &'a mut W {
279 self.bit(false)
280 }
281 #[doc = r" Writes raw bits to the field"]
282 #[inline]
283 pub fn bit(self, value: bool) -> &'a mut W {
284 const MASK: bool = true;
285 const OFFSET: u8 = 5;
286 self.w.bits &= !((MASK as u32) << OFFSET);
287 self.w.bits |= ((value & MASK) as u32) << OFFSET;
288 self.w
289 }
290}
291#[doc = "Values that can be written to the field `IOPEEN`"]
292pub type IOPEENW = super::ahbenr::DMA1ENW;
293#[doc = r" Proxy"]
294pub struct _IOPEENW<'a> {
295 w: &'a mut W,
296}
297impl<'a> _IOPEENW<'a> {
298 #[doc = r" Writes `variant` to the field"]
299 #[inline]
300 pub fn variant(self, variant: IOPEENW) -> &'a mut W {
301 {
302 self.bit(variant._bits())
303 }
304 }
305 #[doc = "Disabled."]
306 #[inline]
307 pub fn disabled(self) -> &'a mut W {
308 self.variant(super::ahbenr::DMA1ENW::DISABLED)
309 }
310 #[doc = "Enabled."]
311 #[inline]
312 pub fn enabled(self) -> &'a mut W {
313 self.variant(super::ahbenr::DMA1ENW::ENABLED)
314 }
315 #[doc = r" Sets the field bit"]
316 pub fn set_bit(self) -> &'a mut W {
317 self.bit(true)
318 }
319 #[doc = r" Clears the field bit"]
320 pub fn clear_bit(self) -> &'a mut W {
321 self.bit(false)
322 }
323 #[doc = r" Writes raw bits to the field"]
324 #[inline]
325 pub fn bit(self, value: bool) -> &'a mut W {
326 const MASK: bool = true;
327 const OFFSET: u8 = 6;
328 self.w.bits &= !((MASK as u32) << OFFSET);
329 self.w.bits |= ((value & MASK) as u32) << OFFSET;
330 self.w
331 }
332}
333#[doc = "Values that can be written to the field `IOPFEN`"]
334pub type IOPFENW = super::ahbenr::DMA1ENW;
335#[doc = r" Proxy"]
336pub struct _IOPFENW<'a> {
337 w: &'a mut W,
338}
339impl<'a> _IOPFENW<'a> {
340 #[doc = r" Writes `variant` to the field"]
341 #[inline]
342 pub fn variant(self, variant: IOPFENW) -> &'a mut W {
343 {
344 self.bit(variant._bits())
345 }
346 }
347 #[doc = "Disabled."]
348 #[inline]
349 pub fn disabled(self) -> &'a mut W {
350 self.variant(super::ahbenr::DMA1ENW::DISABLED)
351 }
352 #[doc = "Enabled."]
353 #[inline]
354 pub fn enabled(self) -> &'a mut W {
355 self.variant(super::ahbenr::DMA1ENW::ENABLED)
356 }
357 #[doc = r" Sets the field bit"]
358 pub fn set_bit(self) -> &'a mut W {
359 self.bit(true)
360 }
361 #[doc = r" Clears the field bit"]
362 pub fn clear_bit(self) -> &'a mut W {
363 self.bit(false)
364 }
365 #[doc = r" Writes raw bits to the field"]
366 #[inline]
367 pub fn bit(self, value: bool) -> &'a mut W {
368 const MASK: bool = true;
369 const OFFSET: u8 = 7;
370 self.w.bits &= !((MASK as u32) << OFFSET);
371 self.w.bits |= ((value & MASK) as u32) << OFFSET;
372 self.w
373 }
374}
375#[doc = "Values that can be written to the field `IOPGEN`"]
376pub type IOPGENW = super::ahbenr::DMA1ENW;
377#[doc = r" Proxy"]
378pub struct _IOPGENW<'a> {
379 w: &'a mut W,
380}
381impl<'a> _IOPGENW<'a> {
382 #[doc = r" Writes `variant` to the field"]
383 #[inline]
384 pub fn variant(self, variant: IOPGENW) -> &'a mut W {
385 {
386 self.bit(variant._bits())
387 }
388 }
389 #[doc = "Disabled."]
390 #[inline]
391 pub fn disabled(self) -> &'a mut W {
392 self.variant(super::ahbenr::DMA1ENW::DISABLED)
393 }
394 #[doc = "Enabled."]
395 #[inline]
396 pub fn enabled(self) -> &'a mut W {
397 self.variant(super::ahbenr::DMA1ENW::ENABLED)
398 }
399 #[doc = r" Sets the field bit"]
400 pub fn set_bit(self) -> &'a mut W {
401 self.bit(true)
402 }
403 #[doc = r" Clears the field bit"]
404 pub fn clear_bit(self) -> &'a mut W {
405 self.bit(false)
406 }
407 #[doc = r" Writes raw bits to the field"]
408 #[inline]
409 pub fn bit(self, value: bool) -> &'a mut W {
410 const MASK: bool = true;
411 const OFFSET: u8 = 8;
412 self.w.bits &= !((MASK as u32) << OFFSET);
413 self.w.bits |= ((value & MASK) as u32) << OFFSET;
414 self.w
415 }
416}
417#[doc = "Values that can be written to the field `ADC1EN`"]
418pub type ADC1ENW = super::ahbenr::DMA1ENW;
419#[doc = r" Proxy"]
420pub struct _ADC1ENW<'a> {
421 w: &'a mut W,
422}
423impl<'a> _ADC1ENW<'a> {
424 #[doc = r" Writes `variant` to the field"]
425 #[inline]
426 pub fn variant(self, variant: ADC1ENW) -> &'a mut W {
427 {
428 self.bit(variant._bits())
429 }
430 }
431 #[doc = "Disabled."]
432 #[inline]
433 pub fn disabled(self) -> &'a mut W {
434 self.variant(super::ahbenr::DMA1ENW::DISABLED)
435 }
436 #[doc = "Enabled."]
437 #[inline]
438 pub fn enabled(self) -> &'a mut W {
439 self.variant(super::ahbenr::DMA1ENW::ENABLED)
440 }
441 #[doc = r" Sets the field bit"]
442 pub fn set_bit(self) -> &'a mut W {
443 self.bit(true)
444 }
445 #[doc = r" Clears the field bit"]
446 pub fn clear_bit(self) -> &'a mut W {
447 self.bit(false)
448 }
449 #[doc = r" Writes raw bits to the field"]
450 #[inline]
451 pub fn bit(self, value: bool) -> &'a mut W {
452 const MASK: bool = true;
453 const OFFSET: u8 = 9;
454 self.w.bits &= !((MASK as u32) << OFFSET);
455 self.w.bits |= ((value & MASK) as u32) << OFFSET;
456 self.w
457 }
458}
459#[doc = "Values that can be written to the field `ADC2EN`"]
460pub type ADC2ENW = super::ahbenr::DMA1ENW;
461#[doc = r" Proxy"]
462pub struct _ADC2ENW<'a> {
463 w: &'a mut W,
464}
465impl<'a> _ADC2ENW<'a> {
466 #[doc = r" Writes `variant` to the field"]
467 #[inline]
468 pub fn variant(self, variant: ADC2ENW) -> &'a mut W {
469 {
470 self.bit(variant._bits())
471 }
472 }
473 #[doc = "Disabled."]
474 #[inline]
475 pub fn disabled(self) -> &'a mut W {
476 self.variant(super::ahbenr::DMA1ENW::DISABLED)
477 }
478 #[doc = "Enabled."]
479 #[inline]
480 pub fn enabled(self) -> &'a mut W {
481 self.variant(super::ahbenr::DMA1ENW::ENABLED)
482 }
483 #[doc = r" Sets the field bit"]
484 pub fn set_bit(self) -> &'a mut W {
485 self.bit(true)
486 }
487 #[doc = r" Clears the field bit"]
488 pub fn clear_bit(self) -> &'a mut W {
489 self.bit(false)
490 }
491 #[doc = r" Writes raw bits to the field"]
492 #[inline]
493 pub fn bit(self, value: bool) -> &'a mut W {
494 const MASK: bool = true;
495 const OFFSET: u8 = 10;
496 self.w.bits &= !((MASK as u32) << OFFSET);
497 self.w.bits |= ((value & MASK) as u32) << OFFSET;
498 self.w
499 }
500}
501#[doc = "Values that can be written to the field `TIM1EN`"]
502pub type TIM1ENW = super::ahbenr::DMA1ENW;
503#[doc = r" Proxy"]
504pub struct _TIM1ENW<'a> {
505 w: &'a mut W,
506}
507impl<'a> _TIM1ENW<'a> {
508 #[doc = r" Writes `variant` to the field"]
509 #[inline]
510 pub fn variant(self, variant: TIM1ENW) -> &'a mut W {
511 {
512 self.bit(variant._bits())
513 }
514 }
515 #[doc = "Disabled."]
516 #[inline]
517 pub fn disabled(self) -> &'a mut W {
518 self.variant(super::ahbenr::DMA1ENW::DISABLED)
519 }
520 #[doc = "Enabled."]
521 #[inline]
522 pub fn enabled(self) -> &'a mut W {
523 self.variant(super::ahbenr::DMA1ENW::ENABLED)
524 }
525 #[doc = r" Sets the field bit"]
526 pub fn set_bit(self) -> &'a mut W {
527 self.bit(true)
528 }
529 #[doc = r" Clears the field bit"]
530 pub fn clear_bit(self) -> &'a mut W {
531 self.bit(false)
532 }
533 #[doc = r" Writes raw bits to the field"]
534 #[inline]
535 pub fn bit(self, value: bool) -> &'a mut W {
536 const MASK: bool = true;
537 const OFFSET: u8 = 11;
538 self.w.bits &= !((MASK as u32) << OFFSET);
539 self.w.bits |= ((value & MASK) as u32) << OFFSET;
540 self.w
541 }
542}
543#[doc = "Values that can be written to the field `SPI1EN`"]
544pub type SPI1ENW = super::ahbenr::DMA1ENW;
545#[doc = r" Proxy"]
546pub struct _SPI1ENW<'a> {
547 w: &'a mut W,
548}
549impl<'a> _SPI1ENW<'a> {
550 #[doc = r" Writes `variant` to the field"]
551 #[inline]
552 pub fn variant(self, variant: SPI1ENW) -> &'a mut W {
553 {
554 self.bit(variant._bits())
555 }
556 }
557 #[doc = "Disabled."]
558 #[inline]
559 pub fn disabled(self) -> &'a mut W {
560 self.variant(super::ahbenr::DMA1ENW::DISABLED)
561 }
562 #[doc = "Enabled."]
563 #[inline]
564 pub fn enabled(self) -> &'a mut W {
565 self.variant(super::ahbenr::DMA1ENW::ENABLED)
566 }
567 #[doc = r" Sets the field bit"]
568 pub fn set_bit(self) -> &'a mut W {
569 self.bit(true)
570 }
571 #[doc = r" Clears the field bit"]
572 pub fn clear_bit(self) -> &'a mut W {
573 self.bit(false)
574 }
575 #[doc = r" Writes raw bits to the field"]
576 #[inline]
577 pub fn bit(self, value: bool) -> &'a mut W {
578 const MASK: bool = true;
579 const OFFSET: u8 = 12;
580 self.w.bits &= !((MASK as u32) << OFFSET);
581 self.w.bits |= ((value & MASK) as u32) << OFFSET;
582 self.w
583 }
584}
585#[doc = "Values that can be written to the field `TIM8EN`"]
586pub type TIM8ENW = super::ahbenr::DMA1ENW;
587#[doc = r" Proxy"]
588pub struct _TIM8ENW<'a> {
589 w: &'a mut W,
590}
591impl<'a> _TIM8ENW<'a> {
592 #[doc = r" Writes `variant` to the field"]
593 #[inline]
594 pub fn variant(self, variant: TIM8ENW) -> &'a mut W {
595 {
596 self.bit(variant._bits())
597 }
598 }
599 #[doc = "Disabled."]
600 #[inline]
601 pub fn disabled(self) -> &'a mut W {
602 self.variant(super::ahbenr::DMA1ENW::DISABLED)
603 }
604 #[doc = "Enabled."]
605 #[inline]
606 pub fn enabled(self) -> &'a mut W {
607 self.variant(super::ahbenr::DMA1ENW::ENABLED)
608 }
609 #[doc = r" Sets the field bit"]
610 pub fn set_bit(self) -> &'a mut W {
611 self.bit(true)
612 }
613 #[doc = r" Clears the field bit"]
614 pub fn clear_bit(self) -> &'a mut W {
615 self.bit(false)
616 }
617 #[doc = r" Writes raw bits to the field"]
618 #[inline]
619 pub fn bit(self, value: bool) -> &'a mut W {
620 const MASK: bool = true;
621 const OFFSET: u8 = 13;
622 self.w.bits &= !((MASK as u32) << OFFSET);
623 self.w.bits |= ((value & MASK) as u32) << OFFSET;
624 self.w
625 }
626}
627#[doc = "Values that can be written to the field `USART1EN`"]
628pub type USART1ENW = super::ahbenr::DMA1ENW;
629#[doc = r" Proxy"]
630pub struct _USART1ENW<'a> {
631 w: &'a mut W,
632}
633impl<'a> _USART1ENW<'a> {
634 #[doc = r" Writes `variant` to the field"]
635 #[inline]
636 pub fn variant(self, variant: USART1ENW) -> &'a mut W {
637 {
638 self.bit(variant._bits())
639 }
640 }
641 #[doc = "Disabled."]
642 #[inline]
643 pub fn disabled(self) -> &'a mut W {
644 self.variant(super::ahbenr::DMA1ENW::DISABLED)
645 }
646 #[doc = "Enabled."]
647 #[inline]
648 pub fn enabled(self) -> &'a mut W {
649 self.variant(super::ahbenr::DMA1ENW::ENABLED)
650 }
651 #[doc = r" Sets the field bit"]
652 pub fn set_bit(self) -> &'a mut W {
653 self.bit(true)
654 }
655 #[doc = r" Clears the field bit"]
656 pub fn clear_bit(self) -> &'a mut W {
657 self.bit(false)
658 }
659 #[doc = r" Writes raw bits to the field"]
660 #[inline]
661 pub fn bit(self, value: bool) -> &'a mut W {
662 const MASK: bool = true;
663 const OFFSET: u8 = 14;
664 self.w.bits &= !((MASK as u32) << OFFSET);
665 self.w.bits |= ((value & MASK) as u32) << OFFSET;
666 self.w
667 }
668}
669#[doc = "Values that can be written to the field `ADC3EN`"]
670pub type ADC3ENW = super::ahbenr::DMA1ENW;
671#[doc = r" Proxy"]
672pub struct _ADC3ENW<'a> {
673 w: &'a mut W,
674}
675impl<'a> _ADC3ENW<'a> {
676 #[doc = r" Writes `variant` to the field"]
677 #[inline]
678 pub fn variant(self, variant: ADC3ENW) -> &'a mut W {
679 {
680 self.bit(variant._bits())
681 }
682 }
683 #[doc = "Disabled."]
684 #[inline]
685 pub fn disabled(self) -> &'a mut W {
686 self.variant(super::ahbenr::DMA1ENW::DISABLED)
687 }
688 #[doc = "Enabled."]
689 #[inline]
690 pub fn enabled(self) -> &'a mut W {
691 self.variant(super::ahbenr::DMA1ENW::ENABLED)
692 }
693 #[doc = r" Sets the field bit"]
694 pub fn set_bit(self) -> &'a mut W {
695 self.bit(true)
696 }
697 #[doc = r" Clears the field bit"]
698 pub fn clear_bit(self) -> &'a mut W {
699 self.bit(false)
700 }
701 #[doc = r" Writes raw bits to the field"]
702 #[inline]
703 pub fn bit(self, value: bool) -> &'a mut W {
704 const MASK: bool = true;
705 const OFFSET: u8 = 15;
706 self.w.bits &= !((MASK as u32) << OFFSET);
707 self.w.bits |= ((value & MASK) as u32) << OFFSET;
708 self.w
709 }
710}
711#[doc = "Values that can be written to the field `TIM9EN`"]
712pub type TIM9ENW = super::ahbenr::DMA1ENW;
713#[doc = r" Proxy"]
714pub struct _TIM9ENW<'a> {
715 w: &'a mut W,
716}
717impl<'a> _TIM9ENW<'a> {
718 #[doc = r" Writes `variant` to the field"]
719 #[inline]
720 pub fn variant(self, variant: TIM9ENW) -> &'a mut W {
721 {
722 self.bit(variant._bits())
723 }
724 }
725 #[doc = "Disabled."]
726 #[inline]
727 pub fn disabled(self) -> &'a mut W {
728 self.variant(super::ahbenr::DMA1ENW::DISABLED)
729 }
730 #[doc = "Enabled."]
731 #[inline]
732 pub fn enabled(self) -> &'a mut W {
733 self.variant(super::ahbenr::DMA1ENW::ENABLED)
734 }
735 #[doc = r" Sets the field bit"]
736 pub fn set_bit(self) -> &'a mut W {
737 self.bit(true)
738 }
739 #[doc = r" Clears the field bit"]
740 pub fn clear_bit(self) -> &'a mut W {
741 self.bit(false)
742 }
743 #[doc = r" Writes raw bits to the field"]
744 #[inline]
745 pub fn bit(self, value: bool) -> &'a mut W {
746 const MASK: bool = true;
747 const OFFSET: u8 = 19;
748 self.w.bits &= !((MASK as u32) << OFFSET);
749 self.w.bits |= ((value & MASK) as u32) << OFFSET;
750 self.w
751 }
752}
753#[doc = "Values that can be written to the field `TIM10EN`"]
754pub type TIM10ENW = super::ahbenr::DMA1ENW;
755#[doc = r" Proxy"]
756pub struct _TIM10ENW<'a> {
757 w: &'a mut W,
758}
759impl<'a> _TIM10ENW<'a> {
760 #[doc = r" Writes `variant` to the field"]
761 #[inline]
762 pub fn variant(self, variant: TIM10ENW) -> &'a mut W {
763 {
764 self.bit(variant._bits())
765 }
766 }
767 #[doc = "Disabled."]
768 #[inline]
769 pub fn disabled(self) -> &'a mut W {
770 self.variant(super::ahbenr::DMA1ENW::DISABLED)
771 }
772 #[doc = "Enabled."]
773 #[inline]
774 pub fn enabled(self) -> &'a mut W {
775 self.variant(super::ahbenr::DMA1ENW::ENABLED)
776 }
777 #[doc = r" Sets the field bit"]
778 pub fn set_bit(self) -> &'a mut W {
779 self.bit(true)
780 }
781 #[doc = r" Clears the field bit"]
782 pub fn clear_bit(self) -> &'a mut W {
783 self.bit(false)
784 }
785 #[doc = r" Writes raw bits to the field"]
786 #[inline]
787 pub fn bit(self, value: bool) -> &'a mut W {
788 const MASK: bool = true;
789 const OFFSET: u8 = 20;
790 self.w.bits &= !((MASK as u32) << OFFSET);
791 self.w.bits |= ((value & MASK) as u32) << OFFSET;
792 self.w
793 }
794}
795#[doc = "Values that can be written to the field `TIM11EN`"]
796pub type TIM11ENW = super::ahbenr::DMA1ENW;
797#[doc = r" Proxy"]
798pub struct _TIM11ENW<'a> {
799 w: &'a mut W,
800}
801impl<'a> _TIM11ENW<'a> {
802 #[doc = r" Writes `variant` to the field"]
803 #[inline]
804 pub fn variant(self, variant: TIM11ENW) -> &'a mut W {
805 {
806 self.bit(variant._bits())
807 }
808 }
809 #[doc = "Disabled."]
810 #[inline]
811 pub fn disabled(self) -> &'a mut W {
812 self.variant(super::ahbenr::DMA1ENW::DISABLED)
813 }
814 #[doc = "Enabled."]
815 #[inline]
816 pub fn enabled(self) -> &'a mut W {
817 self.variant(super::ahbenr::DMA1ENW::ENABLED)
818 }
819 #[doc = r" Sets the field bit"]
820 pub fn set_bit(self) -> &'a mut W {
821 self.bit(true)
822 }
823 #[doc = r" Clears the field bit"]
824 pub fn clear_bit(self) -> &'a mut W {
825 self.bit(false)
826 }
827 #[doc = r" Writes raw bits to the field"]
828 #[inline]
829 pub fn bit(self, value: bool) -> &'a mut W {
830 const MASK: bool = true;
831 const OFFSET: u8 = 21;
832 self.w.bits &= !((MASK as u32) << OFFSET);
833 self.w.bits |= ((value & MASK) as u32) << OFFSET;
834 self.w
835 }
836}
837impl R {
838 #[doc = r" Value of the register as raw bits"]
839 #[inline]
840 pub fn bits(&self) -> u32 {
841 self.bits
842 }
843 #[doc = "Bit 0 - Alternate function I/O clock enable"]
844 #[inline]
845 pub fn afioen(&self) -> AFIOENR {
846 AFIOENR::_from({
847 const MASK: bool = true;
848 const OFFSET: u8 = 0;
849 ((self.bits >> OFFSET) & MASK as u32) != 0
850 })
851 }
852 #[doc = "Bit 2 - I/O port A clock enable"]
853 #[inline]
854 pub fn iopaen(&self) -> IOPAENR {
855 IOPAENR::_from({
856 const MASK: bool = true;
857 const OFFSET: u8 = 2;
858 ((self.bits >> OFFSET) & MASK as u32) != 0
859 })
860 }
861 #[doc = "Bit 3 - I/O port B clock enable"]
862 #[inline]
863 pub fn iopben(&self) -> IOPBENR {
864 IOPBENR::_from({
865 const MASK: bool = true;
866 const OFFSET: u8 = 3;
867 ((self.bits >> OFFSET) & MASK as u32) != 0
868 })
869 }
870 #[doc = "Bit 4 - I/O port C clock enable"]
871 #[inline]
872 pub fn iopcen(&self) -> IOPCENR {
873 IOPCENR::_from({
874 const MASK: bool = true;
875 const OFFSET: u8 = 4;
876 ((self.bits >> OFFSET) & MASK as u32) != 0
877 })
878 }
879 #[doc = "Bit 5 - I/O port D clock enable"]
880 #[inline]
881 pub fn iopden(&self) -> IOPDENR {
882 IOPDENR::_from({
883 const MASK: bool = true;
884 const OFFSET: u8 = 5;
885 ((self.bits >> OFFSET) & MASK as u32) != 0
886 })
887 }
888 #[doc = "Bit 6 - I/O port E clock enable"]
889 #[inline]
890 pub fn iopeen(&self) -> IOPEENR {
891 IOPEENR::_from({
892 const MASK: bool = true;
893 const OFFSET: u8 = 6;
894 ((self.bits >> OFFSET) & MASK as u32) != 0
895 })
896 }
897 #[doc = "Bit 7 - I/O port F clock enable"]
898 #[inline]
899 pub fn iopfen(&self) -> IOPFENR {
900 IOPFENR::_from({
901 const MASK: bool = true;
902 const OFFSET: u8 = 7;
903 ((self.bits >> OFFSET) & MASK as u32) != 0
904 })
905 }
906 #[doc = "Bit 8 - I/O port G clock enable"]
907 #[inline]
908 pub fn iopgen(&self) -> IOPGENR {
909 IOPGENR::_from({
910 const MASK: bool = true;
911 const OFFSET: u8 = 8;
912 ((self.bits >> OFFSET) & MASK as u32) != 0
913 })
914 }
915 #[doc = "Bit 9 - ADC 1 interface clock enable"]
916 #[inline]
917 pub fn adc1en(&self) -> ADC1ENR {
918 ADC1ENR::_from({
919 const MASK: bool = true;
920 const OFFSET: u8 = 9;
921 ((self.bits >> OFFSET) & MASK as u32) != 0
922 })
923 }
924 #[doc = "Bit 10 - ADC 2 interface clock enable"]
925 #[inline]
926 pub fn adc2en(&self) -> ADC2ENR {
927 ADC2ENR::_from({
928 const MASK: bool = true;
929 const OFFSET: u8 = 10;
930 ((self.bits >> OFFSET) & MASK as u32) != 0
931 })
932 }
933 #[doc = "Bit 11 - TIM1 Timer clock enable"]
934 #[inline]
935 pub fn tim1en(&self) -> TIM1ENR {
936 TIM1ENR::_from({
937 const MASK: bool = true;
938 const OFFSET: u8 = 11;
939 ((self.bits >> OFFSET) & MASK as u32) != 0
940 })
941 }
942 #[doc = "Bit 12 - SPI 1 clock enable"]
943 #[inline]
944 pub fn spi1en(&self) -> SPI1ENR {
945 SPI1ENR::_from({
946 const MASK: bool = true;
947 const OFFSET: u8 = 12;
948 ((self.bits >> OFFSET) & MASK as u32) != 0
949 })
950 }
951 #[doc = "Bit 13 - TIM8 Timer clock enable"]
952 #[inline]
953 pub fn tim8en(&self) -> TIM8ENR {
954 TIM8ENR::_from({
955 const MASK: bool = true;
956 const OFFSET: u8 = 13;
957 ((self.bits >> OFFSET) & MASK as u32) != 0
958 })
959 }
960 #[doc = "Bit 14 - USART1 clock enable"]
961 #[inline]
962 pub fn usart1en(&self) -> USART1ENR {
963 USART1ENR::_from({
964 const MASK: bool = true;
965 const OFFSET: u8 = 14;
966 ((self.bits >> OFFSET) & MASK as u32) != 0
967 })
968 }
969 #[doc = "Bit 15 - ADC3 interface clock enable"]
970 #[inline]
971 pub fn adc3en(&self) -> ADC3ENR {
972 ADC3ENR::_from({
973 const MASK: bool = true;
974 const OFFSET: u8 = 15;
975 ((self.bits >> OFFSET) & MASK as u32) != 0
976 })
977 }
978 #[doc = "Bit 19 - TIM9 Timer clock enable"]
979 #[inline]
980 pub fn tim9en(&self) -> TIM9ENR {
981 TIM9ENR::_from({
982 const MASK: bool = true;
983 const OFFSET: u8 = 19;
984 ((self.bits >> OFFSET) & MASK as u32) != 0
985 })
986 }
987 #[doc = "Bit 20 - TIM10 Timer clock enable"]
988 #[inline]
989 pub fn tim10en(&self) -> TIM10ENR {
990 TIM10ENR::_from({
991 const MASK: bool = true;
992 const OFFSET: u8 = 20;
993 ((self.bits >> OFFSET) & MASK as u32) != 0
994 })
995 }
996 #[doc = "Bit 21 - TIM11 Timer clock enable"]
997 #[inline]
998 pub fn tim11en(&self) -> TIM11ENR {
999 TIM11ENR::_from({
1000 const MASK: bool = true;
1001 const OFFSET: u8 = 21;
1002 ((self.bits >> OFFSET) & MASK as u32) != 0
1003 })
1004 }
1005}
1006impl W {
1007 #[doc = r" Reset value of the register"]
1008 #[inline]
1009 pub fn reset_value() -> W {
1010 W { bits: 0 }
1011 }
1012 #[doc = r" Writes raw bits to the register"]
1013 #[inline]
1014 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1015 self.bits = bits;
1016 self
1017 }
1018 #[doc = "Bit 0 - Alternate function I/O clock enable"]
1019 #[inline]
1020 pub fn afioen(&mut self) -> _AFIOENW {
1021 _AFIOENW { w: self }
1022 }
1023 #[doc = "Bit 2 - I/O port A clock enable"]
1024 #[inline]
1025 pub fn iopaen(&mut self) -> _IOPAENW {
1026 _IOPAENW { w: self }
1027 }
1028 #[doc = "Bit 3 - I/O port B clock enable"]
1029 #[inline]
1030 pub fn iopben(&mut self) -> _IOPBENW {
1031 _IOPBENW { w: self }
1032 }
1033 #[doc = "Bit 4 - I/O port C clock enable"]
1034 #[inline]
1035 pub fn iopcen(&mut self) -> _IOPCENW {
1036 _IOPCENW { w: self }
1037 }
1038 #[doc = "Bit 5 - I/O port D clock enable"]
1039 #[inline]
1040 pub fn iopden(&mut self) -> _IOPDENW {
1041 _IOPDENW { w: self }
1042 }
1043 #[doc = "Bit 6 - I/O port E clock enable"]
1044 #[inline]
1045 pub fn iopeen(&mut self) -> _IOPEENW {
1046 _IOPEENW { w: self }
1047 }
1048 #[doc = "Bit 7 - I/O port F clock enable"]
1049 #[inline]
1050 pub fn iopfen(&mut self) -> _IOPFENW {
1051 _IOPFENW { w: self }
1052 }
1053 #[doc = "Bit 8 - I/O port G clock enable"]
1054 #[inline]
1055 pub fn iopgen(&mut self) -> _IOPGENW {
1056 _IOPGENW { w: self }
1057 }
1058 #[doc = "Bit 9 - ADC 1 interface clock enable"]
1059 #[inline]
1060 pub fn adc1en(&mut self) -> _ADC1ENW {
1061 _ADC1ENW { w: self }
1062 }
1063 #[doc = "Bit 10 - ADC 2 interface clock enable"]
1064 #[inline]
1065 pub fn adc2en(&mut self) -> _ADC2ENW {
1066 _ADC2ENW { w: self }
1067 }
1068 #[doc = "Bit 11 - TIM1 Timer clock enable"]
1069 #[inline]
1070 pub fn tim1en(&mut self) -> _TIM1ENW {
1071 _TIM1ENW { w: self }
1072 }
1073 #[doc = "Bit 12 - SPI 1 clock enable"]
1074 #[inline]
1075 pub fn spi1en(&mut self) -> _SPI1ENW {
1076 _SPI1ENW { w: self }
1077 }
1078 #[doc = "Bit 13 - TIM8 Timer clock enable"]
1079 #[inline]
1080 pub fn tim8en(&mut self) -> _TIM8ENW {
1081 _TIM8ENW { w: self }
1082 }
1083 #[doc = "Bit 14 - USART1 clock enable"]
1084 #[inline]
1085 pub fn usart1en(&mut self) -> _USART1ENW {
1086 _USART1ENW { w: self }
1087 }
1088 #[doc = "Bit 15 - ADC3 interface clock enable"]
1089 #[inline]
1090 pub fn adc3en(&mut self) -> _ADC3ENW {
1091 _ADC3ENW { w: self }
1092 }
1093 #[doc = "Bit 19 - TIM9 Timer clock enable"]
1094 #[inline]
1095 pub fn tim9en(&mut self) -> _TIM9ENW {
1096 _TIM9ENW { w: self }
1097 }
1098 #[doc = "Bit 20 - TIM10 Timer clock enable"]
1099 #[inline]
1100 pub fn tim10en(&mut self) -> _TIM10ENW {
1101 _TIM10ENW { w: self }
1102 }
1103 #[doc = "Bit 21 - TIM11 Timer clock enable"]
1104 #[inline]
1105 pub fn tim11en(&mut self) -> _TIM11ENW {
1106 _TIM11ENW { w: self }
1107 }
1108}