Module stm32f100xx::tim1
[−]
[src]
Advanced timer
Modules
arr |
auto-reload register |
bdtr |
break and dead-time register |
ccer |
capture/compare enable register |
ccmr1_input |
capture/compare mode register 1 (input mode) |
ccmr1_output |
capture/compare mode register (output mode) |
ccmr2_input |
capture/compare mode register 2 (input mode) |
ccmr2_output |
capture/compare mode register (output mode) |
ccr1 |
capture/compare register 1 |
ccr2 |
capture/compare register 2 |
ccr3 |
capture/compare register 3 |
ccr4 |
capture/compare register 4 |
cnt |
counter |
cr1 |
control register 1 |
cr2 |
control register 2 |
dcr |
DMA control register |
dier |
DMA/Interrupt enable register |
dmar |
DMA address for full transfer |
egr |
event generation register |
psc |
prescaler |
rcr |
repetition counter register |
smcr |
slave mode control register |
sr |
status register |
Structs
Arr |
auto-reload register |
Bdtr |
break and dead-time register |
Ccer |
capture/compare enable register |
Ccmr1Input |
capture/compare mode register 1 (input mode) |
Ccmr1Output |
capture/compare mode register (output mode) |
Ccmr2Input |
capture/compare mode register 2 (input mode) |
Ccmr2Output |
capture/compare mode register (output mode) |
Ccr1 |
capture/compare register 1 |
Ccr2 |
capture/compare register 2 |
Ccr3 |
capture/compare register 3 |
Ccr4 |
capture/compare register 4 |
Cnt |
counter |
Cr1 |
control register 1 |
Cr2 |
control register 2 |
Dcr |
DMA control register |
Dier |
DMA/Interrupt enable register |
Dmar |
DMA address for full transfer |
Egr |
event generation register |
Psc |
prescaler |
Rcr |
repetition counter register |
RegisterBlock |
Register block |
Smcr |
slave mode control register |
Sr |
status register |