Module adc1

Source
Expand description

Analog to digital converter

Modules§

cr1
control register 1
cr2
control register 2
dr
regular data register
htr
watchdog higher threshold register
jdr
injected data register x
jofr
injected channel data offset register %s
jsqr
injected sequence register
ltr
watchdog lower threshold register
smpr1
sample time register 1
smpr2
sample time register 2
sqr1
regular sequence register 1
sqr2
regular sequence register 2
sqr3
regular sequence register 3
sr
status register

Structs§

RegisterBlock
Register block

Type Aliases§

CR1
CR1 (rw) register accessor: control register 1
CR2
CR2 (rw) register accessor: control register 2
DR
DR (r) register accessor: regular data register
HTR
HTR (rw) register accessor: watchdog higher threshold register
JDR
JDR (r) register accessor: injected data register x
JOFR
JOFR (rw) register accessor: injected channel data offset register %s
JSQR
JSQR (rw) register accessor: injected sequence register
LTR
LTR (rw) register accessor: watchdog lower threshold register
SMPR1
SMPR1 (rw) register accessor: sample time register 1
SMPR2
SMPR2 (rw) register accessor: sample time register 2
SQR1
SQR1 (rw) register accessor: regular sequence register 1
SQR2
SQR2 (rw) register accessor: regular sequence register 2
SQR3
SQR3 (rw) register accessor: regular sequence register 3
SR
SR (rw) register accessor: status register